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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O3 \3; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \4; RUN:   < %s | FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O3 \6; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mattr=-mma \7; RUN:   < %s | FileCheck %s --check-prefix=CHECK-NOMMA8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O3 \9; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \10; RUN:   < %s | FileCheck %s --check-prefix=CHECK-BE11; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O3 \12; RUN:   -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mattr=-mma \13; RUN:   < %s | FileCheck %s --check-prefix=CHECK-BE-NOMMA14 15; This test also checks that the paired vector intrinsics are available even16; when MMA is disabled.17 18; assemble_pair19declare <256 x i1> @llvm.ppc.vsx.assemble.pair(<16 x i8>, <16 x i8>)20define void @ass_pair(ptr %ptr, <16 x i8> %vc) {21; CHECK-LABEL: ass_pair:22; CHECK:       # %bb.0: # %entry23; CHECK-NEXT:    stxv v2, 16(r3)24; CHECK-NEXT:    stxv v2, 0(r3)25; CHECK-NEXT:    blr26;27; CHECK-NOMMA-LABEL: ass_pair:28; CHECK-NOMMA:       # %bb.0: # %entry29; CHECK-NOMMA-NEXT:    stxv v2, 16(r3)30; CHECK-NOMMA-NEXT:    stxv v2, 0(r3)31; CHECK-NOMMA-NEXT:    blr32;33; CHECK-BE-LABEL: ass_pair:34; CHECK-BE:       # %bb.0: # %entry35; CHECK-BE-NEXT:    stxv v2, 16(r3)36; CHECK-BE-NEXT:    stxv v2, 0(r3)37; CHECK-BE-NEXT:    blr38;39; CHECK-BE-NOMMA-LABEL: ass_pair:40; CHECK-BE-NOMMA:       # %bb.0: # %entry41; CHECK-BE-NOMMA-NEXT:    stxv v2, 16(r3)42; CHECK-BE-NOMMA-NEXT:    stxv v2, 0(r3)43; CHECK-BE-NOMMA-NEXT:    blr44entry:45  %0 = tail call <256 x i1> @llvm.ppc.vsx.assemble.pair(<16 x i8> %vc, <16 x i8> %vc)46  store <256 x i1> %0, ptr %ptr, align 3247  ret void48}49 50; disassemble_pair51declare { <16 x i8>, <16 x i8> } @llvm.ppc.vsx.disassemble.pair(<256 x i1>)52define void @disass_pair(ptr %ptr1, ptr %ptr2, ptr %ptr3) {53; CHECK-LABEL: disass_pair:54; CHECK:       # %bb.0: # %entry55; CHECK-NEXT:    lxv vs0, 16(r3)56; CHECK-NEXT:    lxv vs1, 0(r3)57; CHECK-NEXT:    stxv vs1, 0(r4)58; CHECK-NEXT:    stxv vs0, 0(r5)59; CHECK-NEXT:    blr60;61; CHECK-NOMMA-LABEL: disass_pair:62; CHECK-NOMMA:       # %bb.0: # %entry63; CHECK-NOMMA-NEXT:    lxv vs0, 16(r3)64; CHECK-NOMMA-NEXT:    lxv vs1, 0(r3)65; CHECK-NOMMA-NEXT:    stxv vs1, 0(r4)66; CHECK-NOMMA-NEXT:    stxv vs0, 0(r5)67; CHECK-NOMMA-NEXT:    blr68;69; CHECK-BE-LABEL: disass_pair:70; CHECK-BE:       # %bb.0: # %entry71; CHECK-BE-NEXT:    lxv vs0, 0(r3)72; CHECK-BE-NEXT:    lxv vs1, 16(r3)73; CHECK-BE-NEXT:    stxv vs0, 0(r4)74; CHECK-BE-NEXT:    stxv vs1, 0(r5)75; CHECK-BE-NEXT:    blr76;77; CHECK-BE-NOMMA-LABEL: disass_pair:78; CHECK-BE-NOMMA:       # %bb.0: # %entry79; CHECK-BE-NOMMA-NEXT:    lxv vs0, 0(r3)80; CHECK-BE-NOMMA-NEXT:    lxv vs1, 16(r3)81; CHECK-BE-NOMMA-NEXT:    stxv vs0, 0(r4)82; CHECK-BE-NOMMA-NEXT:    stxv vs1, 0(r5)83; CHECK-BE-NOMMA-NEXT:    blr84entry:85  %0 = load <256 x i1>, ptr %ptr1, align 3286  %1 = tail call { <16 x i8>, <16 x i8> } @llvm.ppc.vsx.disassemble.pair(<256 x i1> %0)87  %2 = extractvalue { <16 x i8>, <16 x i8> } %1, 088  %3 = extractvalue { <16 x i8>, <16 x i8> } %1, 189  store <16 x i8> %2, ptr %ptr2, align 1690  store <16 x i8> %3, ptr %ptr3, align 1691  ret void92}93 94define void @test_ldst_1(ptr %vpp, ptr %vp2) {95; CHECK-LABEL: test_ldst_1:96; CHECK:       # %bb.0: # %entry97; CHECK-NEXT:    lxvp vsp34, 0(r3)98; CHECK-NEXT:    stxvp vsp34, 0(r4)99; CHECK-NEXT:    blr100;101; CHECK-NOMMA-LABEL: test_ldst_1:102; CHECK-NOMMA:       # %bb.0: # %entry103; CHECK-NOMMA-NEXT:    lxvp vsp34, 0(r3)104; CHECK-NOMMA-NEXT:    stxvp vsp34, 0(r4)105; CHECK-NOMMA-NEXT:    blr106;107; CHECK-BE-LABEL: test_ldst_1:108; CHECK-BE:       # %bb.0: # %entry109; CHECK-BE-NEXT:    lxvp vsp34, 0(r3)110; CHECK-BE-NEXT:    stxvp vsp34, 0(r4)111; CHECK-BE-NEXT:    blr112;113; CHECK-BE-NOMMA-LABEL: test_ldst_1:114; CHECK-BE-NOMMA:       # %bb.0: # %entry115; CHECK-BE-NOMMA-NEXT:    lxvp vsp34, 0(r3)116; CHECK-BE-NOMMA-NEXT:    stxvp vsp34, 0(r4)117; CHECK-BE-NOMMA-NEXT:    blr118entry:119  %0 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %vpp)120  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %0, ptr %vp2)121  ret void122}123 124declare <256 x i1> @llvm.ppc.vsx.lxvp(ptr)125declare void @llvm.ppc.vsx.stxvp(<256 x i1>, ptr)126 127define void @test_ldst_2(ptr %vpp, i64 %offset, ptr %vp2)  {128; CHECK-LABEL: test_ldst_2:129; CHECK:       # %bb.0: # %entry130; CHECK-NEXT:    lxvpx vsp34, r3, r4131; CHECK-NEXT:    stxvpx vsp34, r5, r4132; CHECK-NEXT:    blr133;134; CHECK-NOMMA-LABEL: test_ldst_2:135; CHECK-NOMMA:       # %bb.0: # %entry136; CHECK-NOMMA-NEXT:    lxvpx vsp34, r3, r4137; CHECK-NOMMA-NEXT:    stxvpx vsp34, r5, r4138; CHECK-NOMMA-NEXT:    blr139;140; CHECK-BE-LABEL: test_ldst_2:141; CHECK-BE:       # %bb.0: # %entry142; CHECK-BE-NEXT:    lxvpx vsp34, r3, r4143; CHECK-BE-NEXT:    stxvpx vsp34, r5, r4144; CHECK-BE-NEXT:    blr145;146; CHECK-BE-NOMMA-LABEL: test_ldst_2:147; CHECK-BE-NOMMA:       # %bb.0: # %entry148; CHECK-BE-NOMMA-NEXT:    lxvpx vsp34, r3, r4149; CHECK-BE-NOMMA-NEXT:    stxvpx vsp34, r5, r4150; CHECK-BE-NOMMA-NEXT:    blr151entry:152  %0 = getelementptr i8, ptr %vpp, i64 %offset153  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)154  %2 = getelementptr i8, ptr %vp2, i64 %offset155  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)156  ret void157}158 159define void @test_ldst_3(ptr %vpp, ptr %vp2)  {160; CHECK-LABEL: test_ldst_3:161; CHECK:       # %bb.0: # %entry162; CHECK-NEXT:    plxvp vsp34, 18(r3), 0163; CHECK-NEXT:    pstxvp vsp34, 18(r4), 0164; CHECK-NEXT:    blr165;166; CHECK-NOMMA-LABEL: test_ldst_3:167; CHECK-NOMMA:       # %bb.0: # %entry168; CHECK-NOMMA-NEXT:    plxvp vsp34, 18(r3), 0169; CHECK-NOMMA-NEXT:    pstxvp vsp34, 18(r4), 0170; CHECK-NOMMA-NEXT:    blr171;172; CHECK-BE-LABEL: test_ldst_3:173; CHECK-BE:       # %bb.0: # %entry174; CHECK-BE-NEXT:    plxvp vsp34, 18(r3), 0175; CHECK-BE-NEXT:    pstxvp vsp34, 18(r4), 0176; CHECK-BE-NEXT:    blr177;178; CHECK-BE-NOMMA-LABEL: test_ldst_3:179; CHECK-BE-NOMMA:       # %bb.0: # %entry180; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 18(r3), 0181; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 18(r4), 0182; CHECK-BE-NOMMA-NEXT:    blr183entry:184  %0 = getelementptr i8, ptr %vpp, i64 18185  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)186  %2 = getelementptr i8, ptr %vp2, i64 18187  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)188  ret void189}190 191define void @test_ldst_4(ptr %vpp, ptr %vp2)  {192; CHECK-LABEL: test_ldst_4:193; CHECK:       # %bb.0: # %entry194; CHECK-NEXT:    plxvp vsp34, 1(r3), 0195; CHECK-NEXT:    pstxvp vsp34, 1(r4), 0196; CHECK-NEXT:    blr197;198; CHECK-NOMMA-LABEL: test_ldst_4:199; CHECK-NOMMA:       # %bb.0: # %entry200; CHECK-NOMMA-NEXT:    plxvp vsp34, 1(r3), 0201; CHECK-NOMMA-NEXT:    pstxvp vsp34, 1(r4), 0202; CHECK-NOMMA-NEXT:    blr203;204; CHECK-BE-LABEL: test_ldst_4:205; CHECK-BE:       # %bb.0: # %entry206; CHECK-BE-NEXT:    plxvp vsp34, 1(r3), 0207; CHECK-BE-NEXT:    pstxvp vsp34, 1(r4), 0208; CHECK-BE-NEXT:    blr209;210; CHECK-BE-NOMMA-LABEL: test_ldst_4:211; CHECK-BE-NOMMA:       # %bb.0: # %entry212; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 1(r3), 0213; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 1(r4), 0214; CHECK-BE-NOMMA-NEXT:    blr215entry:216  %0 = getelementptr i8, ptr %vpp, i64 1217  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)218  %2 = getelementptr i8, ptr %vp2, i64 1219  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)220  ret void221}222 223define void @test_ldst_5(ptr %vpp, ptr %vp2)  {224; CHECK-LABEL: test_ldst_5:225; CHECK:       # %bb.0: # %entry226; CHECK-NEXT:    plxvp vsp34, 42(r3), 0227; CHECK-NEXT:    pstxvp vsp34, 42(r4), 0228; CHECK-NEXT:    blr229;230; CHECK-NOMMA-LABEL: test_ldst_5:231; CHECK-NOMMA:       # %bb.0: # %entry232; CHECK-NOMMA-NEXT:    plxvp vsp34, 42(r3), 0233; CHECK-NOMMA-NEXT:    pstxvp vsp34, 42(r4), 0234; CHECK-NOMMA-NEXT:    blr235;236; CHECK-BE-LABEL: test_ldst_5:237; CHECK-BE:       # %bb.0: # %entry238; CHECK-BE-NEXT:    plxvp vsp34, 42(r3), 0239; CHECK-BE-NEXT:    pstxvp vsp34, 42(r4), 0240; CHECK-BE-NEXT:    blr241;242; CHECK-BE-NOMMA-LABEL: test_ldst_5:243; CHECK-BE-NOMMA:       # %bb.0: # %entry244; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 42(r3), 0245; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 42(r4), 0246; CHECK-BE-NOMMA-NEXT:    blr247entry:248  %0 = getelementptr i8, ptr %vpp, i64 42249  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)250  %2 = getelementptr i8, ptr %vp2, i64 42251  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)252  ret void253}254 255define void @test_ldst_6(ptr %vpp, ptr %vp2)  {256; CHECK-LABEL: test_ldst_6:257; CHECK:       # %bb.0: # %entry258; CHECK-NEXT:    lxvp vsp34, 4096(r3)259; CHECK-NEXT:    stxvp vsp34, 4096(r4)260; CHECK-NEXT:    blr261;262; CHECK-NOMMA-LABEL: test_ldst_6:263; CHECK-NOMMA:       # %bb.0: # %entry264; CHECK-NOMMA-NEXT:    lxvp vsp34, 4096(r3)265; CHECK-NOMMA-NEXT:    stxvp vsp34, 4096(r4)266; CHECK-NOMMA-NEXT:    blr267;268; CHECK-BE-LABEL: test_ldst_6:269; CHECK-BE:       # %bb.0: # %entry270; CHECK-BE-NEXT:    lxvp vsp34, 4096(r3)271; CHECK-BE-NEXT:    stxvp vsp34, 4096(r4)272; CHECK-BE-NEXT:    blr273;274; CHECK-BE-NOMMA-LABEL: test_ldst_6:275; CHECK-BE-NOMMA:       # %bb.0: # %entry276; CHECK-BE-NOMMA-NEXT:    lxvp vsp34, 4096(r3)277; CHECK-BE-NOMMA-NEXT:    stxvp vsp34, 4096(r4)278; CHECK-BE-NOMMA-NEXT:    blr279entry:280  %0 = getelementptr <256 x i1>, ptr %vpp, i64 128281  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)282  %2 = getelementptr <256 x i1>, ptr %vp2, i64 128283  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)284  ret void285}286 287define void @test_ldst_7(ptr %vpp, ptr %vp2)  {288; FIXME: A prefixed load (plxvp) is expected here as the offset in this289; test case is a constant that fits within 34-bits.290; CHECK-LABEL: test_ldst_7:291; CHECK:       # %bb.0: # %entry292; CHECK-NEXT:    plxvp vsp34, 32799(r3), 0293; CHECK-NEXT:    pstxvp vsp34, 32799(r4), 0294; CHECK-NEXT:    blr295;296; CHECK-NOMMA-LABEL: test_ldst_7:297; CHECK-NOMMA:       # %bb.0: # %entry298; CHECK-NOMMA-NEXT:    plxvp vsp34, 32799(r3), 0299; CHECK-NOMMA-NEXT:    pstxvp vsp34, 32799(r4), 0300; CHECK-NOMMA-NEXT:    blr301;302; CHECK-BE-LABEL: test_ldst_7:303; CHECK-BE:       # %bb.0: # %entry304; CHECK-BE-NEXT:    plxvp vsp34, 32799(r3), 0305; CHECK-BE-NEXT:    pstxvp vsp34, 32799(r4), 0306; CHECK-BE-NEXT:    blr307;308; CHECK-BE-NOMMA-LABEL: test_ldst_7:309; CHECK-BE-NOMMA:       # %bb.0: # %entry310; CHECK-BE-NOMMA-NEXT:    plxvp vsp34, 32799(r3), 0311; CHECK-BE-NOMMA-NEXT:    pstxvp vsp34, 32799(r4), 0312; CHECK-BE-NOMMA-NEXT:    blr313entry:314  %0 = getelementptr i8, ptr %vpp, i64 32799315  %1 = tail call <256 x i1> @llvm.ppc.vsx.lxvp(ptr %0)316  %2 = getelementptr i8, ptr %vp2, i64 32799317  tail call void @llvm.ppc.vsx.stxvp(<256 x i1> %1, ptr %2)318  ret void319}320