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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O1 \3; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s -check-prefixes=CHECK-LE5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O1 \6; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s -check-prefixes=CHECK-BE8 9@GlobLd1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 110@GlobSt1 = dso_local local_unnamed_addr global [20 x i1] zeroinitializer, align 111 12define i1 @i64_ExtLoad_i1() {13; CHECK-LE-LABEL: i64_ExtLoad_i1:14; CHECK-LE: # %bb.0: # %entry15; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 116; CHECK-LE-NEXT: blr17;18; CHECK-BE-LABEL: i64_ExtLoad_i1:19; CHECK-BE: # %bb.0: # %entry20; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha21; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)22; CHECK-BE-NEXT: blr23entry:24 %0 = load i1, ptr @GlobLd1, align 125 ret i1 %026}27 28define zeroext i1 @i64_ZextLoad_i1() {29; CHECK-LE-LABEL: i64_ZextLoad_i1:30; CHECK-LE: # %bb.0: # %entry31; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 132; CHECK-LE-NEXT: blr33;34; CHECK-BE-LABEL: i64_ZextLoad_i1:35; CHECK-BE: # %bb.0: # %entry36; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha37; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)38; CHECK-BE-NEXT: blr39entry:40 %0 = load i1, ptr @GlobLd1, align 141 ret i1 %042}43 44define void @i32_ZextLoad_i1() {45; CHECK-LE-LABEL: i32_ZextLoad_i1:46; CHECK-LE: # %bb.0: # %entry47; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 148; CHECK-LE-NEXT: clrldi r3, r3, 6349; CHECK-LE-NEXT: pstb r3, GlobSt1@PCREL(0), 150; CHECK-LE-NEXT: blr51;52; CHECK-BE-LABEL: i32_ZextLoad_i1:53; CHECK-BE: # %bb.0: # %entry54; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha55; CHECK-BE-NEXT: addis r4, r2, GlobSt1@toc@ha56; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)57; CHECK-BE-NEXT: clrldi r3, r3, 6358; CHECK-BE-NEXT: stb r3, GlobSt1@toc@l(r4)59; CHECK-BE-NEXT: blr60entry:61 %0 = load i1, ptr @GlobLd1, align 162 store i1 %0, ptr @GlobSt1, align 163 ret void64}65 66%1 = type { i64 }67@Glob1 = external dso_local global %1, align 868@Glob2 = external dso_local unnamed_addr constant [11 x i8], align 169declare i32 @Decl(ptr, ptr) local_unnamed_addr #070 71define dso_local i1 @i32_ExtLoad_i1() local_unnamed_addr #0 {72; CHECK-LE-LABEL: i32_ExtLoad_i1:73; CHECK-LE: # %bb.0: # %bb74; CHECK-LE-NEXT: mflr r075; CHECK-LE-NEXT: std r0, 16(r1)76; CHECK-LE-NEXT: stdu r1, -32(r1)77; CHECK-LE-NEXT: .cfi_def_cfa_offset 3278; CHECK-LE-NEXT: .cfi_offset lr, 1679; CHECK-LE-NEXT: paddi r3, 0, Glob1@PCREL, 180; CHECK-LE-NEXT: paddi r4, 0, Glob2@PCREL, 181; CHECK-LE-NEXT: bl Decl@notoc82; CHECK-LE-NEXT: cmpwi cr1, r3, 083; CHECK-LE-NEXT: plbz r3, GlobLd1@PCREL(0), 184; CHECK-LE-NEXT: andi. r3, r3, 185; CHECK-LE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq86; CHECK-LE-NEXT: setbc r3, 4*cr5+lt87; CHECK-LE-NEXT: addi r1, r1, 3288; CHECK-LE-NEXT: ld r0, 16(r1)89; CHECK-LE-NEXT: mtlr r090; CHECK-LE-NEXT: blr91;92; CHECK-BE-LABEL: i32_ExtLoad_i1:93; CHECK-BE: # %bb.0: # %bb94; CHECK-BE-NEXT: mflr r095; CHECK-BE-NEXT: std r0, 16(r1)96; CHECK-BE-NEXT: stdu r1, -112(r1)97; CHECK-BE-NEXT: .cfi_def_cfa_offset 11298; CHECK-BE-NEXT: .cfi_offset lr, 1699; CHECK-BE-NEXT: addis r3, r2, Glob1@toc@ha100; CHECK-BE-NEXT: addis r4, r2, Glob2@toc@ha101; CHECK-BE-NEXT: addi r3, r3, Glob1@toc@l102; CHECK-BE-NEXT: addi r4, r4, Glob2@toc@l103; CHECK-BE-NEXT: bl Decl104; CHECK-BE-NEXT: nop105; CHECK-BE-NEXT: cmpwi cr1, r3, 0106; CHECK-BE-NEXT: addis r3, r2, GlobLd1@toc@ha107; CHECK-BE-NEXT: lbz r3, GlobLd1@toc@l(r3)108; CHECK-BE-NEXT: andi. r3, r3, 1109; CHECK-BE-NEXT: crandc 4*cr5+lt, gt, 4*cr1+eq110; CHECK-BE-NEXT: setbc r3, 4*cr5+lt111; CHECK-BE-NEXT: addi r1, r1, 112112; CHECK-BE-NEXT: ld r0, 16(r1)113; CHECK-BE-NEXT: mtlr r0114; CHECK-BE-NEXT: blr115bb:116 %i = call signext i32 @Decl(ptr nonnull dereferenceable(32) @Glob1, ptr @Glob2) #1117 %i1 = icmp eq i32 %i, 0118 %i2 = load i1, ptr @GlobLd1, align 1119 %i3 = select i1 %i1, i1 false, i1 %i2120 ret i1 %i3121}122