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1# RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr10 %s -o - \2# RUN: -run-pass=ppc-mi-peepholes -verify-machineinstrs | FileCheck %s3 4# Test the peephole replacing unprimed accumulator PHI nodes by primed5# accumulator PHI nodes. We have a test for the simple case (PHI nodes with COPY6# operands), a test for PHI nodes with IMPLICIT_DEF operands, a test for PHI7# nodes with operands being other PHI nodes on unprimed accumulators and a test8# with an unprimed accumulator PHI node cycle.9 10--- |11 define dso_local void @phiCopy(i32 signext %i, <16 x i8> %vc, ptr nocapture %ptr) {12 entry:13 %0 = tail call <512 x i1> @llvm.ppc.mma.xxsetaccz()14 %tobool.not = icmp eq i32 %i, 015 br i1 %tobool.not, label %if.end, label %if.then16 17 if.then:18 %1 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %0, <16 x i8> %vc, <16 x i8> %vc)19 br label %if.end20 21 if.end:22 %vq.0 = phi <512 x i1> [ %1, %if.then ], [ %0, %entry ]23 store <512 x i1> %vq.0, ptr %ptr, align 6424 ret void25 }26 27 declare <512 x i1> @llvm.ppc.mma.xxsetaccz()28 29 declare <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1>, <16 x i8>, <16 x i8>)30 31 define dso_local void @phiCopyUndef(i32 signext %i, <16 x i8> %vc, ptr nocapture %ptr) {32 entry:33 %tobool.not = icmp eq i32 %i, 034 br i1 %tobool.not, label %if.end, label %if.then35 36 if.then:37 %0 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> undef, <16 x i8> %vc, <16 x i8> %vc)38 br label %if.end39 40 if.end:41 %vq.0 = phi <512 x i1> [ %0, %if.then ], [ undef, %entry ]42 store <512 x i1> %vq.0, ptr %ptr, align 6443 ret void44 }45 46 define dso_local void @phiPhis(i32 signext %i, <16 x i8> %vc, ptr nocapture %ptr) {47 entry:48 %cmp6 = icmp sgt i32 %i, 049 br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup50 51 for.body.preheader:52 %0 = add i32 %i, -153 %xtraiter = and i32 %i, 754 %1 = icmp ult i32 %0, 755 br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new56 57 for.body.preheader.new:58 %unroll_iter = and i32 %i, -859 %2 = add i32 %unroll_iter, -860 %3 = zext i32 %2 to i6461 %4 = lshr i64 %3, 362 %5 = add nuw nsw i64 %4, 163 call void @llvm.set.loop.iterations.i64(i64 %5)64 br label %for.body65 66 for.cond.cleanup.loopexit.unr-lcssa:67 %vq.07.unr = phi <512 x i1> [ undef, %for.body.preheader ], [ %18, %for.body ]68 %lcmp.mod.not = icmp eq i32 %xtraiter, 069 br i1 %lcmp.mod.not, label %for.cond.cleanup, label %for.body.epil.preheader70 71 for.body.epil.preheader:72 %6 = add nsw i32 %xtraiter, -173 %7 = zext i32 %6 to i6474 %8 = add nuw nsw i64 %7, 175 call void @llvm.set.loop.iterations.i64(i64 %8)76 br label %for.body.epil77 78 for.body.epil:79 %vq.07.epil = phi <512 x i1> [ %9, %for.body.epil ], [ %vq.07.unr, %for.body.epil.preheader ]80 %9 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %vq.07.epil, <16 x i8> %vc, <16 x i8> %vc)81 %10 = call i1 @llvm.loop.decrement.i64(i64 1)82 br i1 %10, label %for.body.epil, label %for.cond.cleanup83 84 for.cond.cleanup:85 %vq.0.lcssa = phi <512 x i1> [ undef, %entry ], [ %vq.07.unr, %for.cond.cleanup.loopexit.unr-lcssa ], [ %9, %for.body.epil ]86 %add.ptr = getelementptr inbounds <512 x i1>, ptr %ptr, i64 187 store <512 x i1> %vq.0.lcssa, ptr %add.ptr, align 6488 ret void89 90 for.body:91 %vq.07 = phi <512 x i1> [ undef, %for.body.preheader.new ], [ %18, %for.body ]92 %11 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %vq.07, <16 x i8> %vc, <16 x i8> %vc)93 %12 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %11, <16 x i8> %vc, <16 x i8> %vc)94 %13 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %12, <16 x i8> %vc, <16 x i8> %vc)95 %14 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %13, <16 x i8> %vc, <16 x i8> %vc)96 %15 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %14, <16 x i8> %vc, <16 x i8> %vc)97 %16 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %15, <16 x i8> %vc, <16 x i8> %vc)98 %17 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %16, <16 x i8> %vc, <16 x i8> %vc)99 %18 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %17, <16 x i8> %vc, <16 x i8> %vc)100 %19 = call i1 @llvm.loop.decrement.i64(i64 1)101 br i1 %19, label %for.body, label %for.cond.cleanup.loopexit.unr-lcssa102 }103 104 define dso_local void @phiCycle(i32 signext %i, <16 x i8> %vc, ptr nocapture %ptr) {105 entry:106 %cmp6 = icmp sgt i32 %i, 0107 br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup108 109 for.body.preheader:110 %0 = add i32 %i, -1111 %xtraiter = and i32 %i, 7112 %1 = icmp ult i32 %0, 7113 br i1 %1, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.preheader.new114 115 for.body.preheader.new:116 %unroll_iter = and i32 %i, -8117 %2 = add i32 %unroll_iter, -8118 %3 = zext i32 %2 to i64119 %4 = lshr i64 %3, 3120 %5 = add nuw nsw i64 %4, 1121 call void @llvm.set.loop.iterations.i64(i64 %5)122 br label %for.body123 124 for.cond.cleanup.loopexit.unr-lcssa:125 %vq.07.unr = phi <512 x i1> [ undef, %for.body.preheader ], [ %18, %for.body ], [ %vq.07.epil, %for.body.epil ]126 %lcmp.mod.not = icmp eq i32 %xtraiter, 0127 br i1 %lcmp.mod.not, label %for.cond.cleanup, label %for.body.epil.preheader128 129 for.body.epil.preheader:130 %6 = add nsw i32 %xtraiter, -1131 %7 = zext i32 %6 to i64132 %8 = add nuw nsw i64 %7, 1133 call void @llvm.set.loop.iterations.i64(i64 %8)134 br label %for.body.epil135 136 for.body.epil:137 %vq.07.epil = phi <512 x i1> [ %9, %for.body.epil ], [ %vq.07.unr, %for.body.epil.preheader ]138 %9 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %vq.07.epil, <16 x i8> %vc, <16 x i8> %vc)139 %10 = call i1 @llvm.loop.decrement.i64(i64 1)140 %test = icmp ult i32 %0, 7141 br i1 %test, label %for.cond.cleanup.loopexit.unr-lcssa, label %for.body.epil142 ;br i1 %10, label %for.body.epil, label %for.cond.cleanup143 144 for.cond.cleanup:145 %vq.0.lcssa = phi <512 x i1> [ undef, %entry ], [ %vq.07.unr, %for.cond.cleanup.loopexit.unr-lcssa ]146 %add.ptr = getelementptr inbounds <512 x i1>, ptr %ptr, i64 1147 store <512 x i1> %vq.0.lcssa, ptr %add.ptr, align 64148 ret void149 150 for.body:151 %vq.07 = phi <512 x i1> [ undef, %for.body.preheader.new ], [ %18, %for.body ]152 %11 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %vq.07, <16 x i8> %vc, <16 x i8> %vc)153 %12 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %11, <16 x i8> %vc, <16 x i8> %vc)154 %13 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %12, <16 x i8> %vc, <16 x i8> %vc)155 %14 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %13, <16 x i8> %vc, <16 x i8> %vc)156 %15 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %14, <16 x i8> %vc, <16 x i8> %vc)157 %16 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %15, <16 x i8> %vc, <16 x i8> %vc)158 %17 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %16, <16 x i8> %vc, <16 x i8> %vc)159 %18 = tail call <512 x i1> @llvm.ppc.mma.xvf32gerpp(<512 x i1> %17, <16 x i8> %vc, <16 x i8> %vc)160 %19 = call i1 @llvm.loop.decrement.i64(i64 1)161 br i1 %19, label %for.body, label %for.cond.cleanup.loopexit.unr-lcssa162 }163 164 declare void @llvm.set.loop.iterations.i64(i64)165 166 declare i1 @llvm.loop.decrement.i64(i64)167 168...169---170name: phiCopy171alignment: 16172exposesReturnsTwice: false173legalized: false174regBankSelected: false175selected: false176failedISel: false177tracksRegLiveness: true178hasWinCFI: false179registers:180 - { id: 0, class: uaccrc, preferred-register: '' }181 - { id: 1, class: uaccrc, preferred-register: '' }182 - { id: 2, class: uaccrc, preferred-register: '' }183 - { id: 3, class: g8rc, preferred-register: '' }184 - { id: 4, class: vrrc, preferred-register: '' }185 - { id: 5, class: g8rc_and_g8rc_nox0, preferred-register: '' }186 - { id: 6, class: gprc, preferred-register: '' }187 - { id: 7, class: accrc, preferred-register: '' }188 - { id: 8, class: crrc, preferred-register: '' }189 - { id: 9, class: vsrc, preferred-register: '' }190 - { id: 10, class: accrc, preferred-register: '' }191 - { id: 11, class: accrc, preferred-register: '' }192 - { id: 12, class: accrc, preferred-register: '' }193 - { id: 13, class: accrc, preferred-register: '' }194 - { id: 14, class: vsrc, preferred-register: '' }195 - { id: 15, class: vsrprc, preferred-register: '' }196 - { id: 16, class: vsrprc, preferred-register: '' }197 - { id: 17, class: vsrc, preferred-register: '' }198 - { id: 18, class: vsrprc, preferred-register: '' }199 - { id: 19, class: vsrprc, preferred-register: '' }200 - { id: 20, class: vsrc, preferred-register: '' }201 - { id: 21, class: vsrprc, preferred-register: '' }202 - { id: 22, class: vsrprc, preferred-register: '' }203 - { id: 23, class: vsrc, preferred-register: '' }204 - { id: 24, class: vsrprc, preferred-register: '' }205liveins:206 - { reg: '$x3', virtual-reg: '%3' }207 - { reg: '$v2', virtual-reg: '%4' }208 - { reg: '$x7', virtual-reg: '%5' }209frameInfo:210 isFrameAddressTaken: false211 isReturnAddressTaken: false212 hasStackMap: false213 hasPatchPoint: false214 stackSize: 0215 offsetAdjustment: 0216 maxAlignment: 1217 adjustsStack: false218 hasCalls: false219 stackProtector: ''220 maxCallFrameSize: 4294967295221 cvBytesOfCalleeSavedRegisters: 0222 hasOpaqueSPAdjustment: false223 hasVAStart: false224 hasMustTailInVarArgFunc: false225 localFrameSize: 0226 savePoint: []227 restorePoint: []228fixedStack: []229stack: []230callSites: []231debugValueSubstitutions: []232constants: []233machineFunctionInfo: {}234body: |235 bb.0.entry:236 successors: %bb.2(0x30000000), %bb.1(0x50000000)237 liveins: $x3, $v2, $x7238 239 %5:g8rc_and_g8rc_nox0 = COPY $x7240 %4:vrrc = COPY $v2241 %3:g8rc = COPY $x3242 %6:gprc = COPY %3.sub_32243 %7:accrc = XXSETACCZ244 %0:uaccrc = COPY %7245 %8:crrc = CMPLWI killed %6, 0246 BCC 76, killed %8, %bb.2247 B %bb.1248 249 bb.1.if.then:250 successors: %bb.2(0x80000000)251 252 %9:vsrc = COPY %4253 %11:accrc = COPY %7254 %10:accrc = XVF32GERPP %11, %9, %9255 %1:uaccrc = COPY %10256 257 bb.2.if.end:258 ; We check that the PHI node on primed accumulator is inserted after259 ; the label.260 ; CHECK-LABEL: name: phiCopy261 ; CHECK-LABEL: bb.{{[0-9]}}.if.end:262 ; CHECK-NEXT: :accrc = PHI %7, %bb.0, %10, %bb.1263 ; CHECK-NEXT: %2:uaccrc = PHI264 %2:uaccrc = PHI %0, %bb.0, %1, %bb.1265 %13:accrc = COPY %2266 %12:accrc = XXMFACC %13267 %14:vsrc = COPY %12.sub_vsx1268 %16:vsrprc = IMPLICIT_DEF269 %15:vsrprc = INSERT_SUBREG %16, killed %14, %subreg.sub_vsx1270 %17:vsrc = COPY %12.sub_vsx0271 %18:vsrprc = INSERT_SUBREG %15, killed %17, %subreg.sub_vsx0272 STXVP killed %18, 32, %5 :: (store (s256) into %ir.ptr + 32)273 %19:vsrprc = COPY %12.sub_pair1274 %20:vsrc = COPY %19.sub_vsx1275 %22:vsrprc = IMPLICIT_DEF276 %21:vsrprc = INSERT_SUBREG %22, killed %20, %subreg.sub_vsx1277 %23:vsrc = COPY %19.sub_vsx0278 %24:vsrprc = INSERT_SUBREG %21, killed %23, %subreg.sub_vsx0279 STXVP killed %24, 0, %5 :: (store (s256) into %ir.ptr, align 64)280 BLR8 implicit $lr8, implicit $rm281 282...283---284name: phiCopyUndef285alignment: 16286exposesReturnsTwice: false287legalized: false288regBankSelected: false289selected: false290failedISel: false291tracksRegLiveness: true292hasWinCFI: false293registers:294 - { id: 0, class: uaccrc, preferred-register: '' }295 - { id: 1, class: uaccrc, preferred-register: '' }296 - { id: 2, class: g8rc, preferred-register: '' }297 - { id: 3, class: vrrc, preferred-register: '' }298 - { id: 4, class: g8rc_and_g8rc_nox0, preferred-register: '' }299 - { id: 5, class: uaccrc, preferred-register: '' }300 - { id: 6, class: gprc, preferred-register: '' }301 - { id: 7, class: crrc, preferred-register: '' }302 - { id: 8, class: vsrc, preferred-register: '' }303 - { id: 9, class: accrc, preferred-register: '' }304 - { id: 10, class: uaccrc, preferred-register: '' }305 - { id: 11, class: accrc, preferred-register: '' }306 - { id: 12, class: accrc, preferred-register: '' }307 - { id: 13, class: accrc, preferred-register: '' }308 - { id: 14, class: vsrc, preferred-register: '' }309 - { id: 15, class: vsrprc, preferred-register: '' }310 - { id: 16, class: vsrprc, preferred-register: '' }311 - { id: 17, class: vsrc, preferred-register: '' }312 - { id: 18, class: vsrprc, preferred-register: '' }313 - { id: 19, class: vsrprc, preferred-register: '' }314 - { id: 20, class: vsrc, preferred-register: '' }315 - { id: 21, class: vsrprc, preferred-register: '' }316 - { id: 22, class: vsrprc, preferred-register: '' }317 - { id: 23, class: vsrc, preferred-register: '' }318 - { id: 24, class: vsrprc, preferred-register: '' }319liveins:320 - { reg: '$x3', virtual-reg: '%2' }321 - { reg: '$v2', virtual-reg: '%3' }322 - { reg: '$x7', virtual-reg: '%4' }323frameInfo:324 isFrameAddressTaken: false325 isReturnAddressTaken: false326 hasStackMap: false327 hasPatchPoint: false328 stackSize: 0329 offsetAdjustment: 0330 maxAlignment: 1331 adjustsStack: false332 hasCalls: false333 stackProtector: ''334 maxCallFrameSize: 4294967295335 cvBytesOfCalleeSavedRegisters: 0336 hasOpaqueSPAdjustment: false337 hasVAStart: false338 hasMustTailInVarArgFunc: false339 localFrameSize: 0340 savePoint: []341 restorePoint: []342fixedStack: []343stack: []344callSites: []345debugValueSubstitutions: []346constants: []347machineFunctionInfo: {}348body: |349 bb.0.entry:350 successors: %bb.3(0x30000000), %bb.1(0x50000000)351 liveins: $x3, $v2, $x7352 353 %4:g8rc_and_g8rc_nox0 = COPY $x7354 %3:vrrc = COPY $v2355 %2:g8rc = COPY $x3356 %6:gprc = COPY %2.sub_32357 %7:crrc = CMPLWI killed %6, 0358 BCC 68, killed %7, %bb.1359 360 bb.3:361 successors: %bb.2(0x80000000)362 363 %5:uaccrc = IMPLICIT_DEF364 B %bb.2365 366 bb.1.if.then:367 successors: %bb.2(0x80000000)368 369 %8:vsrc = COPY %3370 %10:uaccrc = IMPLICIT_DEF371 %11:accrc = COPY %10372 %9:accrc = XVF32GERPP %11, %8, %8373 %0:uaccrc = COPY %9374 375 bb.2.if.end:376 ; We check that the PHI node on primed accumulator is inserted after377 ; the label.378 ; CHECK-LABEL: name: phiCopyUndef379 ; CHECK-LABEL: bb.{{[0-9]}}.if.end:380 ; CHECK-NEXT: :accrc = PHI381 ; CHECK-NEXT: %1:uaccrc = PHI382 %1:uaccrc = PHI %5, %bb.3, %0, %bb.1383 %13:accrc = COPY %1384 %12:accrc = XXMFACC %13385 %14:vsrc = COPY %12.sub_vsx1386 %16:vsrprc = IMPLICIT_DEF387 %15:vsrprc = INSERT_SUBREG %16, killed %14, %subreg.sub_vsx1388 %17:vsrc = COPY %12.sub_vsx0389 %18:vsrprc = INSERT_SUBREG %15, killed %17, %subreg.sub_vsx0390 STXVP killed %18, 32, %4 :: (store (s256) into %ir.ptr + 32)391 %19:vsrprc = COPY %12.sub_pair1392 %20:vsrc = COPY %19.sub_vsx1393 %22:vsrprc = IMPLICIT_DEF394 %21:vsrprc = INSERT_SUBREG %22, killed %20, %subreg.sub_vsx1395 %23:vsrc = COPY %19.sub_vsx0396 %24:vsrprc = INSERT_SUBREG %21, killed %23, %subreg.sub_vsx0397 STXVP killed %24, 0, %4 :: (store (s256) into %ir.ptr, align 64)398 BLR8 implicit $lr8, implicit $rm399 400...401---402name: phiPhis403alignment: 16404exposesReturnsTwice: false405legalized: false406regBankSelected: false407selected: false408failedISel: false409tracksRegLiveness: true410hasWinCFI: false411registers:412 - { id: 0, class: gprc_and_gprc_nor0, preferred-register: '' }413 - { id: 1, class: uaccrc, preferred-register: '' }414 - { id: 2, class: uaccrc, preferred-register: '' }415 - { id: 3, class: uaccrc, preferred-register: '' }416 - { id: 4, class: uaccrc, preferred-register: '' }417 - { id: 5, class: uaccrc, preferred-register: '' }418 - { id: 6, class: uaccrc, preferred-register: '' }419 - { id: 7, class: g8rc, preferred-register: '' }420 - { id: 8, class: vrrc, preferred-register: '' }421 - { id: 9, class: g8rc_and_g8rc_nox0, preferred-register: '' }422 - { id: 10, class: gprc_and_gprc_nor0, preferred-register: '' }423 - { id: 11, class: uaccrc, preferred-register: '' }424 - { id: 12, class: crrc, preferred-register: '' }425 - { id: 13, class: uaccrc, preferred-register: '' }426 - { id: 14, class: gprc, preferred-register: '' }427 - { id: 15, class: crrc, preferred-register: '' }428 - { id: 16, class: uaccrc, preferred-register: '' }429 - { id: 17, class: gprc_and_gprc_nor0, preferred-register: '' }430 - { id: 18, class: gprc, preferred-register: '' }431 - { id: 19, class: g8rc, preferred-register: '' }432 - { id: 20, class: g8rc, preferred-register: '' }433 - { id: 21, class: g8rc_and_g8rc_nox0, preferred-register: '' }434 - { id: 22, class: g8rc, preferred-register: '' }435 - { id: 23, class: vsrc, preferred-register: '' }436 - { id: 24, class: accrc, preferred-register: '' }437 - { id: 25, class: accrc, preferred-register: '' }438 - { id: 26, class: accrc, preferred-register: '' }439 - { id: 27, class: accrc, preferred-register: '' }440 - { id: 28, class: accrc, preferred-register: '' }441 - { id: 29, class: accrc, preferred-register: '' }442 - { id: 30, class: accrc, preferred-register: '' }443 - { id: 31, class: accrc, preferred-register: '' }444 - { id: 32, class: accrc, preferred-register: '' }445 - { id: 33, class: crrc, preferred-register: '' }446 - { id: 34, class: gprc, preferred-register: '' }447 - { id: 35, class: g8rc, preferred-register: '' }448 - { id: 36, class: g8rc, preferred-register: '' }449 - { id: 37, class: g8rc_and_g8rc_nox0, preferred-register: '' }450 - { id: 38, class: g8rc, preferred-register: '' }451 - { id: 39, class: vsrc, preferred-register: '' }452 - { id: 40, class: accrc, preferred-register: '' }453 - { id: 41, class: accrc, preferred-register: '' }454 - { id: 42, class: accrc, preferred-register: '' }455 - { id: 43, class: accrc, preferred-register: '' }456 - { id: 44, class: vsrc, preferred-register: '' }457 - { id: 45, class: vsrprc, preferred-register: '' }458 - { id: 46, class: vsrprc, preferred-register: '' }459 - { id: 47, class: vsrc, preferred-register: '' }460 - { id: 48, class: vsrprc, preferred-register: '' }461 - { id: 49, class: vsrprc, preferred-register: '' }462 - { id: 50, class: vsrc, preferred-register: '' }463 - { id: 51, class: vsrprc, preferred-register: '' }464 - { id: 52, class: vsrprc, preferred-register: '' }465 - { id: 53, class: vsrc, preferred-register: '' }466 - { id: 54, class: vsrprc, preferred-register: '' }467liveins:468 - { reg: '$x3', virtual-reg: '%7' }469 - { reg: '$v2', virtual-reg: '%8' }470 - { reg: '$x7', virtual-reg: '%9' }471frameInfo:472 isFrameAddressTaken: false473 isReturnAddressTaken: false474 hasStackMap: false475 hasPatchPoint: false476 stackSize: 0477 offsetAdjustment: 0478 maxAlignment: 1479 adjustsStack: false480 hasCalls: false481 stackProtector: ''482 maxCallFrameSize: 4294967295483 cvBytesOfCalleeSavedRegisters: 0484 hasOpaqueSPAdjustment: false485 hasVAStart: false486 hasMustTailInVarArgFunc: false487 localFrameSize: 0488 savePoint: []489 restorePoint: []490fixedStack: []491stack: []492callSites: []493debugValueSubstitutions: []494constants: []495machineFunctionInfo: {}496body: |497 bb.0.entry:498 successors: %bb.1(0x50000000), %bb.8(0x30000000)499 liveins: $x3, $v2, $x7500 501 %9:g8rc_and_g8rc_nox0 = COPY $x7502 %8:vrrc = COPY $v2503 %7:g8rc = COPY $x3504 %10:gprc_and_gprc_nor0 = COPY %7.sub_32505 %12:crrc = CMPWI %10, 1506 BCC 4, killed %12, %bb.1507 508 bb.8:509 successors: %bb.6(0x80000000)510 511 %11:uaccrc = IMPLICIT_DEF512 B %bb.6513 514 bb.1.for.body.preheader:515 successors: %bb.3(0x40000000), %bb.2(0x40000000)516 517 %14:gprc = ADDI %10, -1518 %0:gprc_and_gprc_nor0 = RLWINM %10, 0, 29, 31519 %13:uaccrc = IMPLICIT_DEF520 %15:crrc = CMPLWI killed %14, 7521 BCC 12, killed %15, %bb.3522 B %bb.2523 524 bb.2.for.body.preheader.new:525 successors: %bb.7(0x80000000)526 527 %17:gprc_and_gprc_nor0 = RLWINM %10, 0, 0, 28528 %18:gprc = ADDI killed %17, -8529 %20:g8rc = IMPLICIT_DEF530 %19:g8rc = INSERT_SUBREG %20, killed %18, %subreg.sub_32531 %21:g8rc_and_g8rc_nox0 = RLWINM8 %19, 29, 3, 31532 %22:g8rc = nuw nsw ADDI8 killed %21, 1533 MTCTR8loop killed %22, implicit-def dead $ctr8534 %16:uaccrc = IMPLICIT_DEF535 B %bb.7536 537 bb.3.for.cond.cleanup.loopexit.unr-lcssa:538 successors: %bb.6(0x30000000), %bb.4(0x50000000)539 540 %1:uaccrc = PHI %13, %bb.1, %6, %bb.7541 %33:crrc = CMPLWI %0, 0542 BCC 76, killed %33, %bb.6543 B %bb.4544 545 bb.4.for.body.epil.preheader:546 successors: %bb.5(0x80000000)547 548 %34:gprc = nsw ADDI %0, -1549 %36:g8rc = IMPLICIT_DEF550 %35:g8rc = INSERT_SUBREG %36, killed %34, %subreg.sub_32551 %37:g8rc_and_g8rc_nox0 = RLDICL killed %35, 0, 32552 %38:g8rc = nuw nsw ADDI8 killed %37, 1553 MTCTR8loop killed %38, implicit-def dead $ctr8554 555 bb.5.for.body.epil:556 successors: %bb.5(0x7c000000), %bb.6(0x04000000)557 ; We check that the PHI node on primed accumulator is inserted after558 ; the label.559 ; CHECK-LABEL: name: phiPhis560 ; CHECK-LABEL: bb.{{[0-9]}}.for.body.epil:561 ; CHECK-NEXT: successors: %bb.{{[0-9]}}(0x{{[0-9a-f]+}}), %bb.{{[0-9]}}(0x{{[0-9a-f]+}})562 ; CHECK-NEXT: {{ }}563 ; CHECK-NEXT: :accrc = PHI564 ; CHECK-NEXT: %2:uaccrc = PHI565 %2:uaccrc = PHI %1, %bb.4, %3, %bb.5566 %39:vsrc = COPY %8567 %41:accrc = COPY %2568 %40:accrc = XVF32GERPP %41, %39, %39569 %3:uaccrc = COPY %40570 BDNZ8 %bb.5, implicit-def dead $ctr8, implicit $ctr8571 B %bb.6572 573 bb.6.for.cond.cleanup:574 %4:uaccrc = PHI %11, %bb.8, %1, %bb.3, %3, %bb.5575 %43:accrc = COPY %4576 %42:accrc = XXMFACC %43577 %44:vsrc = COPY %42.sub_vsx1578 %46:vsrprc = IMPLICIT_DEF579 %45:vsrprc = INSERT_SUBREG %46, killed %44, %subreg.sub_vsx1580 %47:vsrc = COPY %42.sub_vsx0581 %48:vsrprc = INSERT_SUBREG %45, killed %47, %subreg.sub_vsx0582 STXVP killed %48, 96, %9 :: (store (s256) into %ir.add.ptr + 32)583 %49:vsrprc = COPY %42.sub_pair1584 %50:vsrc = COPY %49.sub_vsx1585 %52:vsrprc = IMPLICIT_DEF586 %51:vsrprc = INSERT_SUBREG %52, killed %50, %subreg.sub_vsx1587 %53:vsrc = COPY %49.sub_vsx0588 %54:vsrprc = INSERT_SUBREG %51, killed %53, %subreg.sub_vsx0589 STXVP killed %54, 64, %9 :: (store (s256) into %ir.add.ptr, align 64)590 BLR8 implicit $lr8, implicit $rm591 592 bb.7.for.body:593 successors: %bb.7(0x7c000000), %bb.3(0x04000000)594 595 %5:uaccrc = PHI %16, %bb.2, %6, %bb.7596 %23:vsrc = COPY %8597 %25:accrc = COPY %5598 %24:accrc = XVF32GERPP %25, %23, %23599 %26:accrc = XVF32GERPP %24, %23, %23600 %27:accrc = XVF32GERPP %26, %23, %23601 %28:accrc = XVF32GERPP %27, %23, %23602 %29:accrc = XVF32GERPP %28, %23, %23603 %30:accrc = XVF32GERPP %29, %23, %23604 %31:accrc = XVF32GERPP %30, %23, %23605 %32:accrc = XVF32GERPP %31, %23, %23606 %6:uaccrc = COPY %32607 BDNZ8 %bb.7, implicit-def dead $ctr8, implicit $ctr8608 B %bb.3609 610...611---612name: phiCycle613alignment: 16614exposesReturnsTwice: false615legalized: false616regBankSelected: false617selected: false618failedISel: false619tracksRegLiveness: true620hasWinCFI: false621registers:622 - { id: 0, class: gprc_and_gprc_nor0, preferred-register: '' }623 - { id: 1, class: uaccrc, preferred-register: '' }624 - { id: 2, class: uaccrc, preferred-register: '' }625 - { id: 3, class: uaccrc, preferred-register: '' }626 - { id: 4, class: uaccrc, preferred-register: '' }627 - { id: 5, class: uaccrc, preferred-register: '' }628 - { id: 6, class: uaccrc, preferred-register: '' }629 - { id: 7, class: g8rc, preferred-register: '' }630 - { id: 8, class: vrrc, preferred-register: '' }631 - { id: 9, class: g8rc_and_g8rc_nox0, preferred-register: '' }632 - { id: 10, class: gprc_and_gprc_nor0, preferred-register: '' }633 - { id: 11, class: uaccrc, preferred-register: '' }634 - { id: 12, class: crrc, preferred-register: '' }635 - { id: 13, class: uaccrc, preferred-register: '' }636 - { id: 14, class: gprc, preferred-register: '' }637 - { id: 15, class: crrc, preferred-register: '' }638 - { id: 16, class: uaccrc, preferred-register: '' }639 - { id: 17, class: gprc_and_gprc_nor0, preferred-register: '' }640 - { id: 18, class: gprc, preferred-register: '' }641 - { id: 19, class: g8rc, preferred-register: '' }642 - { id: 20, class: g8rc, preferred-register: '' }643 - { id: 21, class: g8rc_and_g8rc_nox0, preferred-register: '' }644 - { id: 22, class: g8rc, preferred-register: '' }645 - { id: 23, class: vsrc, preferred-register: '' }646 - { id: 24, class: accrc, preferred-register: '' }647 - { id: 25, class: accrc, preferred-register: '' }648 - { id: 26, class: accrc, preferred-register: '' }649 - { id: 27, class: accrc, preferred-register: '' }650 - { id: 28, class: accrc, preferred-register: '' }651 - { id: 29, class: accrc, preferred-register: '' }652 - { id: 30, class: accrc, preferred-register: '' }653 - { id: 31, class: accrc, preferred-register: '' }654 - { id: 32, class: accrc, preferred-register: '' }655 - { id: 33, class: crrc, preferred-register: '' }656 - { id: 34, class: gprc, preferred-register: '' }657 - { id: 35, class: g8rc, preferred-register: '' }658 - { id: 36, class: g8rc, preferred-register: '' }659 - { id: 37, class: g8rc_and_g8rc_nox0, preferred-register: '' }660 - { id: 38, class: g8rc, preferred-register: '' }661 - { id: 39, class: vsrc, preferred-register: '' }662 - { id: 40, class: accrc, preferred-register: '' }663 - { id: 41, class: accrc, preferred-register: '' }664 - { id: 42, class: accrc, preferred-register: '' }665 - { id: 43, class: accrc, preferred-register: '' }666 - { id: 44, class: vsrc, preferred-register: '' }667 - { id: 45, class: vsrprc, preferred-register: '' }668 - { id: 46, class: vsrprc, preferred-register: '' }669 - { id: 47, class: vsrc, preferred-register: '' }670 - { id: 48, class: vsrprc, preferred-register: '' }671 - { id: 49, class: vsrprc, preferred-register: '' }672 - { id: 50, class: vsrc, preferred-register: '' }673 - { id: 51, class: vsrprc, preferred-register: '' }674 - { id: 52, class: vsrprc, preferred-register: '' }675 - { id: 53, class: vsrc, preferred-register: '' }676 - { id: 54, class: vsrprc, preferred-register: '' }677 - { id: 55, class: crrc, preferred-register: '' }678liveins:679 - { reg: '$x3', virtual-reg: '%7' }680 - { reg: '$v2', virtual-reg: '%8' }681 - { reg: '$x7', virtual-reg: '%9' }682frameInfo:683 isFrameAddressTaken: false684 isReturnAddressTaken: false685 hasStackMap: false686 hasPatchPoint: false687 stackSize: 0688 offsetAdjustment: 0689 maxAlignment: 1690 adjustsStack: false691 hasCalls: false692 stackProtector: ''693 maxCallFrameSize: 4294967295694 cvBytesOfCalleeSavedRegisters: 0695 hasOpaqueSPAdjustment: false696 hasVAStart: false697 hasMustTailInVarArgFunc: false698 localFrameSize: 0699 savePoint: []700 restorePoint: []701fixedStack: []702stack: []703callSites: []704debugValueSubstitutions: []705constants: []706machineFunctionInfo: {}707body: |708 bb.0.entry:709 successors: %bb.1(0x50000000), %bb.8(0x30000000)710 liveins: $x3, $v2, $x7711 712 %9:g8rc_and_g8rc_nox0 = COPY $x7713 %8:vrrc = COPY $v2714 %7:g8rc = COPY $x3715 %10:gprc_and_gprc_nor0 = COPY %7.sub_32716 %12:crrc = CMPWI %10, 1717 BCC 4, killed %12, %bb.1718 719 bb.8:720 successors: %bb.6(0x80000000)721 722 %11:uaccrc = IMPLICIT_DEF723 B %bb.6724 725 bb.1.for.body.preheader:726 successors: %bb.3(0x40000000), %bb.2(0x40000000)727 728 %14:gprc = ADDI %10, -1729 %0:gprc_and_gprc_nor0 = RLWINM %10, 0, 29, 31730 %13:uaccrc = IMPLICIT_DEF731 %15:crrc = CMPLWI %14, 7732 BCC 12, killed %15, %bb.3733 B %bb.2734 735 bb.2.for.body.preheader.new:736 successors: %bb.7(0x80000000)737 738 %17:gprc_and_gprc_nor0 = RLWINM %10, 0, 0, 28739 %18:gprc = ADDI killed %17, -8740 %20:g8rc = IMPLICIT_DEF741 %19:g8rc = INSERT_SUBREG %20, killed %18, %subreg.sub_32742 %21:g8rc_and_g8rc_nox0 = RLWINM8 %19, 29, 3, 31743 %22:g8rc = nuw nsw ADDI8 killed %21, 1744 MTCTR8loop killed %22, implicit-def dead $ctr8745 %16:uaccrc = IMPLICIT_DEF746 B %bb.7747 748 bb.3.for.cond.cleanup.loopexit.unr-lcssa:749 successors: %bb.6(0x30000000), %bb.4(0x50000000)750 ; We check that no phi node is inserted in the block.751 ; CHECK-LABEL: name: phiCycle752 ; CHECK-LABEL: bb.{{[0-9]}}.for.cond.cleanup.loopexit.unr-lcssa:753 ; CHECK-NEXT: successors: %bb.{{[0-9]}}(0x{{[0-9a-f]+}}), %bb.{{[0-9]}}(0x{{[0-9a-f]+}})754 ; CHECK-NEXT: {{ }}755 ; CHECK-NEXT: %1:uaccrc = PHI756 ; CHECK-NEXT: %33:crrc757 %1:uaccrc = PHI %13, %bb.1, %6, %bb.7, %2, %bb.5758 %33:crrc = CMPLWI %0, 0759 BCC 76, killed %33, %bb.6760 B %bb.4761 762 bb.4.for.body.epil.preheader:763 successors: %bb.5(0x80000000)764 765 %34:gprc = nsw ADDI %0, -1766 %36:g8rc = IMPLICIT_DEF767 %35:g8rc = INSERT_SUBREG %36, killed %34, %subreg.sub_32768 %37:g8rc_and_g8rc_nox0 = RLDICL killed %35, 0, 32769 %38:g8rc = nuw nsw ADDI8 killed %37, 1770 MTCTR8loop killed %38, implicit-def dead $ctr8771 B %bb.5772 773 bb.5.for.body.epil:774 successors: %bb.3(0x40000000), %bb.5(0x7c000000)775 ; We check that no [u]acc phi node is inserted in the block.776 ; CHECK-LABEL: bb.{{[0-9]}}.for.body.epil:777 ; CHECK-NEXT: successors: %bb.{{[0-9]}}(0x{{[0-9a-f]+}}), %bb.{{[0-9]}}(0x{{[0-9a-f]+}})778 ; CHECK-NOT: uaccrc = PHI779 ; CHECK-NOT: accrc = PHI780 ; CHECK: %2:uaccrc = PHI781 ; CHECK-NEXT: %39:vsrc782 %2:uaccrc = PHI %1, %bb.4, %3, %bb.5783 %39:vsrc = COPY %8784 %41:accrc = COPY %2785 %40:accrc = XVF32GERPP %41, %39, %39786 %3:uaccrc = COPY %40787 %55:crrc = CMPLWI %14, 7788 BCC 12, killed %55, %bb.5789 B %bb.3790 791 bb.6.for.cond.cleanup:792 %4:uaccrc = PHI %11, %bb.8, %1, %bb.3793 %43:accrc = COPY %4794 %42:accrc = XXMFACC %43795 %44:vsrc = COPY %42.sub_vsx1796 %46:vsrprc = IMPLICIT_DEF797 %45:vsrprc = INSERT_SUBREG %46, killed %44, %subreg.sub_vsx1798 %47:vsrc = COPY %42.sub_vsx0799 %48:vsrprc = INSERT_SUBREG %45, killed %47, %subreg.sub_vsx0800 STXVP killed %48, 96, %9 :: (store (s256) into %ir.add.ptr + 32)801 %49:vsrprc = COPY %42.sub_pair1802 %50:vsrc = COPY %49.sub_vsx1803 %52:vsrprc = IMPLICIT_DEF804 %51:vsrprc = INSERT_SUBREG %52, killed %50, %subreg.sub_vsx1805 %53:vsrc = COPY %49.sub_vsx0806 %54:vsrprc = INSERT_SUBREG %51, killed %53, %subreg.sub_vsx0807 STXVP killed %54, 64, %9 :: (store (s256) into %ir.add.ptr, align 64)808 BLR8 implicit $lr8, implicit $rm809 810 bb.7.for.body:811 successors: %bb.7(0x7c000000), %bb.3(0x04000000)812 813 %5:uaccrc = PHI %16, %bb.2, %6, %bb.7814 %23:vsrc = COPY %8815 %25:accrc = COPY %5816 %24:accrc = XVF32GERPP %25, %23, %23817 %26:accrc = XVF32GERPP %24, %23, %23818 %27:accrc = XVF32GERPP %26, %23, %23819 %28:accrc = XVF32GERPP %27, %23, %23820 %29:accrc = XVF32GERPP %28, %23, %23821 %30:accrc = XVF32GERPP %29, %23, %23822 %31:accrc = XVF32GERPP %30, %23, %23823 %32:accrc = XVF32GERPP %31, %23, %23824 %6:uaccrc = COPY %32825 BDNZ8 %bb.7, implicit-def dead $ctr8, implicit $ctr8826 B %bb.3827 828...829