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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple powerpc64-ibm-aix-xcoff -mcpu=pwr10 -verify-machineinstrs \3; RUN:     < %s | FileCheck %s --check-prefix=AIX4; RUN: llc -mtriple powerpc-ibm-aix-xcoff -mcpu=pwr10 -verify-machineinstrs \5; RUN:     < %s | FileCheck %s --check-prefix=AIX-326; RUN: llc -verify-machineinstrs -mtriple powerpc64le-unknown-linux-gnu \7; RUN:     -mcpu=pwr10 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \8; RUN:    | FileCheck %s --check-prefix=LE9; RUN: llc -verify-machineinstrs -mtriple powerpcle-unknown-linux-gnu \10; RUN:     -mcpu=pwr10 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \11; RUN:    | FileCheck %s --check-prefix=LE-3212; RUN: llc -verify-machineinstrs -mtriple powerpc64-unknown-linux-gnu \13; RUN:     -mcpu=pwr10 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \14; RUN:    | FileCheck %s --check-prefix=BE15; RUN: llc -verify-machineinstrs -mtriple powerpc-unknown-linux-gnu \16; RUN:     -mcpu=pwr10 -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s \17; RUN:    | FileCheck %s --check-prefix=BE-3218 19 20; Function Attrs: nounwind21define dso_local <4 x i16> @shufflevector_combine(<4 x i32> %0) #0 {22; AIX-LABEL: shufflevector_combine:23; AIX:       # %bb.0: # %newFuncRoot24; AIX-NEXT:    ld 3, L..C0(2) # %const.025; AIX-NEXT:    xxlxor 1, 1, 126; AIX-NEXT:    lxv 0, 0(3)27; AIX-NEXT:    li 3, 028; AIX-NEXT:    xxperm 34, 1, 029; AIX-NEXT:    vinsw 2, 3, 830; AIX-NEXT:    vpkuwum 2, 2, 231; AIX-NEXT:    blr32;33; AIX-32-LABEL: shufflevector_combine:34; AIX-32:       # %bb.0: # %newFuncRoot35; AIX-32-NEXT:    lwz 3, L..C0(2) # %const.036; AIX-32-NEXT:    xxlxor 1, 1, 137; AIX-32-NEXT:    lxv 0, 0(3)38; AIX-32-NEXT:    li 3, 039; AIX-32-NEXT:    xxperm 34, 1, 040; AIX-32-NEXT:    vinsw 2, 3, 841; AIX-32-NEXT:    vpkuwum 2, 2, 242; AIX-32-NEXT:    blr43;44; LE-LABEL: shufflevector_combine:45; LE:       # %bb.0: # %newFuncRoot46; LE-NEXT:    plxv vs0, .LCPI0_0@PCREL(0), 147; LE-NEXT:    xxlxor v3, v3, v348; LE-NEXT:    li r3, 049; LE-NEXT:    xxperm v3, v2, vs050; LE-NEXT:    vinsw v3, r3, 451; LE-NEXT:    vpkuwum v2, v3, v352; LE-NEXT:    blr53;54; LE-32-LABEL: shufflevector_combine:55; LE-32:       # %bb.0: # %newFuncRoot56; LE-32-NEXT:    li r3, .LCPI0_0@l57; LE-32-NEXT:    lis r4, .LCPI0_0@ha58; LE-32-NEXT:    xxlxor v3, v3, v359; LE-32-NEXT:    lxvx vs0, r4, r360; LE-32-NEXT:    li r3, 061; LE-32-NEXT:    xxperm v3, v2, vs062; LE-32-NEXT:    vinsw v3, r3, 463; LE-32-NEXT:    vpkuwum v2, v3, v364; LE-32-NEXT:    blr65;66; BE-LABEL: shufflevector_combine:67; BE:       # %bb.0: # %newFuncRoot68; BE-NEXT:    addis r3, r2, .LCPI0_0@toc@ha69; BE-NEXT:    xxlxor vs1, vs1, vs170; BE-NEXT:    addi r3, r3, .LCPI0_0@toc@l71; BE-NEXT:    lxv vs0, 0(r3)72; BE-NEXT:    li r3, 073; BE-NEXT:    xxperm v2, vs1, vs074; BE-NEXT:    vinsw v2, r3, 875; BE-NEXT:    vpkuwum v2, v2, v276; BE-NEXT:    blr77;78; BE-32-LABEL: shufflevector_combine:79; BE-32:       # %bb.0: # %newFuncRoot80; BE-32-NEXT:    li r3, .LCPI0_0@l81; BE-32-NEXT:    lis r4, .LCPI0_0@ha82; BE-32-NEXT:    xxlxor vs1, vs1, vs183; BE-32-NEXT:    lxvx vs0, r4, r384; BE-32-NEXT:    li r3, 085; BE-32-NEXT:    xxperm v2, vs1, vs086; BE-32-NEXT:    vinsw v2, r3, 887; BE-32-NEXT:    vpkuwum v2, v2, v288; BE-32-NEXT:    blr89newFuncRoot:90  %1 = shufflevector <4 x i32> zeroinitializer, <4 x i32> %0, <4 x i32> <i32 0, i32 7, i32 undef, i32 6>91  %2 = insertelement <4 x i32> %1, i32 0, i64 292  %3 = trunc <4 x i32> %2 to <4 x i16>93  ret <4 x i16> %394}95 96attributes #0 = { nounwind }97