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1; RUN: llc -verify-machineinstrs -mcpu=pwr7 -O3 < %s | FileCheck %s2 3; Test case derived from bug report 15031. The code in the post-RA4; scheduler to break critical anti-dependencies was failing to check5; whether an instruction had more than one definition, and ensuring6; that any additional definitions interfered with the choice of a new7; register. As a result, this test originally caused this to be8; generated:9;10; lbzu 3, 1(3)11;12; which is illegal, since it requires register 3 to both receive the13; loaded value and receive the updated address. With the fix to bug14; 15031, a different register is chosen to receive the loaded value.15 16target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"17target triple = "powerpc64-unknown-linux-gnu"18 19%"class.llvm::MachineMemOperand" = type { %"struct.llvm::MachinePointerInfo", i64, i32, ptr, ptr }20%"struct.llvm::MachinePointerInfo" = type { ptr, i64 }21%"class.llvm::Value" = type { ptr, i8, i8, i16, ptr, ptr, ptr }22%"class.llvm::Type" = type { ptr, i32, i32, ptr }23%"class.llvm::LLVMContext" = type { ptr }24%"class.llvm::LLVMContextImpl" = type opaque25%"class.llvm::Use" = type { ptr, ptr, %"class.llvm::PointerIntPair" }26%"class.llvm::PointerIntPair" = type { i64 }27%"class.llvm::StringMapEntry" = type opaque28%"class.llvm::MDNode" = type { %"class.llvm::Value", %"class.llvm::FoldingSetImpl::Node", i32, i32 }29%"class.llvm::FoldingSetImpl::Node" = type { ptr }30%"class.llvm::MachineInstr" = type { %"class.llvm::ilist_node", ptr, ptr, ptr, i32, %"class.llvm::ArrayRecycler<llvm::MachineOperand, 8>::Capacity", i8, i8, i8, ptr, %"class.llvm::DebugLoc" }31%"class.llvm::ilist_node" = type { %"class.llvm::ilist_half_node", ptr }32%"class.llvm::ilist_half_node" = type { ptr }33%"class.llvm::MCInstrDesc" = type { i16, i16, i16, i16, i16, i32, i64, ptr, ptr, ptr }34%"class.llvm::MCOperandInfo" = type { i16, i8, i8, i32 }35%"class.llvm::MachineBasicBlock" = type { %"class.llvm::ilist_node.0", %"struct.llvm::ilist", ptr, i32, ptr, %"class.std::vector.163", %"class.std::vector.163", %"class.std::vector.123", %"class.std::vector.123", i32, i8, i8 }36%"class.llvm::ilist_node.0" = type { %"class.llvm::ilist_half_node.1", ptr }37%"class.llvm::ilist_half_node.1" = type { ptr }38%"struct.llvm::ilist" = type { %"class.llvm::iplist" }39%"class.llvm::iplist" = type { %"struct.llvm::ilist_traits", ptr }40%"struct.llvm::ilist_traits" = type { %"class.llvm::ilist_half_node", ptr }41%"class.llvm::BasicBlock" = type { %"class.llvm::Value", %"class.llvm::ilist_node.2", %"class.llvm::iplist.4", ptr }42%"class.llvm::ilist_node.2" = type { %"class.llvm::ilist_half_node.3", ptr }43%"class.llvm::ilist_half_node.3" = type { ptr }44%"class.llvm::iplist.4" = type { %"struct.llvm::ilist_traits.5", ptr }45%"struct.llvm::ilist_traits.5" = type { %"class.llvm::ilist_half_node.10" }46%"class.llvm::ilist_half_node.10" = type { ptr }47%"class.llvm::Instruction" = type { %"class.llvm::User", %"class.llvm::ilist_node.193", ptr, %"class.llvm::DebugLoc" }48%"class.llvm::User" = type { %"class.llvm::Value", ptr, i32 }49%"class.llvm::ilist_node.193" = type { %"class.llvm::ilist_half_node.10", ptr }50%"class.llvm::DebugLoc" = type { i32, i32 }51%"class.llvm::Function" = type { %"class.llvm::GlobalValue", %"class.llvm::ilist_node.27", %"class.llvm::iplist.47", %"class.llvm::iplist.54", ptr, %"class.llvm::AttributeSet" }52%"class.llvm::GlobalValue" = type { [52 x i8], [4 x i8], ptr, %"class.std::basic_string" }53%"class.llvm::Module" = type { ptr, %"class.llvm::iplist.11", %"class.llvm::iplist.20", %"class.llvm::iplist.29", %"struct.llvm::ilist.38", %"class.std::basic_string", ptr, %"class.llvm::OwningPtr", %"class.std::basic_string", %"class.std::basic_string", %"class.std::basic_string", ptr }54%"class.llvm::iplist.11" = type { %"struct.llvm::ilist_traits.12", ptr }55%"struct.llvm::ilist_traits.12" = type { %"class.llvm::ilist_node.18" }56%"class.llvm::ilist_node.18" = type { %"class.llvm::ilist_half_node.19", ptr }57%"class.llvm::ilist_half_node.19" = type { ptr }58%"class.llvm::GlobalVariable" = type { %"class.llvm::GlobalValue", %"class.llvm::ilist_node.18", i8 }59%"class.llvm::iplist.20" = type { %"struct.llvm::ilist_traits.21", ptr }60%"struct.llvm::ilist_traits.21" = type { %"class.llvm::ilist_node.27" }61%"class.llvm::ilist_node.27" = type { %"class.llvm::ilist_half_node.28", ptr }62%"class.llvm::ilist_half_node.28" = type { ptr }63%"class.llvm::iplist.29" = type { %"struct.llvm::ilist_traits.30", ptr }64%"struct.llvm::ilist_traits.30" = type { %"class.llvm::ilist_node.36" }65%"class.llvm::ilist_node.36" = type { %"class.llvm::ilist_half_node.37", ptr }66%"class.llvm::ilist_half_node.37" = type { ptr }67%"class.llvm::GlobalAlias" = type { %"class.llvm::GlobalValue", %"class.llvm::ilist_node.36" }68%"struct.llvm::ilist.38" = type { %"class.llvm::iplist.39" }69%"class.llvm::iplist.39" = type { %"struct.llvm::ilist_traits.40", ptr }70%"struct.llvm::ilist_traits.40" = type { %"class.llvm::ilist_node.45" }71%"class.llvm::ilist_node.45" = type { %"class.llvm::ilist_half_node.46", ptr }72%"class.llvm::ilist_half_node.46" = type { ptr }73%"class.llvm::NamedMDNode" = type { %"class.llvm::ilist_node.45", %"class.std::basic_string", ptr, ptr }74%"class.std::basic_string" = type { %"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" }75%"struct.std::basic_string<char, std::char_traits<char>, std::allocator<char> >::_Alloc_hider" = type { ptr }76%"class.llvm::ValueSymbolTable" = type opaque77%"class.llvm::OwningPtr" = type { ptr }78%"class.llvm::GVMaterializer" = type opaque79%"class.llvm::iplist.47" = type { %"struct.llvm::ilist_traits.48", ptr }80%"struct.llvm::ilist_traits.48" = type { %"class.llvm::ilist_half_node.3" }81%"class.llvm::iplist.54" = type { %"struct.llvm::ilist_traits.55", ptr }82%"struct.llvm::ilist_traits.55" = type { %"class.llvm::ilist_half_node.61" }83%"class.llvm::ilist_half_node.61" = type { ptr }84%"class.llvm::Argument" = type { %"class.llvm::Value", %"class.llvm::ilist_node.192", ptr }85%"class.llvm::ilist_node.192" = type { %"class.llvm::ilist_half_node.61", ptr }86%"class.llvm::AttributeSet" = type { ptr }87%"class.llvm::AttributeSetImpl" = type opaque88%"class.llvm::MachineFunction" = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %"class.std::vector.163", %"class.llvm::BumpPtrAllocator", %"class.llvm::Recycler", %"class.llvm::ArrayRecycler", %"class.llvm::Recycler.180", %"struct.llvm::ilist.181", i32, i32, i8 }89%"class.llvm::TargetMachine" = type { ptr, ptr, %"class.std::basic_string", %"class.std::basic_string", %"class.std::basic_string", ptr, ptr, i8, %"class.llvm::TargetOptions" }90%"class.llvm::Target" = type opaque91%"class.llvm::MCCodeGenInfo" = type opaque92%"class.llvm::MCAsmInfo" = type opaque93%"class.llvm::TargetOptions" = type { [2 x i8], i32, i8, i32, i8, %"class.std::basic_string", i32, i32 }94%"class.llvm::MCContext" = type { ptr, ptr, ptr, ptr, %"class.llvm::BumpPtrAllocator", %"class.llvm::StringMap", %"class.llvm::StringMap.62", i32, %"class.llvm::DenseMap.63", ptr, ptr, i8, %"class.std::basic_string", %"class.std::basic_string", %"class.std::vector", %"class.std::vector.70", %"class.llvm::MCDwarfLoc", i8, i8, i32, ptr, ptr, ptr, %"class.std::vector.75", %"class.llvm::StringRef", %"class.llvm::StringRef", i8, %"class.llvm::DenseMap.80", %"class.std::vector.84", ptr, ptr, ptr, i8 }95%"class.llvm::SourceMgr" = type opaque96%"class.llvm::MCRegisterInfo" = type { ptr, i32, i32, i32, ptr, i32, i32, ptr, ptr, ptr, ptr, i32, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, %"class.llvm::DenseMap" }97%"struct.llvm::MCRegisterDesc" = type { i32, i32, i32, i32, i32, i32 }98%"class.llvm::MCRegisterClass" = type { ptr, ptr, ptr, i16, i16, i16, i16, i16, i8, i8 }99%"struct.llvm::MCRegisterInfo::DwarfLLVMRegPair" = type { i32, i32 }100%"class.llvm::DenseMap" = type { ptr, i32, i32, i32 }101%"struct.std::pair" = type { i32, i32 }102%"class.llvm::MCObjectFileInfo" = type opaque103%"class.llvm::BumpPtrAllocator" = type { i64, i64, ptr, ptr, ptr, ptr, i64 }104%"class.llvm::SlabAllocator" = type { ptr }105%"class.llvm::MemSlab" = type { i64, ptr }106%"class.llvm::StringMap" = type { %"class.llvm::StringMapImpl", ptr }107%"class.llvm::StringMapImpl" = type { ptr, i32, i32, i32, i32 }108%"class.llvm::StringMapEntryBase" = type { i32 }109%"class.llvm::StringMap.62" = type { %"class.llvm::StringMapImpl", ptr }110%"class.llvm::DenseMap.63" = type { ptr, i32, i32, i32 }111%"struct.std::pair.66" = type opaque112%"class.llvm::raw_ostream" = type { ptr, ptr, ptr, ptr, i32 }113%"class.std::vector" = type { %"struct.std::_Vector_base" }114%"struct.std::_Vector_base" = type { %"struct.std::_Vector_base<llvm::MCDwarfFile *, std::allocator<llvm::MCDwarfFile *> >::_Vector_impl" }115%"struct.std::_Vector_base<llvm::MCDwarfFile *, std::allocator<llvm::MCDwarfFile *> >::_Vector_impl" = type { ptr, ptr, ptr }116%"class.llvm::MCDwarfFile" = type { %"class.llvm::StringRef", i32 }117%"class.llvm::StringRef" = type { ptr, i64 }118%"class.std::vector.70" = type { %"struct.std::_Vector_base.71" }119%"struct.std::_Vector_base.71" = type { %"struct.std::_Vector_base<llvm::StringRef, std::allocator<llvm::StringRef> >::_Vector_impl" }120%"struct.std::_Vector_base<llvm::StringRef, std::allocator<llvm::StringRef> >::_Vector_impl" = type { ptr, ptr, ptr }121%"class.llvm::MCDwarfLoc" = type { i32, i32, i32, i32, i32, i32 }122%"class.llvm::MCSection" = type opaque123%"class.llvm::MCSymbol" = type { %"class.llvm::StringRef", ptr, ptr, i8 }124%"class.llvm::MCExpr" = type opaque125%"class.std::vector.75" = type { %"struct.std::_Vector_base.76" }126%"struct.std::_Vector_base.76" = type { %"struct.std::_Vector_base<const llvm::MCGenDwarfLabelEntry *, std::allocator<const llvm::MCGenDwarfLabelEntry *> >::_Vector_impl" }127%"struct.std::_Vector_base<const llvm::MCGenDwarfLabelEntry *, std::allocator<const llvm::MCGenDwarfLabelEntry *> >::_Vector_impl" = type { ptr, ptr, ptr }128%"class.llvm::MCGenDwarfLabelEntry" = type { %"class.llvm::StringRef", i32, i32, ptr }129%"class.llvm::DenseMap.80" = type { ptr, i32, i32, i32 }130%"struct.std::pair.83" = type { ptr, ptr }131%"class.llvm::MCLineSection" = type { %"class.std::vector.215" }132%"class.std::vector.215" = type { %"struct.std::_Vector_base.216" }133%"struct.std::_Vector_base.216" = type { %"struct.std::_Vector_base<llvm::MCLineEntry, std::allocator<llvm::MCLineEntry> >::_Vector_impl" }134%"struct.std::_Vector_base<llvm::MCLineEntry, std::allocator<llvm::MCLineEntry> >::_Vector_impl" = type { ptr, ptr, ptr }135%"class.llvm::MCLineEntry" = type { %"class.llvm::MCDwarfLoc", ptr }136%"class.std::vector.84" = type { %"struct.std::_Vector_base.85" }137%"struct.std::_Vector_base.85" = type { %"struct.std::_Vector_base<const llvm::MCSection *, std::allocator<const llvm::MCSection *> >::_Vector_impl" }138%"struct.std::_Vector_base<const llvm::MCSection *, std::allocator<const llvm::MCSection *> >::_Vector_impl" = type { ptr, ptr, ptr }139%"class.llvm::MachineModuleInfo" = type { %"class.llvm::ImmutablePass", %"class.llvm::MCContext", ptr, ptr, %"class.std::vector.95", i32, %"class.std::vector.100", %"class.llvm::DenseMap.110", %"class.llvm::DenseMap.114", i32, %"class.std::vector.118", %"class.std::vector.123", %"class.std::vector.123", %"class.std::vector.128", %"class.llvm::SmallPtrSet", ptr, i8, i8, i8, i8, %"class.llvm::SmallVector.133" }140%"class.llvm::ImmutablePass" = type { %"class.llvm::ModulePass" }141%"class.llvm::ModulePass" = type { %"class.llvm::Pass" }142%"class.llvm::Pass" = type { ptr, ptr, ptr, i32 }143%"class.llvm::AnalysisResolver" = type { %"class.std::vector.89", ptr }144%"class.std::vector.89" = type { %"struct.std::_Vector_base.90" }145%"struct.std::_Vector_base.90" = type { %"struct.std::_Vector_base<std::pair<const ptr, llvm::Pass *>, std::allocator<std::pair<const ptr, llvm::Pass *> > >::_Vector_impl" }146%"struct.std::_Vector_base<std::pair<const ptr, llvm::Pass *>, std::allocator<std::pair<const ptr, llvm::Pass *> > >::_Vector_impl" = type { ptr, ptr, ptr }147%"struct.std::pair.94" = type { ptr, ptr }148%"class.llvm::PMDataManager" = type opaque149%"class.llvm::MachineModuleInfoImpl" = type { ptr }150%"class.std::vector.95" = type { %"struct.std::_Vector_base.96" }151%"struct.std::_Vector_base.96" = type { %"struct.std::_Vector_base<llvm::MachineMove, std::allocator<llvm::MachineMove> >::_Vector_impl" }152%"struct.std::_Vector_base<llvm::MachineMove, std::allocator<llvm::MachineMove> >::_Vector_impl" = type { ptr, ptr, ptr }153%"class.llvm::MachineMove" = type { ptr, %"class.llvm::MachineLocation", %"class.llvm::MachineLocation" }154%"class.llvm::MachineLocation" = type { i8, i32, i32 }155%"class.std::vector.100" = type { %"struct.std::_Vector_base.101" }156%"struct.std::_Vector_base.101" = type { %"struct.std::_Vector_base<llvm::LandingPadInfo, std::allocator<llvm::LandingPadInfo> >::_Vector_impl" }157%"struct.std::_Vector_base<llvm::LandingPadInfo, std::allocator<llvm::LandingPadInfo> >::_Vector_impl" = type { ptr, ptr, ptr }158%"struct.llvm::LandingPadInfo" = type { ptr, %"class.llvm::SmallVector", %"class.llvm::SmallVector", ptr, ptr, %"class.std::vector.105" }159%"class.llvm::SmallVector" = type { %"class.llvm::SmallVectorImpl", %"struct.llvm::SmallVectorStorage" }160%"class.llvm::SmallVectorImpl" = type { %"class.llvm::SmallVectorTemplateBase" }161%"class.llvm::SmallVectorTemplateBase" = type { %"class.llvm::SmallVectorTemplateCommon" }162%"class.llvm::SmallVectorTemplateCommon" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion" }163%"class.llvm::SmallVectorBase" = type { ptr, ptr, ptr }164%"struct.llvm::AlignedCharArrayUnion" = type { %"struct.llvm::AlignedCharArray" }165%"struct.llvm::AlignedCharArray" = type { [8 x i8] }166%"struct.llvm::SmallVectorStorage" = type { i8 }167%"class.std::vector.105" = type { %"struct.std::_Vector_base.106" }168%"struct.std::_Vector_base.106" = type { %"struct.std::_Vector_base<int, std::allocator<int> >::_Vector_impl" }169%"struct.std::_Vector_base<int, std::allocator<int> >::_Vector_impl" = type { ptr, ptr, ptr }170%"class.llvm::DenseMap.110" = type { ptr, i32, i32, i32 }171%"struct.std::pair.113" = type { ptr, %"class.llvm::SmallVector.206" }172%"class.llvm::SmallVector.206" = type { [28 x i8], %"struct.llvm::SmallVectorStorage.207" }173%"struct.llvm::SmallVectorStorage.207" = type { [3 x %"struct.llvm::AlignedCharArrayUnion.198"] }174%"struct.llvm::AlignedCharArrayUnion.198" = type { %"struct.llvm::AlignedCharArray.199" }175%"struct.llvm::AlignedCharArray.199" = type { [4 x i8] }176%"class.llvm::DenseMap.114" = type { ptr, i32, i32, i32 }177%"struct.std::pair.117" = type { ptr, i32 }178%"class.std::vector.118" = type { %"struct.std::_Vector_base.119" }179%"struct.std::_Vector_base.119" = type { %"struct.std::_Vector_base<const llvm::GlobalVariable *, std::allocator<const llvm::GlobalVariable *> >::_Vector_impl" }180%"struct.std::_Vector_base<const llvm::GlobalVariable *, std::allocator<const llvm::GlobalVariable *> >::_Vector_impl" = type { ptr, ptr, ptr }181%"class.std::vector.123" = type { %"struct.std::_Vector_base.124" }182%"struct.std::_Vector_base.124" = type { %"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int> >::_Vector_impl" }183%"struct.std::_Vector_base<unsigned int, std::allocator<unsigned int> >::_Vector_impl" = type { ptr, ptr, ptr }184%"class.std::vector.128" = type { %"struct.std::_Vector_base.129" }185%"struct.std::_Vector_base.129" = type { %"struct.std::_Vector_base<const llvm::Function *, std::allocator<const llvm::Function *> >::_Vector_impl" }186%"struct.std::_Vector_base<const llvm::Function *, std::allocator<const llvm::Function *> >::_Vector_impl" = type { ptr, ptr, ptr }187%"class.llvm::SmallPtrSet" = type { %"class.llvm::SmallPtrSetImpl", [33 x ptr] }188%"class.llvm::SmallPtrSetImpl" = type { ptr, ptr, i32, i32, i32 }189%"class.llvm::MMIAddrLabelMap" = type opaque190%"class.llvm::SmallVector.133" = type { %"class.llvm::SmallVectorImpl.134", %"struct.llvm::SmallVectorStorage.139" }191%"class.llvm::SmallVectorImpl.134" = type { %"class.llvm::SmallVectorTemplateBase.135" }192%"class.llvm::SmallVectorTemplateBase.135" = type { %"class.llvm::SmallVectorTemplateCommon.136" }193%"class.llvm::SmallVectorTemplateCommon.136" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.137" }194%"struct.llvm::AlignedCharArrayUnion.137" = type { %"struct.llvm::AlignedCharArray.138" }195%"struct.llvm::AlignedCharArray.138" = type { [40 x i8] }196%"struct.llvm::SmallVectorStorage.139" = type { [3 x %"struct.llvm::AlignedCharArrayUnion.137"] }197%"class.llvm::GCModuleInfo" = type opaque198%"class.llvm::MachineRegisterInfo" = type { ptr, i8, i8, %"class.llvm::IndexedMap", %"class.llvm::IndexedMap.146", ptr, %"class.llvm::BitVector", %"class.llvm::BitVector", %"class.llvm::BitVector", %"class.std::vector.147", %"class.std::vector.123" }199%"class.llvm::TargetRegisterInfo" = type { ptr, %"class.llvm::MCRegisterInfo", ptr, ptr, ptr, ptr, ptr }200%"struct.llvm::TargetRegisterInfoDesc" = type { i32, i8 }201%"class.llvm::TargetRegisterClass" = type { ptr, ptr, ptr, ptr, ptr, ptr }202%"class.llvm::ArrayRef" = type { ptr, i64 }203%"class.llvm::IndexedMap" = type { %"class.std::vector.140", %"struct.std::pair.145", %"struct.llvm::VirtReg2IndexFunctor" }204%"class.std::vector.140" = type { %"struct.std::_Vector_base.141" }205%"struct.std::_Vector_base.141" = type { %"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass *, llvm::MachineOperand *>, std::allocator<std::pair<const llvm::TargetRegisterClass *, llvm::MachineOperand *> > >::_Vector_impl" }206%"struct.std::_Vector_base<std::pair<const llvm::TargetRegisterClass *, llvm::MachineOperand *>, std::allocator<std::pair<const llvm::TargetRegisterClass *, llvm::MachineOperand *> > >::_Vector_impl" = type { ptr, ptr, ptr }207%"struct.std::pair.145" = type { ptr, ptr }208%"class.llvm::MachineOperand" = type { i8, [3 x i8], %union.anon, ptr, %union.anon.188 }209%union.anon = type { i32 }210%union.anon.188 = type { %struct.anon }211%struct.anon = type { ptr, ptr }212%"struct.llvm::VirtReg2IndexFunctor" = type { i8 }213%"class.llvm::IndexedMap.146" = type { %"class.std::vector.147", %"struct.std::pair.152", %"struct.llvm::VirtReg2IndexFunctor" }214%"class.std::vector.147" = type { %"struct.std::_Vector_base.148" }215%"struct.std::_Vector_base.148" = type { %"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int> > >::_Vector_impl" }216%"struct.std::_Vector_base<std::pair<unsigned int, unsigned int>, std::allocator<std::pair<unsigned int, unsigned int> > >::_Vector_impl" = type { ptr, ptr, ptr }217%"struct.std::pair.152" = type { i32, i32 }218%"class.llvm::BitVector" = type { ptr, i32, i32 }219%"struct.llvm::MachineFunctionInfo" = type { ptr }220%"class.llvm::MachineFrameInfo" = type opaque221%"class.llvm::MachineConstantPool" = type { ptr, i32, %"class.std::vector.153", %"class.llvm::DenseSet" }222%"class.llvm::DataLayout" = type opaque223%"class.std::vector.153" = type { %"struct.std::_Vector_base.154" }224%"struct.std::_Vector_base.154" = type { %"struct.std::_Vector_base<llvm::MachineConstantPoolEntry, std::allocator<llvm::MachineConstantPoolEntry> >::_Vector_impl" }225%"struct.std::_Vector_base<llvm::MachineConstantPoolEntry, std::allocator<llvm::MachineConstantPoolEntry> >::_Vector_impl" = type { ptr, ptr, ptr }226%"class.llvm::MachineConstantPoolEntry" = type { %union.anon.158, i32 }227%union.anon.158 = type { ptr }228%"class.llvm::Constant" = type { %"class.llvm::User" }229%"class.llvm::DenseSet" = type { %"class.llvm::DenseMap.159" }230%"class.llvm::DenseMap.159" = type { ptr, i32, i32, i32 }231%"struct.std::pair.162" = type { ptr, i8 }232%"class.llvm::MachineConstantPoolValue" = type { ptr, ptr }233%"class.llvm::MachineJumpTableInfo" = type opaque234%"class.std::vector.163" = type { %"struct.std::_Vector_base.164" }235%"struct.std::_Vector_base.164" = type { %"struct.std::_Vector_base<llvm::MachineBasicBlock *, std::allocator<llvm::MachineBasicBlock *> >::_Vector_impl" }236%"struct.std::_Vector_base<llvm::MachineBasicBlock *, std::allocator<llvm::MachineBasicBlock *> >::_Vector_impl" = type { ptr, ptr, ptr }237%"class.llvm::Recycler" = type { %"class.llvm::iplist.168" }238%"class.llvm::iplist.168" = type { %"struct.llvm::ilist_traits.169", ptr }239%"struct.llvm::ilist_traits.169" = type { %"struct.llvm::RecyclerStruct" }240%"struct.llvm::RecyclerStruct" = type { ptr, ptr }241%"class.llvm::ArrayRecycler" = type { %"class.llvm::SmallVector.174" }242%"class.llvm::SmallVector.174" = type { %"class.llvm::SmallVectorImpl.175", %"struct.llvm::SmallVectorStorage.179" }243%"class.llvm::SmallVectorImpl.175" = type { %"class.llvm::SmallVectorTemplateBase.176" }244%"class.llvm::SmallVectorTemplateBase.176" = type { %"class.llvm::SmallVectorTemplateCommon.177" }245%"class.llvm::SmallVectorTemplateCommon.177" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.178" }246%"struct.llvm::AlignedCharArrayUnion.178" = type { %"struct.llvm::AlignedCharArray" }247%"struct.llvm::SmallVectorStorage.179" = type { [7 x %"struct.llvm::AlignedCharArrayUnion.178"] }248%"class.llvm::Recycler.180" = type { %"class.llvm::iplist.168" }249%"struct.llvm::ilist.181" = type { %"class.llvm::iplist.182" }250%"class.llvm::iplist.182" = type { %"struct.llvm::ilist_traits.183", ptr }251%"struct.llvm::ilist_traits.183" = type { %"class.llvm::ilist_half_node.1" }252%"class.llvm::ArrayRecycler<llvm::MachineOperand, 8>::Capacity" = type { i8 }253%"class.llvm::ConstantInt" = type { %"class.llvm::Constant", %"class.llvm::APInt" }254%"class.llvm::APInt" = type { i32, %union.anon.189 }255%union.anon.189 = type { i64 }256%"class.llvm::ConstantFP" = type { %"class.llvm::Constant", %"class.llvm::APFloat" }257%"class.llvm::APFloat" = type { ptr, %"union.llvm::APFloat::Significand", i16, i8 }258%"struct.llvm::fltSemantics" = type opaque259%"union.llvm::APFloat::Significand" = type { i64 }260%"class.llvm::BlockAddress" = type { %"class.llvm::Constant" }261%"class.llvm::hash_code" = type { i64 }262%"struct.llvm::hashing::detail::hash_combine_recursive_helper" = type { [64 x i8], %"struct.llvm::hashing::detail::hash_state", i64 }263%"struct.llvm::hashing::detail::hash_state" = type { i64, i64, i64, i64, i64, i64, i64, i64 }264%"class.llvm::PrintReg" = type { ptr, i32, i32 }265%"class.llvm::PseudoSourceValue" = type { %"class.llvm::Value" }266%"class.llvm::FoldingSetNodeID" = type { %"class.llvm::SmallVector.194" }267%"class.llvm::SmallVector.194" = type { [28 x i8], %"struct.llvm::SmallVectorStorage.200" }268%"struct.llvm::SmallVectorStorage.200" = type { [31 x %"struct.llvm::AlignedCharArrayUnion.198"] }269%"struct.llvm::ArrayRecycler<llvm::MachineOperand, 8>::FreeList" = type { ptr }270%"class.llvm::ilist_iterator.202" = type { ptr }271%"class.llvm::TargetInstrInfo" = type { ptr, [28 x i8], i32, i32 }272%"struct.std::pair.203" = type { i8, i8 }273%"class.llvm::SmallVectorImpl.195" = type { %"class.llvm::SmallVectorTemplateBase.196" }274%"class.llvm::SmallVectorTemplateBase.196" = type { %"class.llvm::SmallVectorTemplateCommon.197" }275%"class.llvm::SmallVectorTemplateCommon.197" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.198" }276%"class.llvm::AliasAnalysis" = type { ptr, ptr, ptr, ptr }277%"class.llvm::TargetLibraryInfo" = type opaque278%"struct.llvm::AliasAnalysis::Location" = type { ptr, i64, ptr }279%"class.llvm::DIVariable" = type { %"class.llvm::DIDescriptor" }280%"class.llvm::DIDescriptor" = type { ptr }281%"class.llvm::DIScope" = type { %"class.llvm::DIDescriptor" }282%"class.llvm::ArrayRef.208" = type { ptr, i64 }283%"class.llvm::SmallVector.209" = type { %"class.llvm::SmallVectorImpl.210", %"struct.llvm::SmallVectorStorage.214" }284%"class.llvm::SmallVectorImpl.210" = type { %"class.llvm::SmallVectorTemplateBase.211" }285%"class.llvm::SmallVectorTemplateBase.211" = type { %"class.llvm::SmallVectorTemplateCommon.212" }286%"class.llvm::SmallVectorTemplateCommon.212" = type { %"class.llvm::SmallVectorBase", %"struct.llvm::AlignedCharArrayUnion.213" }287%"struct.llvm::AlignedCharArrayUnion.213" = type { %"struct.llvm::AlignedCharArray" }288%"struct.llvm::SmallVectorStorage.214" = type { [7 x %"struct.llvm::AlignedCharArrayUnion.213"] }289%"class.llvm::Twine" = type { %"union.llvm::Twine::Child", %"union.llvm::Twine::Child", i8, i8 }290%"union.llvm::Twine::Child" = type { ptr }291%"struct.std::random_access_iterator_tag" = type { i8 }292 293declare void @_ZN4llvm19MachineRegisterInfo27removeRegOperandFromUseListEPNS_14MachineOperandE(ptr, ptr)294 295declare void @_ZN4llvm19MachineRegisterInfo22addRegOperandToUseListEPNS_14MachineOperandE(ptr, ptr)296 297declare zeroext i32 @_ZNK4llvm14MCRegisterInfo9getSubRegEjj(ptr, i32 zeroext, i32 zeroext)298 299define void @_ZN4llvm14MachineOperand12substPhysRegEjRKNS_18TargetRegisterInfoE(ptr %this, i32 zeroext %Reg, ptr %TRI) align 2 {300entry:301 %SubReg_TargetFlags.i = getelementptr inbounds %"class.llvm::MachineOperand", ptr %this, i64 0, i32 1302 %bf.load.i = load i24, ptr %SubReg_TargetFlags.i, align 1303 %bf.lshr.i = lshr i24 %bf.load.i, 12304 %tobool = icmp eq i24 %bf.lshr.i, 0305 br i1 %tobool, label %if.end, label %if.then306 307if.then: ; preds = %entry308 %bf.cast.i = zext i24 %bf.lshr.i to i32309 %add.ptr = getelementptr inbounds %"class.llvm::TargetRegisterInfo", ptr %TRI, i64 0, i32 1310 %call3 = tail call zeroext i32 @_ZNK4llvm14MCRegisterInfo9getSubRegEjj(ptr %add.ptr, i32 zeroext %Reg, i32 zeroext %bf.cast.i)311 %bf.load.i10 = load i24, ptr %SubReg_TargetFlags.i, align 1312 %bf.clear.i = and i24 %bf.load.i10, 4095313 store i24 %bf.clear.i, ptr %SubReg_TargetFlags.i, align 1314 br label %if.end315 316if.end: ; preds = %entry, %if.then317 %Reg.addr.0 = phi i32 [ %call3, %if.then ], [ %Reg, %entry ]318 %RegNo.i.i = getelementptr inbounds %"class.llvm::MachineOperand", ptr %this, i64 0, i32 2, i32 0319 %0 = load i32, ptr %RegNo.i.i, align 4320 %cmp.i = icmp eq i32 %0, %Reg.addr.0321 br i1 %cmp.i, label %_ZN4llvm14MachineOperand6setRegEj.exit, label %if.end.i322 323if.end.i: ; preds = %if.end324 %ParentMI.i.i = getelementptr inbounds %"class.llvm::MachineOperand", ptr %this, i64 0, i32 3325 %1 = load ptr, ptr %ParentMI.i.i, align 8326 %tobool.i = icmp eq ptr %1, null327 br i1 %tobool.i, label %if.end13.i, label %if.then3.i328 329if.then3.i: ; preds = %if.end.i330 %Parent.i.i = getelementptr inbounds %"class.llvm::MachineInstr", ptr %1, i64 0, i32 2331 %2 = load ptr, ptr %Parent.i.i, align 8332 %tobool5.i = icmp eq ptr %2, null333 br i1 %tobool5.i, label %if.end13.i, label %if.then6.i334 335if.then6.i: ; preds = %if.then3.i336 %xParent.i.i = getelementptr inbounds %"class.llvm::MachineBasicBlock", ptr %2, i64 0, i32 4337 %3 = load ptr, ptr %xParent.i.i, align 8338 %tobool8.i = icmp eq ptr %3, null339 br i1 %tobool8.i, label %if.end13.i, label %if.then9.i340 341if.then9.i: ; preds = %if.then6.i342 %RegInfo.i.i = getelementptr inbounds %"class.llvm::MachineFunction", ptr %3, i64 0, i32 5343 %4 = load ptr, ptr %RegInfo.i.i, align 8344 tail call void @_ZN4llvm19MachineRegisterInfo27removeRegOperandFromUseListEPNS_14MachineOperandE(ptr %4, ptr %this)345 store i32 %Reg.addr.0, ptr %RegNo.i.i, align 4346 tail call void @_ZN4llvm19MachineRegisterInfo22addRegOperandToUseListEPNS_14MachineOperandE(ptr %4, ptr %this)347 br label %_ZN4llvm14MachineOperand6setRegEj.exit348 349if.end13.i: ; preds = %if.then6.i, %if.then3.i, %if.end.i350 store i32 %Reg.addr.0, ptr %RegNo.i.i, align 4351 br label %_ZN4llvm14MachineOperand6setRegEj.exit352 353_ZN4llvm14MachineOperand6setRegEj.exit: ; preds = %if.end, %if.then9.i, %if.end13.i354 ret void355}356 357; CHECK-NOT: lbzu 3, 1(3)358