42 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \3; RUN: FileCheck %s4 5; With MemorySSA, everything is taken out of the loop by licm.6; Loads and stores to undef are treated as non-aliasing.7define void @ec_GFp_nistp256_points_mul() {8; CHECK-LABEL: ec_GFp_nistp256_points_mul:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: ld 3, 0(3)11; CHECK-NEXT: subfic 4, 3, 012; CHECK-NEXT: li 4, 013; CHECK-NEXT: subfze 5, 414; CHECK-NEXT: subc 3, 5, 315; CHECK-NEXT: subfe 3, 4, 516; CHECK-NEXT: sradi 3, 3, 6317; CHECK-NEXT: std 3, 0(3)18; CHECK-NEXT: .p2align 419; CHECK-NEXT: .LBB0_1: # %fe_cmovznz.exit.i534.i.1520; CHECK-NEXT: #21; CHECK-NEXT: b .LBB0_122 23entry:24 br label %fe_cmovznz.exit.i534.i.1525 26fe_cmovznz.exit.i534.i.15: ; preds = %fe_cmovznz.exit.i534.i.15, %entry27 %0 = load i64, ptr undef, align 828 %1 = load i64, ptr undef, align 829 %conv.i69.i.i = zext i64 %0 to i12830 %sub.i72.i.i = sub nsw i128 0, %conv.i69.i.i31 %conv.i63.i.i = zext i64 %1 to i12832 %add.neg.i.i.i = ashr i128 %sub.i72.i.i, 12733 %sub.i65.i.i = sub nsw i128 %add.neg.i.i.i, %conv.i63.i.i34 %sub.i65.lobit.i.i = ashr i128 %sub.i65.i.i, 12735 %conv1.i58.i.i = and i128 %sub.i65.lobit.i.i, 1844674407370955161536 %add3.i59.i.i = add nuw nsw i128 %conv1.i58.i.i, 037 %conv4.i60.i.i = trunc i128 %add3.i59.i.i to i6438 store i64 %conv4.i60.i.i, ptr undef, align 1639 br label %fe_cmovznz.exit.i534.i.1540}41 42