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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \3; RUN: -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s4; We don't want to produce a CTR loop due to the call to lrint in the body.5define dso_local void @test(i64 %arg, i64 %arg1, ptr %arg2) {6; CHECK-LABEL: test:7; CHECK: # %bb.0: # %bb8; CHECK-NEXT: bc 4, 4*cr5+lt, .LBB0_59; CHECK-NEXT: # %bb.1: # %bb310; CHECK-NEXT: bc 12, 4*cr5+lt, .LBB0_611; CHECK-NEXT: # %bb.2: # %bb412; CHECK-NEXT: mflr r013; CHECK-NEXT: .cfi_def_cfa_offset 6414; CHECK-NEXT: .cfi_offset lr, 1615; CHECK-NEXT: .cfi_offset r28, -3216; CHECK-NEXT: .cfi_offset r29, -2417; CHECK-NEXT: .cfi_offset r30, -1618; CHECK-NEXT: std r28, -32(r1) # 8-byte Folded Spill19; CHECK-NEXT: std r29, -24(r1) # 8-byte Folded Spill20; CHECK-NEXT: std r30, -16(r1) # 8-byte Folded Spill21; CHECK-NEXT: stdu r1, -64(r1)22; CHECK-NEXT: mr r30, r523; CHECK-NEXT: sub r29, r4, r324; CHECK-NEXT: addi r28, r5, -425; CHECK-NEXT: std r0, 80(r1)26; CHECK-NEXT: .p2align 527; CHECK-NEXT: .LBB0_3: # %bb528; CHECK-NEXT: #29; CHECK-NEXT: lfsu f1, 4(r28)30; CHECK-NEXT: bl lrint31; CHECK-NEXT: nop32; CHECK-NEXT: addi r29, r29, -133; CHECK-NEXT: stb r3, 0(r30)34; CHECK-NEXT: cmpldi r29, 035; CHECK-NEXT: bc 12, gt, .LBB0_336; CHECK-NEXT: # %bb.4: # %bb1537; CHECK-NEXT: addi r1, r1, 6438; CHECK-NEXT: ld r0, 16(r1)39; CHECK-NEXT: ld r30, -16(r1) # 8-byte Folded Reload40; CHECK-NEXT: ld r29, -24(r1) # 8-byte Folded Reload41; CHECK-NEXT: ld r28, -32(r1) # 8-byte Folded Reload42; CHECK-NEXT: mtlr r043; CHECK-NEXT: blr44; CHECK-NEXT: .LBB0_5: # %bb245; CHECK-NEXT: .LBB0_6: # %bb1446bb:47 br i1 undef, label %bb3, label %bb248 49bb2: ; preds = %bb50 unreachable51 52bb3: ; preds = %bb53 %tmp = sub i64 %arg1, %arg54 br i1 undef, label %bb4, label %bb1455 56bb4: ; preds = %bb357 br label %bb558 59bb5: ; preds = %bb5, %bb460 %tmp6 = phi i64 [ %tmp12, %bb5 ], [ 0, %bb4 ]61 %tmp7 = getelementptr inbounds float, ptr %arg2, i64 %tmp662 %tmp8 = load float, ptr %tmp7, align 463 %tmp9 = fpext float %tmp8 to double64 %tmp10 = tail call i64 @llvm.lrint.i64.f64(double %tmp9) #265 %tmp11 = trunc i64 %tmp10 to i866 store i8 %tmp11, ptr %arg2, align 167 %tmp12 = add nuw i64 %tmp6, 168 %tmp13 = icmp eq i64 %tmp12, %tmp69 br i1 %tmp13, label %bb15, label %bb570 71bb14: ; preds = %bb372 unreachable73 74bb15: ; preds = %bb575 ret void76}77 78declare i64 @llvm.lrint.i64.f64(double)79