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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \3; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \4; RUN: -check-prefix=CHECK-LE %s5 6define void @foo(i32 %vla_size) #0 {7; CHECK-LE-LABEL: foo:8; CHECK-LE: # %bb.0: # %entry9; CHECK-LE-NEXT: clrldi r12, r1, 5310; CHECK-LE-NEXT: std r31, -8(r1)11; CHECK-LE-NEXT: std r30, -16(r1)12; CHECK-LE-NEXT: mr r30, r113; CHECK-LE-NEXT: sub r0, r1, r1214; CHECK-LE-NEXT: li r12, -614415; CHECK-LE-NEXT: add r0, r12, r016; CHECK-LE-NEXT: sub r12, r0, r117; CHECK-LE-NEXT: cmpdi r12, -409618; CHECK-LE-NEXT: bge cr0, .LBB0_219; CHECK-LE-NEXT: .LBB0_1: # %entry20; CHECK-LE-NEXT: #21; CHECK-LE-NEXT: stdu r30, -4096(r1)22; CHECK-LE-NEXT: addi r12, r12, 409623; CHECK-LE-NEXT: cmpdi r12, -409624; CHECK-LE-NEXT: blt cr0, .LBB0_125; CHECK-LE-NEXT: .LBB0_2: # %entry26; CHECK-LE-NEXT: stdux r30, r1, r1227; CHECK-LE-NEXT: mr r0, r3028; CHECK-LE-NEXT: .cfi_def_cfa_register r029; CHECK-LE-NEXT: .cfi_def_cfa_register r3030; CHECK-LE-NEXT: .cfi_offset r31, -831; CHECK-LE-NEXT: .cfi_offset r30, -1632; CHECK-LE-NEXT: clrldi r3, r3, 3233; CHECK-LE-NEXT: li r4, -204834; CHECK-LE-NEXT: li r6, -409635; CHECK-LE-NEXT: mr r31, r136; CHECK-LE-NEXT: addi r3, r3, 1537; CHECK-LE-NEXT: rldicl r3, r3, 60, 438; CHECK-LE-NEXT: rldicl r3, r3, 4, 3139; CHECK-LE-NEXT: neg r5, r340; CHECK-LE-NEXT: ld r3, 0(r1)41; CHECK-LE-NEXT: and r4, r5, r442; CHECK-LE-NEXT: mr r5, r443; CHECK-LE-NEXT: divd r7, r5, r644; CHECK-LE-NEXT: add r4, r1, r545; CHECK-LE-NEXT: mulld r6, r7, r646; CHECK-LE-NEXT: sub r5, r5, r647; CHECK-LE-NEXT: stdux r3, r1, r548; CHECK-LE-NEXT: cmpd r1, r449; CHECK-LE-NEXT: beq cr0, .LBB0_450; CHECK-LE-NEXT: .LBB0_3: # %entry51; CHECK-LE-NEXT: #52; CHECK-LE-NEXT: stdu r3, -4096(r1)53; CHECK-LE-NEXT: cmpd r1, r454; CHECK-LE-NEXT: bne cr0, .LBB0_355; CHECK-LE-NEXT: .LBB0_4: # %entry56; CHECK-LE-NEXT: addi r3, r1, 204857; CHECK-LE-NEXT: lbz r3, 0(r3)58; CHECK-LE-NEXT: mr r1, r3059; CHECK-LE-NEXT: ld r31, -8(r1)60; CHECK-LE-NEXT: ld r30, -16(r1)61; CHECK-LE-NEXT: blr62entry:63 %0 = zext i32 %vla_size to i6464 %vla = alloca i8, i64 %0, align 204865 %1 = load volatile i8, ptr %vla, align 204866 ret void67}68 69attributes #0 = { "probe-stack"="inline-asm" }70