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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx \3; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P7 %s4; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 \5; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P8 %s6; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr9 \7; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr | FileCheck --check-prefix=CHECK-P9 %s8 9target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"10 11declare double @llvm.sqrt.f64(double)12declare float @llvm.sqrt.f32(float)13declare fp128 @llvm.sqrt.f128(fp128)14declare <4 x float> @llvm.sqrt.v4f32(<4 x float>)15declare <2 x double> @llvm.sqrt.v2f64(<2 x double>)16 17define double @foo_fmf(double %a, double %b) nounwind {18; CHECK-P7-LABEL: foo_fmf:19; CHECK-P7: # %bb.0:20; CHECK-P7-NEXT: frsqrte f0, f221; CHECK-P7-NEXT: addis r3, r2, .LCPI0_0@toc@ha22; CHECK-P7-NEXT: lfs f4, .LCPI0_0@toc@l(r3)23; CHECK-P7-NEXT: addis r3, r2, .LCPI0_1@toc@ha24; CHECK-P7-NEXT: lfs f5, .LCPI0_1@toc@l(r3)25; CHECK-P7-NEXT: fmul f3, f2, f026; CHECK-P7-NEXT: fmadd f3, f3, f0, f427; CHECK-P7-NEXT: fmul f0, f0, f528; CHECK-P7-NEXT: fmul f0, f0, f329; CHECK-P7-NEXT: fmul f2, f2, f030; CHECK-P7-NEXT: fmadd f2, f2, f0, f431; CHECK-P7-NEXT: fmul f0, f0, f532; CHECK-P7-NEXT: fmul f0, f0, f233; CHECK-P7-NEXT: fmul f1, f1, f034; CHECK-P7-NEXT: blr35;36; CHECK-P8-LABEL: foo_fmf:37; CHECK-P8: # %bb.0:38; CHECK-P8-NEXT: vspltisw v2, -339; CHECK-P8-NEXT: xsrsqrtedp f0, f240; CHECK-P8-NEXT: addis r3, r2, .LCPI0_0@toc@ha41; CHECK-P8-NEXT: xvcvsxwdp vs4, v242; CHECK-P8-NEXT: xsmuldp f3, f2, f043; CHECK-P8-NEXT: fmr f5, f444; CHECK-P8-NEXT: xsmaddadp f5, f3, f045; CHECK-P8-NEXT: lfs f3, .LCPI0_0@toc@l(r3)46; CHECK-P8-NEXT: xsmuldp f0, f0, f347; CHECK-P8-NEXT: xsmuldp f0, f0, f548; CHECK-P8-NEXT: xsmuldp f2, f2, f049; CHECK-P8-NEXT: xsmaddadp f4, f2, f050; CHECK-P8-NEXT: xsmuldp f0, f0, f351; CHECK-P8-NEXT: xsmuldp f0, f0, f452; CHECK-P8-NEXT: xsmuldp f1, f1, f053; CHECK-P8-NEXT: blr54;55; CHECK-P9-LABEL: foo_fmf:56; CHECK-P9: # %bb.0:57; CHECK-P9-NEXT: xsrsqrtedp f0, f258; CHECK-P9-NEXT: vspltisw v2, -359; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha60; CHECK-P9-NEXT: xsmuldp f3, f2, f061; CHECK-P9-NEXT: xvcvsxwdp vs4, v262; CHECK-P9-NEXT: fmr f5, f463; CHECK-P9-NEXT: xsmaddadp f5, f3, f064; CHECK-P9-NEXT: lfs f3, .LCPI0_0@toc@l(r3)65; CHECK-P9-NEXT: xsmuldp f0, f0, f366; CHECK-P9-NEXT: xsmuldp f0, f0, f567; CHECK-P9-NEXT: xsmuldp f2, f2, f068; CHECK-P9-NEXT: xsmaddadp f4, f2, f069; CHECK-P9-NEXT: xsmuldp f0, f0, f370; CHECK-P9-NEXT: xsmuldp f0, f0, f471; CHECK-P9-NEXT: xsmuldp f1, f1, f072; CHECK-P9-NEXT: blr73 %x = call arcp contract reassoc double @llvm.sqrt.f64(double %b)74 %r = fdiv arcp contract reassoc double %a, %x75 ret double %r76}77 78define double @foo_safe(double %a, double %b) nounwind {79; CHECK-P7-LABEL: foo_safe:80; CHECK-P7: # %bb.0:81; CHECK-P7-NEXT: fsqrt f0, f282; CHECK-P7-NEXT: fdiv f1, f1, f083; CHECK-P7-NEXT: blr84;85; CHECK-P8-LABEL: foo_safe:86; CHECK-P8: # %bb.0:87; CHECK-P8-NEXT: xssqrtdp f0, f288; CHECK-P8-NEXT: xsdivdp f1, f1, f089; CHECK-P8-NEXT: blr90;91; CHECK-P9-LABEL: foo_safe:92; CHECK-P9: # %bb.0:93; CHECK-P9-NEXT: xssqrtdp f0, f294; CHECK-P9-NEXT: xsdivdp f1, f1, f095; CHECK-P9-NEXT: blr96 %x = call double @llvm.sqrt.f64(double %b)97 %r = fdiv double %a, %x98 ret double %r99}100 101define double @no_estimate_refinement_f64(double %a, double %b) #0 {102; CHECK-P7-LABEL: no_estimate_refinement_f64:103; CHECK-P7: # %bb.0:104; CHECK-P7-NEXT: frsqrte f0, f2105; CHECK-P7-NEXT: fmul f1, f1, f0106; CHECK-P7-NEXT: blr107;108; CHECK-P8-LABEL: no_estimate_refinement_f64:109; CHECK-P8: # %bb.0:110; CHECK-P8-NEXT: xsrsqrtedp f0, f2111; CHECK-P8-NEXT: xsmuldp f1, f1, f0112; CHECK-P8-NEXT: blr113;114; CHECK-P9-LABEL: no_estimate_refinement_f64:115; CHECK-P9: # %bb.0:116; CHECK-P9-NEXT: xsrsqrtedp f0, f2117; CHECK-P9-NEXT: xsmuldp f1, f1, f0118; CHECK-P9-NEXT: blr119 %x = call arcp reassoc double @llvm.sqrt.f64(double %b)120 %r = fdiv arcp reassoc double %a, %x121 ret double %r122}123 124define double @foof_fmf(double %a, float %b) nounwind {125; CHECK-P7-LABEL: foof_fmf:126; CHECK-P7: # %bb.0:127; CHECK-P7-NEXT: frsqrtes f0, f2128; CHECK-P7-NEXT: addis r3, r2, .LCPI3_0@toc@ha129; CHECK-P7-NEXT: lfs f3, .LCPI3_0@toc@l(r3)130; CHECK-P7-NEXT: addis r3, r2, .LCPI3_1@toc@ha131; CHECK-P7-NEXT: fmuls f2, f2, f0132; CHECK-P7-NEXT: fmadds f2, f2, f0, f3133; CHECK-P7-NEXT: lfs f3, .LCPI3_1@toc@l(r3)134; CHECK-P7-NEXT: fmuls f0, f0, f3135; CHECK-P7-NEXT: fmuls f0, f0, f2136; CHECK-P7-NEXT: fmul f1, f1, f0137; CHECK-P7-NEXT: blr138;139; CHECK-P8-LABEL: foof_fmf:140; CHECK-P8: # %bb.0:141; CHECK-P8-NEXT: xsrsqrtesp f0, f2142; CHECK-P8-NEXT: vspltisw v2, -3143; CHECK-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha144; CHECK-P8-NEXT: xvcvsxwdp vs3, v2145; CHECK-P8-NEXT: xsmulsp f2, f2, f0146; CHECK-P8-NEXT: xsmaddasp f3, f2, f0147; CHECK-P8-NEXT: lfs f2, .LCPI3_0@toc@l(r3)148; CHECK-P8-NEXT: xsmulsp f0, f0, f2149; CHECK-P8-NEXT: xsmulsp f0, f0, f3150; CHECK-P8-NEXT: xsmuldp f1, f1, f0151; CHECK-P8-NEXT: blr152;153; CHECK-P9-LABEL: foof_fmf:154; CHECK-P9: # %bb.0:155; CHECK-P9-NEXT: xsrsqrtesp f0, f2156; CHECK-P9-NEXT: vspltisw v2, -3157; CHECK-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha158; CHECK-P9-NEXT: xsmulsp f2, f2, f0159; CHECK-P9-NEXT: xvcvsxwdp vs3, v2160; CHECK-P9-NEXT: xsmaddasp f3, f2, f0161; CHECK-P9-NEXT: lfs f2, .LCPI3_0@toc@l(r3)162; CHECK-P9-NEXT: xsmulsp f0, f0, f2163; CHECK-P9-NEXT: xsmulsp f0, f0, f3164; CHECK-P9-NEXT: xsmuldp f1, f1, f0165; CHECK-P9-NEXT: blr166 %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b)167 %y = fpext arcp float %x to double168 %r = fdiv contract reassoc arcp double %a, %y169 ret double %r170}171 172define double @foof_safe(double %a, float %b) nounwind {173; CHECK-P7-LABEL: foof_safe:174; CHECK-P7: # %bb.0:175; CHECK-P7-NEXT: fsqrts f0, f2176; CHECK-P7-NEXT: fdiv f1, f1, f0177; CHECK-P7-NEXT: blr178;179; CHECK-P8-LABEL: foof_safe:180; CHECK-P8: # %bb.0:181; CHECK-P8-NEXT: xssqrtsp f0, f2182; CHECK-P8-NEXT: xsdivdp f1, f1, f0183; CHECK-P8-NEXT: blr184;185; CHECK-P9-LABEL: foof_safe:186; CHECK-P9: # %bb.0:187; CHECK-P9-NEXT: xssqrtsp f0, f2188; CHECK-P9-NEXT: xsdivdp f1, f1, f0189; CHECK-P9-NEXT: blr190 %x = call float @llvm.sqrt.f32(float %b)191 %y = fpext float %x to double192 %r = fdiv double %a, %y193 ret double %r194}195 196define float @food_fmf(float %a, double %b) nounwind {197; CHECK-P7-LABEL: food_fmf:198; CHECK-P7: # %bb.0:199; CHECK-P7-NEXT: frsqrte f0, f2200; CHECK-P7-NEXT: addis r3, r2, .LCPI5_0@toc@ha201; CHECK-P7-NEXT: lfs f4, .LCPI5_0@toc@l(r3)202; CHECK-P7-NEXT: addis r3, r2, .LCPI5_1@toc@ha203; CHECK-P7-NEXT: lfs f5, .LCPI5_1@toc@l(r3)204; CHECK-P7-NEXT: fmul f3, f2, f0205; CHECK-P7-NEXT: fmadd f3, f3, f0, f4206; CHECK-P7-NEXT: fmul f0, f0, f5207; CHECK-P7-NEXT: fmul f0, f0, f3208; CHECK-P7-NEXT: fmul f2, f2, f0209; CHECK-P7-NEXT: fmadd f2, f2, f0, f4210; CHECK-P7-NEXT: fmul f0, f0, f5211; CHECK-P7-NEXT: fmul f0, f0, f2212; CHECK-P7-NEXT: frsp f0, f0213; CHECK-P7-NEXT: fmuls f1, f1, f0214; CHECK-P7-NEXT: blr215;216; CHECK-P8-LABEL: food_fmf:217; CHECK-P8: # %bb.0:218; CHECK-P8-NEXT: vspltisw v2, -3219; CHECK-P8-NEXT: xsrsqrtedp f0, f2220; CHECK-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha221; CHECK-P8-NEXT: xvcvsxwdp vs4, v2222; CHECK-P8-NEXT: xsmuldp f3, f2, f0223; CHECK-P8-NEXT: fmr f5, f4224; CHECK-P8-NEXT: xsmaddadp f5, f3, f0225; CHECK-P8-NEXT: lfs f3, .LCPI5_0@toc@l(r3)226; CHECK-P8-NEXT: xsmuldp f0, f0, f3227; CHECK-P8-NEXT: xsmuldp f0, f0, f5228; CHECK-P8-NEXT: xsmuldp f2, f2, f0229; CHECK-P8-NEXT: xsmaddadp f4, f2, f0230; CHECK-P8-NEXT: xsmuldp f0, f0, f3231; CHECK-P8-NEXT: xsmuldp f0, f0, f4232; CHECK-P8-NEXT: xsrsp f0, f0233; CHECK-P8-NEXT: xsmulsp f1, f1, f0234; CHECK-P8-NEXT: blr235;236; CHECK-P9-LABEL: food_fmf:237; CHECK-P9: # %bb.0:238; CHECK-P9-NEXT: xsrsqrtedp f0, f2239; CHECK-P9-NEXT: vspltisw v2, -3240; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha241; CHECK-P9-NEXT: xsmuldp f3, f2, f0242; CHECK-P9-NEXT: xvcvsxwdp vs4, v2243; CHECK-P9-NEXT: fmr f5, f4244; CHECK-P9-NEXT: xsmaddadp f5, f3, f0245; CHECK-P9-NEXT: lfs f3, .LCPI5_0@toc@l(r3)246; CHECK-P9-NEXT: xsmuldp f0, f0, f3247; CHECK-P9-NEXT: xsmuldp f0, f0, f5248; CHECK-P9-NEXT: xsmuldp f2, f2, f0249; CHECK-P9-NEXT: xsmaddadp f4, f2, f0250; CHECK-P9-NEXT: xsmuldp f0, f0, f3251; CHECK-P9-NEXT: xsmuldp f0, f0, f4252; CHECK-P9-NEXT: xsrsp f0, f0253; CHECK-P9-NEXT: xsmulsp f1, f1, f0254; CHECK-P9-NEXT: blr255 %x = call contract reassoc arcp double @llvm.sqrt.f64(double %b)256 %y = fptrunc double %x to float257 %r = fdiv contract reassoc arcp float %a, %y258 ret float %r259}260 261define float @food_safe(float %a, double %b) nounwind {262; CHECK-P7-LABEL: food_safe:263; CHECK-P7: # %bb.0:264; CHECK-P7-NEXT: fsqrt f0, f2265; CHECK-P7-NEXT: frsp f0, f0266; CHECK-P7-NEXT: fdivs f1, f1, f0267; CHECK-P7-NEXT: blr268;269; CHECK-P8-LABEL: food_safe:270; CHECK-P8: # %bb.0:271; CHECK-P8-NEXT: xssqrtdp f0, f2272; CHECK-P8-NEXT: xsrsp f0, f0273; CHECK-P8-NEXT: xsdivsp f1, f1, f0274; CHECK-P8-NEXT: blr275;276; CHECK-P9-LABEL: food_safe:277; CHECK-P9: # %bb.0:278; CHECK-P9-NEXT: xssqrtdp f0, f2279; CHECK-P9-NEXT: xsrsp f0, f0280; CHECK-P9-NEXT: xsdivsp f1, f1, f0281; CHECK-P9-NEXT: blr282 %x = call double @llvm.sqrt.f64(double %b)283 %y = fptrunc double %x to float284 %r = fdiv float %a, %y285 ret float %r286}287 288define float @goo_fmf(float %a, float %b) nounwind {289; CHECK-P7-LABEL: goo_fmf:290; CHECK-P7: # %bb.0:291; CHECK-P7-NEXT: frsqrtes f0, f2292; CHECK-P7-NEXT: addis r3, r2, .LCPI7_0@toc@ha293; CHECK-P7-NEXT: lfs f3, .LCPI7_0@toc@l(r3)294; CHECK-P7-NEXT: addis r3, r2, .LCPI7_1@toc@ha295; CHECK-P7-NEXT: fmuls f2, f2, f0296; CHECK-P7-NEXT: fmadds f2, f2, f0, f3297; CHECK-P7-NEXT: lfs f3, .LCPI7_1@toc@l(r3)298; CHECK-P7-NEXT: fmuls f0, f0, f3299; CHECK-P7-NEXT: fmuls f0, f0, f2300; CHECK-P7-NEXT: fmuls f1, f1, f0301; CHECK-P7-NEXT: blr302;303; CHECK-P8-LABEL: goo_fmf:304; CHECK-P8: # %bb.0:305; CHECK-P8-NEXT: xsrsqrtesp f0, f2306; CHECK-P8-NEXT: vspltisw v2, -3307; CHECK-P8-NEXT: addis r3, r2, .LCPI7_0@toc@ha308; CHECK-P8-NEXT: xvcvsxwdp vs3, v2309; CHECK-P8-NEXT: xsmulsp f2, f2, f0310; CHECK-P8-NEXT: xsmaddasp f3, f2, f0311; CHECK-P8-NEXT: lfs f2, .LCPI7_0@toc@l(r3)312; CHECK-P8-NEXT: xsmulsp f0, f0, f2313; CHECK-P8-NEXT: xsmulsp f0, f0, f3314; CHECK-P8-NEXT: xsmulsp f1, f1, f0315; CHECK-P8-NEXT: blr316;317; CHECK-P9-LABEL: goo_fmf:318; CHECK-P9: # %bb.0:319; CHECK-P9-NEXT: xsrsqrtesp f0, f2320; CHECK-P9-NEXT: vspltisw v2, -3321; CHECK-P9-NEXT: addis r3, r2, .LCPI7_0@toc@ha322; CHECK-P9-NEXT: xsmulsp f2, f2, f0323; CHECK-P9-NEXT: xvcvsxwdp vs3, v2324; CHECK-P9-NEXT: xsmaddasp f3, f2, f0325; CHECK-P9-NEXT: lfs f2, .LCPI7_0@toc@l(r3)326; CHECK-P9-NEXT: xsmulsp f0, f0, f2327; CHECK-P9-NEXT: xsmulsp f0, f0, f3328; CHECK-P9-NEXT: xsmulsp f1, f1, f0329; CHECK-P9-NEXT: blr330 %x = call contract reassoc arcp float @llvm.sqrt.f32(float %b)331 %r = fdiv contract reassoc arcp float %a, %x332 ret float %r333}334 335define float @goo_safe(float %a, float %b) nounwind {336; CHECK-P7-LABEL: goo_safe:337; CHECK-P7: # %bb.0:338; CHECK-P7-NEXT: fsqrts f0, f2339; CHECK-P7-NEXT: fdivs f1, f1, f0340; CHECK-P7-NEXT: blr341;342; CHECK-P8-LABEL: goo_safe:343; CHECK-P8: # %bb.0:344; CHECK-P8-NEXT: xssqrtsp f0, f2345; CHECK-P8-NEXT: xsdivsp f1, f1, f0346; CHECK-P8-NEXT: blr347;348; CHECK-P9-LABEL: goo_safe:349; CHECK-P9: # %bb.0:350; CHECK-P9-NEXT: xssqrtsp f0, f2351; CHECK-P9-NEXT: xsdivsp f1, f1, f0352; CHECK-P9-NEXT: blr353 %x = call float @llvm.sqrt.f32(float %b)354 %r = fdiv float %a, %x355 ret float %r356}357 358define float @no_estimate_refinement_f32(float %a, float %b) #0 {359; CHECK-P7-LABEL: no_estimate_refinement_f32:360; CHECK-P7: # %bb.0:361; CHECK-P7-NEXT: frsqrtes f0, f2362; CHECK-P7-NEXT: fmuls f1, f1, f0363; CHECK-P7-NEXT: blr364;365; CHECK-P8-LABEL: no_estimate_refinement_f32:366; CHECK-P8: # %bb.0:367; CHECK-P8-NEXT: xsrsqrtesp f0, f2368; CHECK-P8-NEXT: xsmulsp f1, f1, f0369; CHECK-P8-NEXT: blr370;371; CHECK-P9-LABEL: no_estimate_refinement_f32:372; CHECK-P9: # %bb.0:373; CHECK-P9-NEXT: xsrsqrtesp f0, f2374; CHECK-P9-NEXT: xsmulsp f1, f1, f0375; CHECK-P9-NEXT: blr376 %x = call reassoc arcp float @llvm.sqrt.f32(float %b)377 %r = fdiv reassoc arcp float %a, %x378 ret float %r379}380 381define float @rsqrt_fmul_fmf(float %a, float %b, float %c) {382; CHECK-P7-LABEL: rsqrt_fmul_fmf:383; CHECK-P7: # %bb.0:384; CHECK-P7-NEXT: frsqrtes f0, f1385; CHECK-P7-NEXT: addis r3, r2, .LCPI10_0@toc@ha386; CHECK-P7-NEXT: lfs f4, .LCPI10_0@toc@l(r3)387; CHECK-P7-NEXT: addis r3, r2, .LCPI10_1@toc@ha388; CHECK-P7-NEXT: fmuls f1, f1, f0389; CHECK-P7-NEXT: fmadds f1, f1, f0, f4390; CHECK-P7-NEXT: lfs f4, .LCPI10_1@toc@l(r3)391; CHECK-P7-NEXT: fmuls f0, f0, f4392; CHECK-P7-NEXT: fmuls f0, f0, f1393; CHECK-P7-NEXT: fres f1, f2394; CHECK-P7-NEXT: fmuls f4, f0, f1395; CHECK-P7-NEXT: fnmsubs f0, f2, f4, f0396; CHECK-P7-NEXT: fmadds f0, f1, f0, f4397; CHECK-P7-NEXT: fmuls f1, f3, f0398; CHECK-P7-NEXT: blr399;400; CHECK-P8-LABEL: rsqrt_fmul_fmf:401; CHECK-P8: # %bb.0:402; CHECK-P8-NEXT: xsrsqrtesp f0, f1403; CHECK-P8-NEXT: vspltisw v2, -3404; CHECK-P8-NEXT: addis r3, r2, .LCPI10_0@toc@ha405; CHECK-P8-NEXT: xvcvsxwdp vs4, v2406; CHECK-P8-NEXT: xsmulsp f1, f1, f0407; CHECK-P8-NEXT: xsmaddasp f4, f1, f0408; CHECK-P8-NEXT: lfs f1, .LCPI10_0@toc@l(r3)409; CHECK-P8-NEXT: xsmulsp f0, f0, f1410; CHECK-P8-NEXT: xsresp f1, f2411; CHECK-P8-NEXT: xsmulsp f0, f0, f4412; CHECK-P8-NEXT: xsmulsp f4, f0, f1413; CHECK-P8-NEXT: xsnmsubasp f0, f2, f4414; CHECK-P8-NEXT: xsmaddasp f4, f1, f0415; CHECK-P8-NEXT: xsmulsp f1, f3, f4416; CHECK-P8-NEXT: blr417;418; CHECK-P9-LABEL: rsqrt_fmul_fmf:419; CHECK-P9: # %bb.0:420; CHECK-P9-NEXT: xsrsqrtesp f0, f1421; CHECK-P9-NEXT: vspltisw v2, -3422; CHECK-P9-NEXT: addis r3, r2, .LCPI10_0@toc@ha423; CHECK-P9-NEXT: xsmulsp f1, f1, f0424; CHECK-P9-NEXT: xvcvsxwdp vs4, v2425; CHECK-P9-NEXT: xsmaddasp f4, f1, f0426; CHECK-P9-NEXT: lfs f1, .LCPI10_0@toc@l(r3)427; CHECK-P9-NEXT: xsmulsp f0, f0, f1428; CHECK-P9-NEXT: xsresp f1, f2429; CHECK-P9-NEXT: xsmulsp f0, f0, f4430; CHECK-P9-NEXT: xsmulsp f4, f0, f1431; CHECK-P9-NEXT: xsnmsubasp f0, f2, f4432; CHECK-P9-NEXT: xsmaddasp f4, f1, f0433; CHECK-P9-NEXT: xsmulsp f1, f3, f4434; CHECK-P9-NEXT: blr435 %x = call contract reassoc arcp nsz float @llvm.sqrt.f32(float %a)436 %y = fmul contract reassoc nsz float %x, %b437 %z = fdiv contract reassoc arcp nsz ninf float %c, %y438 ret float %z439}440 441define float @rsqrt_fmul_safe(float %a, float %b, float %c) {442; CHECK-P7-LABEL: rsqrt_fmul_safe:443; CHECK-P7: # %bb.0:444; CHECK-P7-NEXT: fsqrts f0, f1445; CHECK-P7-NEXT: fmuls f0, f0, f2446; CHECK-P7-NEXT: fdivs f1, f3, f0447; CHECK-P7-NEXT: blr448;449; CHECK-P8-LABEL: rsqrt_fmul_safe:450; CHECK-P8: # %bb.0:451; CHECK-P8-NEXT: xssqrtsp f0, f1452; CHECK-P8-NEXT: xsmulsp f0, f0, f2453; CHECK-P8-NEXT: xsdivsp f1, f3, f0454; CHECK-P8-NEXT: blr455;456; CHECK-P9-LABEL: rsqrt_fmul_safe:457; CHECK-P9: # %bb.0:458; CHECK-P9-NEXT: xssqrtsp f0, f1459; CHECK-P9-NEXT: xsmulsp f0, f0, f2460; CHECK-P9-NEXT: xsdivsp f1, f3, f0461; CHECK-P9-NEXT: blr462 %x = call float @llvm.sqrt.f32(float %a)463 %y = fmul float %x, %b464 %z = fdiv float %c, %y465 ret float %z466}467 468define <4 x float> @hoo_fmf(<4 x float> %a, <4 x float> %b) nounwind {469; CHECK-P7-LABEL: hoo_fmf:470; CHECK-P7: # %bb.0:471; CHECK-P7-NEXT: addis r3, r2, .LCPI12_0@toc@ha472; CHECK-P7-NEXT: vspltisw v4, -1473; CHECK-P7-NEXT: vrsqrtefp v5, v3474; CHECK-P7-NEXT: addi r3, r3, .LCPI12_0@toc@l475; CHECK-P7-NEXT: vslw v4, v4, v4476; CHECK-P7-NEXT: lvx v0, 0, r3477; CHECK-P7-NEXT: addis r3, r2, .LCPI12_1@toc@ha478; CHECK-P7-NEXT: vmaddfp v3, v3, v5, v4479; CHECK-P7-NEXT: addi r3, r3, .LCPI12_1@toc@l480; CHECK-P7-NEXT: vmaddfp v3, v3, v5, v0481; CHECK-P7-NEXT: lvx v0, 0, r3482; CHECK-P7-NEXT: vmaddfp v5, v5, v0, v4483; CHECK-P7-NEXT: vmaddfp v3, v5, v3, v4484; CHECK-P7-NEXT: vmaddfp v2, v2, v3, v4485; CHECK-P7-NEXT: blr486;487; CHECK-P8-LABEL: hoo_fmf:488; CHECK-P8: # %bb.0:489; CHECK-P8-NEXT: xvrsqrtesp vs0, v3490; CHECK-P8-NEXT: addis r3, r2, .LCPI12_0@toc@ha491; CHECK-P8-NEXT: addi r3, r3, .LCPI12_0@toc@l492; CHECK-P8-NEXT: lxvd2x vs2, 0, r3493; CHECK-P8-NEXT: addis r3, r2, .LCPI12_1@toc@ha494; CHECK-P8-NEXT: xvmulsp vs1, v3, vs0495; CHECK-P8-NEXT: addi r3, r3, .LCPI12_1@toc@l496; CHECK-P8-NEXT: xvmaddasp vs2, vs1, vs0497; CHECK-P8-NEXT: lxvd2x vs1, 0, r3498; CHECK-P8-NEXT: xvmulsp vs0, vs0, vs1499; CHECK-P8-NEXT: xvmulsp vs0, vs0, vs2500; CHECK-P8-NEXT: xvmulsp v2, v2, vs0501; CHECK-P8-NEXT: blr502;503; CHECK-P9-LABEL: hoo_fmf:504; CHECK-P9: # %bb.0:505; CHECK-P9-NEXT: xvrsqrtesp vs0, v3506; CHECK-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha507; CHECK-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l508; CHECK-P9-NEXT: lxv vs2, 0(r3)509; CHECK-P9-NEXT: addis r3, r2, .LCPI12_1@toc@ha510; CHECK-P9-NEXT: addi r3, r3, .LCPI12_1@toc@l511; CHECK-P9-NEXT: xvmulsp vs1, v3, vs0512; CHECK-P9-NEXT: xvmaddasp vs2, vs1, vs0513; CHECK-P9-NEXT: lxv vs1, 0(r3)514; CHECK-P9-NEXT: xvmulsp vs0, vs0, vs1515; CHECK-P9-NEXT: xvmulsp vs0, vs0, vs2516; CHECK-P9-NEXT: xvmulsp v2, v2, vs0517; CHECK-P9-NEXT: blr518 %x = call contract reassoc arcp <4 x float> @llvm.sqrt.v4f32(<4 x float> %b)519 %r = fdiv contract reassoc arcp <4 x float> %a, %x520 ret <4 x float> %r521}522 523define <4 x float> @hoo_safe(<4 x float> %a, <4 x float> %b) nounwind {524; CHECK-P7-LABEL: hoo_safe:525; CHECK-P7: # %bb.0:526; CHECK-P7-NEXT: addi r3, r1, -32527; CHECK-P7-NEXT: stvx v3, 0, r3528; CHECK-P7-NEXT: addi r3, r1, -48529; CHECK-P7-NEXT: lfs f3, -20(r1)530; CHECK-P7-NEXT: lfs f2, -24(r1)531; CHECK-P7-NEXT: lfs f0, -32(r1)532; CHECK-P7-NEXT: lfs f1, -28(r1)533; CHECK-P7-NEXT: fsqrts f3, f3534; CHECK-P7-NEXT: stvx v2, 0, r3535; CHECK-P7-NEXT: lfs f4, -36(r1)536; CHECK-P7-NEXT: fsqrts f2, f2537; CHECK-P7-NEXT: fsqrts f1, f1538; CHECK-P7-NEXT: fsqrts f0, f0539; CHECK-P7-NEXT: addi r3, r1, -16540; CHECK-P7-NEXT: fdivs f3, f4, f3541; CHECK-P7-NEXT: stfs f3, -4(r1)542; CHECK-P7-NEXT: lfs f3, -40(r1)543; CHECK-P7-NEXT: fdivs f2, f3, f2544; CHECK-P7-NEXT: stfs f2, -8(r1)545; CHECK-P7-NEXT: lfs f2, -44(r1)546; CHECK-P7-NEXT: fdivs f1, f2, f1547; CHECK-P7-NEXT: stfs f1, -12(r1)548; CHECK-P7-NEXT: lfs f1, -48(r1)549; CHECK-P7-NEXT: fdivs f0, f1, f0550; CHECK-P7-NEXT: stfs f0, -16(r1)551; CHECK-P7-NEXT: lvx v2, 0, r3552; CHECK-P7-NEXT: blr553;554; CHECK-P8-LABEL: hoo_safe:555; CHECK-P8: # %bb.0:556; CHECK-P8-NEXT: xvsqrtsp vs0, v3557; CHECK-P8-NEXT: xvdivsp v2, v2, vs0558; CHECK-P8-NEXT: blr559;560; CHECK-P9-LABEL: hoo_safe:561; CHECK-P9: # %bb.0:562; CHECK-P9-NEXT: xvsqrtsp vs0, v3563; CHECK-P9-NEXT: xvdivsp v2, v2, vs0564; CHECK-P9-NEXT: blr565 %x = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %b)566 %r = fdiv <4 x float> %a, %x567 ret <4 x float> %r568}569 570define double @foo2_fmf(double %a, double %b) nounwind {571; CHECK-P7-LABEL: foo2_fmf:572; CHECK-P7: # %bb.0:573; CHECK-P7-NEXT: fre f0, f2574; CHECK-P7-NEXT: addis r3, r2, .LCPI14_0@toc@ha575; CHECK-P7-NEXT: lfs f3, .LCPI14_0@toc@l(r3)576; CHECK-P7-NEXT: fmadd f3, f2, f0, f3577; CHECK-P7-NEXT: fnmsub f0, f0, f3, f0578; CHECK-P7-NEXT: fmul f3, f1, f0579; CHECK-P7-NEXT: fnmsub f1, f2, f3, f1580; CHECK-P7-NEXT: fmadd f1, f0, f1, f3581; CHECK-P7-NEXT: blr582;583; CHECK-P8-LABEL: foo2_fmf:584; CHECK-P8: # %bb.0:585; CHECK-P8-NEXT: vspltisw v2, -1586; CHECK-P8-NEXT: xsredp f3, f2587; CHECK-P8-NEXT: xvcvsxwdp vs0, v2588; CHECK-P8-NEXT: xsmaddadp f0, f2, f3589; CHECK-P8-NEXT: xsnmsubadp f3, f3, f0590; CHECK-P8-NEXT: xsmuldp f0, f1, f3591; CHECK-P8-NEXT: xsnmsubadp f1, f2, f0592; CHECK-P8-NEXT: xsmaddadp f0, f3, f1593; CHECK-P8-NEXT: fmr f1, f0594; CHECK-P8-NEXT: blr595;596; CHECK-P9-LABEL: foo2_fmf:597; CHECK-P9: # %bb.0:598; CHECK-P9-NEXT: vspltisw v2, -1599; CHECK-P9-NEXT: xsredp f3, f2600; CHECK-P9-NEXT: xvcvsxwdp vs0, v2601; CHECK-P9-NEXT: xsmaddadp f0, f2, f3602; CHECK-P9-NEXT: xsnmsubadp f3, f3, f0603; CHECK-P9-NEXT: xsmuldp f0, f1, f3604; CHECK-P9-NEXT: xsnmsubadp f1, f2, f0605; CHECK-P9-NEXT: xsmaddadp f0, f3, f1606; CHECK-P9-NEXT: fmr f1, f0607; CHECK-P9-NEXT: blr608 %r = fdiv contract reassoc arcp nsz ninf double %a, %b609 ret double %r610}611 612define double @foo2_safe(double %a, double %b) nounwind {613; CHECK-P7-LABEL: foo2_safe:614; CHECK-P7: # %bb.0:615; CHECK-P7-NEXT: fdiv f1, f1, f2616; CHECK-P7-NEXT: blr617;618; CHECK-P8-LABEL: foo2_safe:619; CHECK-P8: # %bb.0:620; CHECK-P8-NEXT: xsdivdp f1, f1, f2621; CHECK-P8-NEXT: blr622;623; CHECK-P9-LABEL: foo2_safe:624; CHECK-P9: # %bb.0:625; CHECK-P9-NEXT: xsdivdp f1, f1, f2626; CHECK-P9-NEXT: blr627 %r = fdiv double %a, %b628 ret double %r629}630 631define float @goo2_fmf(float %a, float %b) nounwind {632; CHECK-P7-LABEL: goo2_fmf:633; CHECK-P7: # %bb.0:634; CHECK-P7-NEXT: fres f0, f2635; CHECK-P7-NEXT: fmuls f3, f1, f0636; CHECK-P7-NEXT: fnmsubs f1, f2, f3, f1637; CHECK-P7-NEXT: fmadds f1, f0, f1, f3638; CHECK-P7-NEXT: blr639;640; CHECK-P8-LABEL: goo2_fmf:641; CHECK-P8: # %bb.0:642; CHECK-P8-NEXT: xsresp f3, f2643; CHECK-P8-NEXT: xsmulsp f0, f1, f3644; CHECK-P8-NEXT: xsnmsubasp f1, f2, f0645; CHECK-P8-NEXT: xsmaddasp f0, f3, f1646; CHECK-P8-NEXT: fmr f1, f0647; CHECK-P8-NEXT: blr648;649; CHECK-P9-LABEL: goo2_fmf:650; CHECK-P9: # %bb.0:651; CHECK-P9-NEXT: xsresp f3, f2652; CHECK-P9-NEXT: xsmulsp f0, f1, f3653; CHECK-P9-NEXT: xsnmsubasp f1, f2, f0654; CHECK-P9-NEXT: xsmaddasp f0, f3, f1655; CHECK-P9-NEXT: fmr f1, f0656; CHECK-P9-NEXT: blr657 %r = fdiv contract reassoc arcp nsz ninf float %a, %b658 ret float %r659}660 661define float @goo2_safe(float %a, float %b) nounwind {662; CHECK-P7-LABEL: goo2_safe:663; CHECK-P7: # %bb.0:664; CHECK-P7-NEXT: fdivs f1, f1, f2665; CHECK-P7-NEXT: blr666;667; CHECK-P8-LABEL: goo2_safe:668; CHECK-P8: # %bb.0:669; CHECK-P8-NEXT: xsdivsp f1, f1, f2670; CHECK-P8-NEXT: blr671;672; CHECK-P9-LABEL: goo2_safe:673; CHECK-P9: # %bb.0:674; CHECK-P9-NEXT: xsdivsp f1, f1, f2675; CHECK-P9-NEXT: blr676 %r = fdiv float %a, %b677 ret float %r678}679 680define <4 x float> @hoo2_fmf(<4 x float> %a, <4 x float> %b) nounwind {681; CHECK-P7-LABEL: hoo2_fmf:682; CHECK-P7: # %bb.0:683; CHECK-P7-NEXT: vspltisw v4, -1684; CHECK-P7-NEXT: vrefp v5, v3685; CHECK-P7-NEXT: vslw v4, v4, v4686; CHECK-P7-NEXT: vmaddfp v4, v2, v5, v4687; CHECK-P7-NEXT: vnmsubfp v2, v3, v4, v2688; CHECK-P7-NEXT: vmaddfp v2, v5, v2, v4689; CHECK-P7-NEXT: blr690;691; CHECK-P8-LABEL: hoo2_fmf:692; CHECK-P8: # %bb.0:693; CHECK-P8-NEXT: xvresp vs1, v3694; CHECK-P8-NEXT: xvmulsp vs0, v2, vs1695; CHECK-P8-NEXT: xvnmsubasp v2, v3, vs0696; CHECK-P8-NEXT: xvmaddasp vs0, vs1, v2697; CHECK-P8-NEXT: xxlor v2, vs0, vs0698; CHECK-P8-NEXT: blr699;700; CHECK-P9-LABEL: hoo2_fmf:701; CHECK-P9: # %bb.0:702; CHECK-P9-NEXT: xvresp vs1, v3703; CHECK-P9-NEXT: xvmulsp vs0, v2, vs1704; CHECK-P9-NEXT: xvnmsubasp v2, v3, vs0705; CHECK-P9-NEXT: xvmaddasp vs0, vs1, v2706; CHECK-P9-NEXT: xxlor v2, vs0, vs0707; CHECK-P9-NEXT: blr708 %r = fdiv contract reassoc arcp nsz ninf <4 x float> %a, %b709 ret <4 x float> %r710}711 712define <4 x float> @hoo2_safe(<4 x float> %a, <4 x float> %b) nounwind {713; CHECK-P7-LABEL: hoo2_safe:714; CHECK-P7: # %bb.0:715; CHECK-P7-NEXT: addi r3, r1, -32716; CHECK-P7-NEXT: stvx v3, 0, r3717; CHECK-P7-NEXT: addi r3, r1, -48718; CHECK-P7-NEXT: stvx v2, 0, r3719; CHECK-P7-NEXT: addi r3, r1, -16720; CHECK-P7-NEXT: lfs f0, -20(r1)721; CHECK-P7-NEXT: lfs f1, -36(r1)722; CHECK-P7-NEXT: fdivs f0, f1, f0723; CHECK-P7-NEXT: lfs f1, -40(r1)724; CHECK-P7-NEXT: stfs f0, -4(r1)725; CHECK-P7-NEXT: lfs f0, -24(r1)726; CHECK-P7-NEXT: fdivs f0, f1, f0727; CHECK-P7-NEXT: lfs f1, -44(r1)728; CHECK-P7-NEXT: stfs f0, -8(r1)729; CHECK-P7-NEXT: lfs f0, -28(r1)730; CHECK-P7-NEXT: fdivs f0, f1, f0731; CHECK-P7-NEXT: lfs f1, -48(r1)732; CHECK-P7-NEXT: stfs f0, -12(r1)733; CHECK-P7-NEXT: lfs f0, -32(r1)734; CHECK-P7-NEXT: fdivs f0, f1, f0735; CHECK-P7-NEXT: stfs f0, -16(r1)736; CHECK-P7-NEXT: lvx v2, 0, r3737; CHECK-P7-NEXT: blr738;739; CHECK-P8-LABEL: hoo2_safe:740; CHECK-P8: # %bb.0:741; CHECK-P8-NEXT: xvdivsp v2, v2, v3742; CHECK-P8-NEXT: blr743;744; CHECK-P9-LABEL: hoo2_safe:745; CHECK-P9: # %bb.0:746; CHECK-P9-NEXT: xvdivsp v2, v2, v3747; CHECK-P9-NEXT: blr748 %r = fdiv <4 x float> %a, %b749 ret <4 x float> %r750}751 752define double @foo3_fmf(double %a) nounwind {753; CHECK-P7-LABEL: foo3_fmf:754; CHECK-P7: # %bb.0:755; CHECK-P7-NEXT: ftsqrt cr0, f1756; CHECK-P7-NEXT: bc 12, eq, .LBB20_2757; CHECK-P7-NEXT: # %bb.1:758; CHECK-P7-NEXT: frsqrte f0, f1759; CHECK-P7-NEXT: addis r3, r2, .LCPI20_0@toc@ha760; CHECK-P7-NEXT: lfs f3, .LCPI20_0@toc@l(r3)761; CHECK-P7-NEXT: addis r3, r2, .LCPI20_1@toc@ha762; CHECK-P7-NEXT: lfs f4, .LCPI20_1@toc@l(r3)763; CHECK-P7-NEXT: fmul f2, f1, f0764; CHECK-P7-NEXT: fmadd f2, f2, f0, f3765; CHECK-P7-NEXT: fmul f0, f0, f4766; CHECK-P7-NEXT: fmul f0, f0, f2767; CHECK-P7-NEXT: fmul f1, f1, f0768; CHECK-P7-NEXT: fmadd f0, f1, f0, f3769; CHECK-P7-NEXT: fmul f1, f1, f4770; CHECK-P7-NEXT: fmul f1, f1, f0771; CHECK-P7-NEXT: blr772; CHECK-P7-NEXT: .LBB20_2:773; CHECK-P7-NEXT: fsqrt f1, f1774; CHECK-P7-NEXT: blr775;776; CHECK-P8-LABEL: foo3_fmf:777; CHECK-P8: # %bb.0:778; CHECK-P8-NEXT: xstsqrtdp cr0, f1779; CHECK-P8-NEXT: bc 12, eq, .LBB20_2780; CHECK-P8-NEXT: # %bb.1:781; CHECK-P8-NEXT: vspltisw v2, -3782; CHECK-P8-NEXT: xsrsqrtedp f0, f1783; CHECK-P8-NEXT: addis r3, r2, .LCPI20_0@toc@ha784; CHECK-P8-NEXT: xvcvsxwdp vs3, v2785; CHECK-P8-NEXT: xsmuldp f2, f1, f0786; CHECK-P8-NEXT: fmr f4, f3787; CHECK-P8-NEXT: xsmaddadp f4, f2, f0788; CHECK-P8-NEXT: lfs f2, .LCPI20_0@toc@l(r3)789; CHECK-P8-NEXT: xsmuldp f0, f0, f2790; CHECK-P8-NEXT: xsmuldp f0, f0, f4791; CHECK-P8-NEXT: xsmuldp f1, f1, f0792; CHECK-P8-NEXT: xsmaddadp f3, f1, f0793; CHECK-P8-NEXT: xsmuldp f0, f1, f2794; CHECK-P8-NEXT: xsmuldp f1, f0, f3795; CHECK-P8-NEXT: blr796; CHECK-P8-NEXT: .LBB20_2:797; CHECK-P8-NEXT: xssqrtdp f1, f1798; CHECK-P8-NEXT: blr799;800; CHECK-P9-LABEL: foo3_fmf:801; CHECK-P9: # %bb.0:802; CHECK-P9-NEXT: xstsqrtdp cr0, f1803; CHECK-P9-NEXT: bc 12, eq, .LBB20_2804; CHECK-P9-NEXT: # %bb.1:805; CHECK-P9-NEXT: xsrsqrtedp f0, f1806; CHECK-P9-NEXT: vspltisw v2, -3807; CHECK-P9-NEXT: addis r3, r2, .LCPI20_0@toc@ha808; CHECK-P9-NEXT: xsmuldp f2, f1, f0809; CHECK-P9-NEXT: xvcvsxwdp vs3, v2810; CHECK-P9-NEXT: fmr f4, f3811; CHECK-P9-NEXT: xsmaddadp f4, f2, f0812; CHECK-P9-NEXT: lfs f2, .LCPI20_0@toc@l(r3)813; CHECK-P9-NEXT: xsmuldp f0, f0, f2814; CHECK-P9-NEXT: xsmuldp f0, f0, f4815; CHECK-P9-NEXT: xsmuldp f1, f1, f0816; CHECK-P9-NEXT: xsmaddadp f3, f1, f0817; CHECK-P9-NEXT: xsmuldp f0, f1, f2818; CHECK-P9-NEXT: xsmuldp f1, f0, f3819; CHECK-P9-NEXT: blr820; CHECK-P9-NEXT: .LBB20_2:821; CHECK-P9-NEXT: xssqrtdp f1, f1822; CHECK-P9-NEXT: blr823 %r = call contract reassoc ninf afn double @llvm.sqrt.f64(double %a)824 ret double %r825}826 827define double @foo3_fmf_crbits_off(double %a) #2 {828; CHECK-P7-LABEL: foo3_fmf_crbits_off:829; CHECK-P7: # %bb.0:830; CHECK-P7-NEXT: fabs f0, f1831; CHECK-P7-NEXT: addis r3, r2, .LCPI21_2@toc@ha832; CHECK-P7-NEXT: lfd f2, .LCPI21_2@toc@l(r3)833; CHECK-P7-NEXT: fcmpu cr0, f0, f2834; CHECK-P7-NEXT: blt cr0, .LBB21_2835; CHECK-P7-NEXT: # %bb.1:836; CHECK-P7-NEXT: frsqrte f0, f1837; CHECK-P7-NEXT: addis r3, r2, .LCPI21_0@toc@ha838; CHECK-P7-NEXT: lfs f3, .LCPI21_0@toc@l(r3)839; CHECK-P7-NEXT: addis r3, r2, .LCPI21_1@toc@ha840; CHECK-P7-NEXT: lfs f4, .LCPI21_1@toc@l(r3)841; CHECK-P7-NEXT: fmul f2, f1, f0842; CHECK-P7-NEXT: fmadd f2, f2, f0, f3843; CHECK-P7-NEXT: fmul f0, f0, f4844; CHECK-P7-NEXT: fmul f0, f0, f2845; CHECK-P7-NEXT: fmul f1, f1, f0846; CHECK-P7-NEXT: fmadd f0, f1, f0, f3847; CHECK-P7-NEXT: fmul f1, f1, f4848; CHECK-P7-NEXT: fmul f1, f1, f0849; CHECK-P7-NEXT: blr850; CHECK-P7-NEXT: .LBB21_2:851; CHECK-P7-NEXT: fsqrt f1, f1852; CHECK-P7-NEXT: blr853;854; CHECK-P8-LABEL: foo3_fmf_crbits_off:855; CHECK-P8: # %bb.0:856; CHECK-P8-NEXT: addis r3, r2, .LCPI21_1@toc@ha857; CHECK-P8-NEXT: xsabsdp f0, f1858; CHECK-P8-NEXT: lfd f2, .LCPI21_1@toc@l(r3)859; CHECK-P8-NEXT: xscmpudp cr0, f0, f2860; CHECK-P8-NEXT: blt cr0, .LBB21_2861; CHECK-P8-NEXT: # %bb.1:862; CHECK-P8-NEXT: vspltisw v2, -3863; CHECK-P8-NEXT: xsrsqrtedp f0, f1864; CHECK-P8-NEXT: addis r3, r2, .LCPI21_0@toc@ha865; CHECK-P8-NEXT: xvcvsxwdp vs3, v2866; CHECK-P8-NEXT: xsmuldp f2, f1, f0867; CHECK-P8-NEXT: fmr f4, f3868; CHECK-P8-NEXT: xsmaddadp f4, f2, f0869; CHECK-P8-NEXT: lfs f2, .LCPI21_0@toc@l(r3)870; CHECK-P8-NEXT: xsmuldp f0, f0, f2871; CHECK-P8-NEXT: xsmuldp f0, f0, f4872; CHECK-P8-NEXT: xsmuldp f1, f1, f0873; CHECK-P8-NEXT: xsmaddadp f3, f1, f0874; CHECK-P8-NEXT: xsmuldp f0, f1, f2875; CHECK-P8-NEXT: xsmuldp f1, f0, f3876; CHECK-P8-NEXT: blr877; CHECK-P8-NEXT: .LBB21_2:878; CHECK-P8-NEXT: xssqrtdp f1, f1879; CHECK-P8-NEXT: blr880;881; CHECK-P9-LABEL: foo3_fmf_crbits_off:882; CHECK-P9: # %bb.0:883; CHECK-P9-NEXT: addis r3, r2, .LCPI21_1@toc@ha884; CHECK-P9-NEXT: xsabsdp f0, f1885; CHECK-P9-NEXT: lfd f2, .LCPI21_1@toc@l(r3)886; CHECK-P9-NEXT: xscmpudp cr0, f0, f2887; CHECK-P9-NEXT: blt cr0, .LBB21_2888; CHECK-P9-NEXT: # %bb.1:889; CHECK-P9-NEXT: xsrsqrtedp f0, f1890; CHECK-P9-NEXT: vspltisw v2, -3891; CHECK-P9-NEXT: addis r3, r2, .LCPI21_0@toc@ha892; CHECK-P9-NEXT: xsmuldp f2, f1, f0893; CHECK-P9-NEXT: xvcvsxwdp vs3, v2894; CHECK-P9-NEXT: fmr f4, f3895; CHECK-P9-NEXT: xsmaddadp f4, f2, f0896; CHECK-P9-NEXT: lfs f2, .LCPI21_0@toc@l(r3)897; CHECK-P9-NEXT: xsmuldp f0, f0, f2898; CHECK-P9-NEXT: xsmuldp f0, f0, f4899; CHECK-P9-NEXT: xsmuldp f1, f1, f0900; CHECK-P9-NEXT: xsmaddadp f3, f1, f0901; CHECK-P9-NEXT: xsmuldp f0, f1, f2902; CHECK-P9-NEXT: xsmuldp f1, f0, f3903; CHECK-P9-NEXT: blr904; CHECK-P9-NEXT: .LBB21_2:905; CHECK-P9-NEXT: xssqrtdp f1, f1906; CHECK-P9-NEXT: blr907 %r = call contract reassoc ninf afn double @llvm.sqrt.f64(double %a)908 ret double %r909}910 911define double @foo3_safe(double %a) nounwind {912; CHECK-P7-LABEL: foo3_safe:913; CHECK-P7: # %bb.0:914; CHECK-P7-NEXT: fsqrt f1, f1915; CHECK-P7-NEXT: blr916;917; CHECK-P8-LABEL: foo3_safe:918; CHECK-P8: # %bb.0:919; CHECK-P8-NEXT: xssqrtdp f1, f1920; CHECK-P8-NEXT: blr921;922; CHECK-P9-LABEL: foo3_safe:923; CHECK-P9: # %bb.0:924; CHECK-P9-NEXT: xssqrtdp f1, f1925; CHECK-P9-NEXT: blr926 %r = call double @llvm.sqrt.f64(double %a)927 ret double %r928}929 930define float @goo3_fmf(float %a) nounwind {931; CHECK-P7-LABEL: goo3_fmf:932; CHECK-P7: # %bb.0:933; CHECK-P7-NEXT: fabs f0, f1934; CHECK-P7-NEXT: addis r3, r2, .LCPI23_2@toc@ha935; CHECK-P7-NEXT: lfs f2, .LCPI23_2@toc@l(r3)936; CHECK-P7-NEXT: fcmpu cr0, f0, f2937; CHECK-P7-NEXT: blt cr0, .LBB23_2938; CHECK-P7-NEXT: # %bb.1:939; CHECK-P7-NEXT: frsqrtes f0, f1940; CHECK-P7-NEXT: addis r3, r2, .LCPI23_0@toc@ha941; CHECK-P7-NEXT: lfs f2, .LCPI23_0@toc@l(r3)942; CHECK-P7-NEXT: addis r3, r2, .LCPI23_1@toc@ha943; CHECK-P7-NEXT: fmuls f1, f1, f0944; CHECK-P7-NEXT: fmadds f0, f1, f0, f2945; CHECK-P7-NEXT: lfs f2, .LCPI23_1@toc@l(r3)946; CHECK-P7-NEXT: fmuls f1, f1, f2947; CHECK-P7-NEXT: fmuls f1, f1, f0948; CHECK-P7-NEXT: blr949; CHECK-P7-NEXT: .LBB23_2:950; CHECK-P7-NEXT: addis r3, r2, .LCPI23_3@toc@ha951; CHECK-P7-NEXT: lfs f1, .LCPI23_3@toc@l(r3)952; CHECK-P7-NEXT: blr953;954; CHECK-P8-LABEL: goo3_fmf:955; CHECK-P8: # %bb.0:956; CHECK-P8-NEXT: addis r3, r2, .LCPI23_1@toc@ha957; CHECK-P8-NEXT: xsabsdp f0, f1958; CHECK-P8-NEXT: lfs f2, .LCPI23_1@toc@l(r3)959; CHECK-P8-NEXT: fcmpu cr0, f0, f2960; CHECK-P8-NEXT: xxlxor f0, f0, f0961; CHECK-P8-NEXT: blt cr0, .LBB23_2962; CHECK-P8-NEXT: # %bb.1:963; CHECK-P8-NEXT: xsrsqrtesp f0, f1964; CHECK-P8-NEXT: vspltisw v2, -3965; CHECK-P8-NEXT: addis r3, r2, .LCPI23_0@toc@ha966; CHECK-P8-NEXT: xvcvsxwdp vs2, v2967; CHECK-P8-NEXT: xsmulsp f1, f1, f0968; CHECK-P8-NEXT: xsmaddasp f2, f1, f0969; CHECK-P8-NEXT: lfs f0, .LCPI23_0@toc@l(r3)970; CHECK-P8-NEXT: xsmulsp f0, f1, f0971; CHECK-P8-NEXT: xsmulsp f0, f0, f2972; CHECK-P8-NEXT: .LBB23_2:973; CHECK-P8-NEXT: fmr f1, f0974; CHECK-P8-NEXT: blr975;976; CHECK-P9-LABEL: goo3_fmf:977; CHECK-P9: # %bb.0:978; CHECK-P9-NEXT: addis r3, r2, .LCPI23_1@toc@ha979; CHECK-P9-NEXT: xsabsdp f0, f1980; CHECK-P9-NEXT: lfs f2, .LCPI23_1@toc@l(r3)981; CHECK-P9-NEXT: fcmpu cr0, f0, f2982; CHECK-P9-NEXT: xxlxor f0, f0, f0983; CHECK-P9-NEXT: blt cr0, .LBB23_2984; CHECK-P9-NEXT: # %bb.1:985; CHECK-P9-NEXT: xsrsqrtesp f0, f1986; CHECK-P9-NEXT: vspltisw v2, -3987; CHECK-P9-NEXT: addis r3, r2, .LCPI23_0@toc@ha988; CHECK-P9-NEXT: xsmulsp f1, f1, f0989; CHECK-P9-NEXT: xvcvsxwdp vs2, v2990; CHECK-P9-NEXT: xsmaddasp f2, f1, f0991; CHECK-P9-NEXT: lfs f0, .LCPI23_0@toc@l(r3)992; CHECK-P9-NEXT: xsmulsp f0, f1, f0993; CHECK-P9-NEXT: xsmulsp f0, f0, f2994; CHECK-P9-NEXT: .LBB23_2:995; CHECK-P9-NEXT: fmr f1, f0996; CHECK-P9-NEXT: blr997 %r = call contract reassoc ninf afn float @llvm.sqrt.f32(float %a)998 ret float %r999}1000 1001define float @goo3_safe(float %a) nounwind {1002; CHECK-P7-LABEL: goo3_safe:1003; CHECK-P7: # %bb.0:1004; CHECK-P7-NEXT: fsqrts f1, f11005; CHECK-P7-NEXT: blr1006;1007; CHECK-P8-LABEL: goo3_safe:1008; CHECK-P8: # %bb.0:1009; CHECK-P8-NEXT: xssqrtsp f1, f11010; CHECK-P8-NEXT: blr1011;1012; CHECK-P9-LABEL: goo3_safe:1013; CHECK-P9: # %bb.0:1014; CHECK-P9-NEXT: xssqrtsp f1, f11015; CHECK-P9-NEXT: blr1016 %r = call float @llvm.sqrt.f32(float %a)1017 ret float %r1018}1019 1020define <4 x float> @hoo3_fmf(<4 x float> %a) #1 {1021; CHECK-P7-LABEL: hoo3_fmf:1022; CHECK-P7: # %bb.0:1023; CHECK-P7-NEXT: addis r3, r2, .LCPI25_0@toc@ha1024; CHECK-P7-NEXT: vspltisw v3, -11025; CHECK-P7-NEXT: vrsqrtefp v4, v21026; CHECK-P7-NEXT: addi r3, r3, .LCPI25_0@toc@l1027; CHECK-P7-NEXT: vslw v3, v3, v31028; CHECK-P7-NEXT: lvx v0, 0, r31029; CHECK-P7-NEXT: addis r3, r2, .LCPI25_1@toc@ha1030; CHECK-P7-NEXT: vmaddfp v5, v2, v4, v31031; CHECK-P7-NEXT: addi r3, r3, .LCPI25_1@toc@l1032; CHECK-P7-NEXT: vmaddfp v4, v5, v4, v01033; CHECK-P7-NEXT: lvx v0, 0, r31034; CHECK-P7-NEXT: vmaddfp v5, v5, v0, v31035; CHECK-P7-NEXT: vmaddfp v3, v5, v4, v31036; CHECK-P7-NEXT: vxor v4, v4, v41037; CHECK-P7-NEXT: vcmpeqfp v2, v2, v41038; CHECK-P7-NEXT: vnot v2, v21039; CHECK-P7-NEXT: vand v2, v2, v31040; CHECK-P7-NEXT: blr1041;1042; CHECK-P8-LABEL: hoo3_fmf:1043; CHECK-P8: # %bb.0:1044; CHECK-P8-NEXT: xvtsqrtsp cr0, v21045; CHECK-P8-NEXT: bc 12, eq, .LBB25_21046; CHECK-P8-NEXT: # %bb.1:1047; CHECK-P8-NEXT: xvrsqrtesp vs0, v21048; CHECK-P8-NEXT: addis r3, r2, .LCPI25_0@toc@ha1049; CHECK-P8-NEXT: addi r3, r3, .LCPI25_0@toc@l1050; CHECK-P8-NEXT: lxvd2x vs2, 0, r31051; CHECK-P8-NEXT: addis r3, r2, .LCPI25_1@toc@ha1052; CHECK-P8-NEXT: xvmulsp vs1, v2, vs01053; CHECK-P8-NEXT: addi r3, r3, .LCPI25_1@toc@l1054; CHECK-P8-NEXT: xvmaddasp vs2, vs1, vs01055; CHECK-P8-NEXT: lxvd2x vs0, 0, r31056; CHECK-P8-NEXT: xvmulsp vs0, vs1, vs01057; CHECK-P8-NEXT: xvmulsp v2, vs0, vs21058; CHECK-P8-NEXT: blr1059; CHECK-P8-NEXT: .LBB25_2:1060; CHECK-P8-NEXT: xvsqrtsp v2, v21061; CHECK-P8-NEXT: blr1062;1063; CHECK-P9-LABEL: hoo3_fmf:1064; CHECK-P9: # %bb.0:1065; CHECK-P9-NEXT: xvtsqrtsp cr0, v21066; CHECK-P9-NEXT: bc 12, eq, .LBB25_21067; CHECK-P9-NEXT: # %bb.1:1068; CHECK-P9-NEXT: xvrsqrtesp vs0, v21069; CHECK-P9-NEXT: addis r3, r2, .LCPI25_0@toc@ha1070; CHECK-P9-NEXT: addi r3, r3, .LCPI25_0@toc@l1071; CHECK-P9-NEXT: lxv vs2, 0(r3)1072; CHECK-P9-NEXT: addis r3, r2, .LCPI25_1@toc@ha1073; CHECK-P9-NEXT: addi r3, r3, .LCPI25_1@toc@l1074; CHECK-P9-NEXT: xvmulsp vs1, v2, vs01075; CHECK-P9-NEXT: xvmaddasp vs2, vs1, vs01076; CHECK-P9-NEXT: lxv vs0, 0(r3)1077; CHECK-P9-NEXT: xvmulsp vs0, vs1, vs01078; CHECK-P9-NEXT: xvmulsp v2, vs0, vs21079; CHECK-P9-NEXT: blr1080; CHECK-P9-NEXT: .LBB25_2:1081; CHECK-P9-NEXT: xvsqrtsp v2, v21082; CHECK-P9-NEXT: blr1083 %r = call contract reassoc ninf afn <4 x float> @llvm.sqrt.v4f32(<4 x float> %a)1084 ret <4 x float> %r1085}1086 1087define <4 x float> @hoo3_safe(<4 x float> %a) nounwind {1088; CHECK-P7-LABEL: hoo3_safe:1089; CHECK-P7: # %bb.0:1090; CHECK-P7-NEXT: addi r3, r1, -321091; CHECK-P7-NEXT: stvx v2, 0, r31092; CHECK-P7-NEXT: addi r3, r1, -161093; CHECK-P7-NEXT: lfs f0, -20(r1)1094; CHECK-P7-NEXT: fsqrts f0, f01095; CHECK-P7-NEXT: stfs f0, -4(r1)1096; CHECK-P7-NEXT: lfs f0, -24(r1)1097; CHECK-P7-NEXT: fsqrts f0, f01098; CHECK-P7-NEXT: stfs f0, -8(r1)1099; CHECK-P7-NEXT: lfs f0, -28(r1)1100; CHECK-P7-NEXT: fsqrts f0, f01101; CHECK-P7-NEXT: stfs f0, -12(r1)1102; CHECK-P7-NEXT: lfs f0, -32(r1)1103; CHECK-P7-NEXT: fsqrts f0, f01104; CHECK-P7-NEXT: stfs f0, -16(r1)1105; CHECK-P7-NEXT: lvx v2, 0, r31106; CHECK-P7-NEXT: blr1107;1108; CHECK-P8-LABEL: hoo3_safe:1109; CHECK-P8: # %bb.0:1110; CHECK-P8-NEXT: xvsqrtsp v2, v21111; CHECK-P8-NEXT: blr1112;1113; CHECK-P9-LABEL: hoo3_safe:1114; CHECK-P9: # %bb.0:1115; CHECK-P9-NEXT: xvsqrtsp v2, v21116; CHECK-P9-NEXT: blr1117 %r = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a)1118 ret <4 x float> %r1119}1120 1121define <2 x double> @hoo4_fmf(<2 x double> %a) #1 {1122; CHECK-P7-LABEL: hoo4_fmf:1123; CHECK-P7: # %bb.0:1124; CHECK-P7-NEXT: ftsqrt cr0, f11125; CHECK-P7-NEXT: addis r3, r2, .LCPI27_0@toc@ha1126; CHECK-P7-NEXT: lfs f0, .LCPI27_0@toc@l(r3)1127; CHECK-P7-NEXT: addis r3, r2, .LCPI27_1@toc@ha1128; CHECK-P7-NEXT: lfs f3, .LCPI27_1@toc@l(r3)1129; CHECK-P7-NEXT: bc 12, eq, .LBB27_31130; CHECK-P7-NEXT: # %bb.1:1131; CHECK-P7-NEXT: frsqrte f4, f11132; CHECK-P7-NEXT: fmul f5, f1, f41133; CHECK-P7-NEXT: fmadd f5, f5, f4, f01134; CHECK-P7-NEXT: fmul f4, f4, f31135; CHECK-P7-NEXT: fmul f4, f4, f51136; CHECK-P7-NEXT: fmul f1, f1, f41137; CHECK-P7-NEXT: fmadd f4, f1, f4, f01138; CHECK-P7-NEXT: fmul f1, f1, f31139; CHECK-P7-NEXT: fmul f1, f1, f41140; CHECK-P7-NEXT: ftsqrt cr0, f21141; CHECK-P7-NEXT: bc 4, eq, .LBB27_41142; CHECK-P7-NEXT: .LBB27_2:1143; CHECK-P7-NEXT: fsqrt f2, f21144; CHECK-P7-NEXT: blr1145; CHECK-P7-NEXT: .LBB27_3:1146; CHECK-P7-NEXT: fsqrt f1, f11147; CHECK-P7-NEXT: ftsqrt cr0, f21148; CHECK-P7-NEXT: bc 12, eq, .LBB27_21149; CHECK-P7-NEXT: .LBB27_4:1150; CHECK-P7-NEXT: frsqrte f4, f21151; CHECK-P7-NEXT: fmul f5, f2, f41152; CHECK-P7-NEXT: fmadd f5, f5, f4, f01153; CHECK-P7-NEXT: fmul f4, f4, f31154; CHECK-P7-NEXT: fmul f4, f4, f51155; CHECK-P7-NEXT: fmul f2, f2, f41156; CHECK-P7-NEXT: fmadd f0, f2, f4, f01157; CHECK-P7-NEXT: fmul f2, f2, f31158; CHECK-P7-NEXT: fmul f2, f2, f01159; CHECK-P7-NEXT: blr1160;1161; CHECK-P8-LABEL: hoo4_fmf:1162; CHECK-P8: # %bb.0:1163; CHECK-P8-NEXT: xvtsqrtdp cr0, v21164; CHECK-P8-NEXT: bc 12, eq, .LBB27_21165; CHECK-P8-NEXT: # %bb.1:1166; CHECK-P8-NEXT: xvrsqrtedp vs0, v21167; CHECK-P8-NEXT: addis r3, r2, .LCPI27_0@toc@ha1168; CHECK-P8-NEXT: addi r3, r3, .LCPI27_0@toc@l1169; CHECK-P8-NEXT: lxvd2x vs2, 0, r31170; CHECK-P8-NEXT: addis r3, r2, .LCPI27_1@toc@ha1171; CHECK-P8-NEXT: xvmuldp vs1, v2, vs01172; CHECK-P8-NEXT: addi r3, r3, .LCPI27_1@toc@l1173; CHECK-P8-NEXT: xxlor vs3, vs2, vs21174; CHECK-P8-NEXT: xvmaddadp vs3, vs1, vs01175; CHECK-P8-NEXT: lxvd2x vs1, 0, r31176; CHECK-P8-NEXT: xvmuldp vs0, vs0, vs11177; CHECK-P8-NEXT: xvmuldp vs0, vs0, vs31178; CHECK-P8-NEXT: xvmuldp vs3, v2, vs01179; CHECK-P8-NEXT: xvmaddadp vs2, vs3, vs01180; CHECK-P8-NEXT: xvmuldp vs0, vs3, vs11181; CHECK-P8-NEXT: xvmuldp v2, vs0, vs21182; CHECK-P8-NEXT: blr1183; CHECK-P8-NEXT: .LBB27_2:1184; CHECK-P8-NEXT: xvsqrtdp v2, v21185; CHECK-P8-NEXT: blr1186;1187; CHECK-P9-LABEL: hoo4_fmf:1188; CHECK-P9: # %bb.0:1189; CHECK-P9-NEXT: xvtsqrtdp cr0, v21190; CHECK-P9-NEXT: bc 12, eq, .LBB27_21191; CHECK-P9-NEXT: # %bb.1:1192; CHECK-P9-NEXT: xvrsqrtedp vs0, v21193; CHECK-P9-NEXT: addis r3, r2, .LCPI27_0@toc@ha1194; CHECK-P9-NEXT: addi r3, r3, .LCPI27_0@toc@l1195; CHECK-P9-NEXT: lxv vs2, 0(r3)1196; CHECK-P9-NEXT: addis r3, r2, .LCPI27_1@toc@ha1197; CHECK-P9-NEXT: addi r3, r3, .LCPI27_1@toc@l1198; CHECK-P9-NEXT: xvmuldp vs1, v2, vs01199; CHECK-P9-NEXT: xxlor vs3, vs2, vs21200; CHECK-P9-NEXT: xvmaddadp vs3, vs1, vs01201; CHECK-P9-NEXT: lxv vs1, 0(r3)1202; CHECK-P9-NEXT: xvmuldp vs0, vs0, vs11203; CHECK-P9-NEXT: xvmuldp vs0, vs0, vs31204; CHECK-P9-NEXT: xvmuldp vs3, v2, vs01205; CHECK-P9-NEXT: xvmaddadp vs2, vs3, vs01206; CHECK-P9-NEXT: xvmuldp vs0, vs3, vs11207; CHECK-P9-NEXT: xvmuldp v2, vs0, vs21208; CHECK-P9-NEXT: blr1209; CHECK-P9-NEXT: .LBB27_2:1210; CHECK-P9-NEXT: xvsqrtdp v2, v21211; CHECK-P9-NEXT: blr1212 %r = call contract reassoc ninf afn <2 x double> @llvm.sqrt.v2f64(<2 x double> %a)1213 ret <2 x double> %r1214}1215 1216define <2 x double> @hoo4_safe(<2 x double> %a) #1 {1217; CHECK-P7-LABEL: hoo4_safe:1218; CHECK-P7: # %bb.0:1219; CHECK-P7-NEXT: fsqrt f1, f11220; CHECK-P7-NEXT: fsqrt f2, f21221; CHECK-P7-NEXT: blr1222;1223; CHECK-P8-LABEL: hoo4_safe:1224; CHECK-P8: # %bb.0:1225; CHECK-P8-NEXT: xvsqrtdp v2, v21226; CHECK-P8-NEXT: blr1227;1228; CHECK-P9-LABEL: hoo4_safe:1229; CHECK-P9: # %bb.0:1230; CHECK-P9-NEXT: xvsqrtdp v2, v21231; CHECK-P9-NEXT: blr1232 %r = call <2 x double> @llvm.sqrt.v2f64(<2 x double> %a)1233 ret <2 x double> %r1234}1235 1236define fp128 @hoo5_fmf(fp128 %a) #1 {1237; CHECK-P7-LABEL: hoo5_fmf:1238; CHECK-P7: # %bb.0:1239; CHECK-P7-NEXT: mflr r01240; CHECK-P7-NEXT: stdu r1, -112(r1)1241; CHECK-P7-NEXT: std r0, 128(r1)1242; CHECK-P7-NEXT: bl sqrtf1281243; CHECK-P7-NEXT: nop1244; CHECK-P7-NEXT: addi r1, r1, 1121245; CHECK-P7-NEXT: ld r0, 16(r1)1246; CHECK-P7-NEXT: mtlr r01247; CHECK-P7-NEXT: blr1248;1249; CHECK-P8-LABEL: hoo5_fmf:1250; CHECK-P8: # %bb.0:1251; CHECK-P8-NEXT: mflr r01252; CHECK-P8-NEXT: stdu r1, -32(r1)1253; CHECK-P8-NEXT: std r0, 48(r1)1254; CHECK-P8-NEXT: bl sqrtf1281255; CHECK-P8-NEXT: nop1256; CHECK-P8-NEXT: addi r1, r1, 321257; CHECK-P8-NEXT: ld r0, 16(r1)1258; CHECK-P8-NEXT: mtlr r01259; CHECK-P8-NEXT: blr1260;1261; CHECK-P9-LABEL: hoo5_fmf:1262; CHECK-P9: # %bb.0:1263; CHECK-P9-NEXT: xssqrtqp v2, v21264; CHECK-P9-NEXT: blr1265 %r = call contract reassoc ninf afn fp128 @llvm.sqrt.f128(fp128 %a)1266 ret fp128 %r1267}1268 1269define fp128 @hoo5_safe(fp128 %a) #1 {1270; CHECK-P7-LABEL: hoo5_safe:1271; CHECK-P7: # %bb.0:1272; CHECK-P7-NEXT: mflr r01273; CHECK-P7-NEXT: stdu r1, -112(r1)1274; CHECK-P7-NEXT: std r0, 128(r1)1275; CHECK-P7-NEXT: bl sqrtf1281276; CHECK-P7-NEXT: nop1277; CHECK-P7-NEXT: addi r1, r1, 1121278; CHECK-P7-NEXT: ld r0, 16(r1)1279; CHECK-P7-NEXT: mtlr r01280; CHECK-P7-NEXT: blr1281;1282; CHECK-P8-LABEL: hoo5_safe:1283; CHECK-P8: # %bb.0:1284; CHECK-P8-NEXT: mflr r01285; CHECK-P8-NEXT: stdu r1, -32(r1)1286; CHECK-P8-NEXT: std r0, 48(r1)1287; CHECK-P8-NEXT: bl sqrtf1281288; CHECK-P8-NEXT: nop1289; CHECK-P8-NEXT: addi r1, r1, 321290; CHECK-P8-NEXT: ld r0, 16(r1)1291; CHECK-P8-NEXT: mtlr r01292; CHECK-P8-NEXT: blr1293;1294; CHECK-P9-LABEL: hoo5_safe:1295; CHECK-P9: # %bb.0:1296; CHECK-P9-NEXT: xssqrtqp v2, v21297; CHECK-P9-NEXT: blr1298 %r = call fp128 @llvm.sqrt.f128(fp128 %a)1299 ret fp128 %r1300}1301 1302attributes #0 = { nounwind "reciprocal-estimates"="sqrtf:0,sqrtd:0" }1303attributes #1 = { nounwind "denormal-fp-math"="preserve-sign,preserve-sign" }1304attributes #2 = { nounwind readnone "target-features"="-crbits" }1305