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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- < %s | FileCheck %s3 4; Check if this causes infinite loop when estimation disabled5define <4 x float> @repeated_fp_divisor_noest(float %a, <4 x float> %b) {6; CHECK-LABEL: repeated_fp_divisor_noest:7; CHECK: # %bb.0:8; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha9; CHECK-NEXT: xscvdpspn 0, 110; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l11; CHECK-NEXT: lxvd2x 1, 0, 312; CHECK-NEXT: addis 3, 2, .LCPI0_1@toc@ha13; CHECK-NEXT: addi 3, 3, .LCPI0_1@toc@l14; CHECK-NEXT: lxvd2x 2, 0, 315; CHECK-NEXT: xxspltw 0, 0, 016; CHECK-NEXT: xvdivsp 0, 2, 017; CHECK-NEXT: xxswapd 35, 118; CHECK-NEXT: xvmulsp 1, 34, 3519; CHECK-NEXT: xvmulsp 34, 1, 020; CHECK-NEXT: blr21 %ins = insertelement <4 x float> undef, float %a, i32 022 %splat = shufflevector <4 x float> %ins, <4 x float> undef, <4 x i32> zeroinitializer23 %t1 = fmul reassoc <4 x float> %b, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0x3FF028F5C0000000>24 %mul = fdiv reassoc arcp nsz <4 x float> %t1, %splat25 ret <4 x float> %mul26}27 28define <4 x float> @repeated_fp_divisor(float %a, <4 x float> %b) {29; CHECK-LABEL: repeated_fp_divisor:30; CHECK: # %bb.0:31; CHECK-NEXT: xscvdpspn 0, 132; CHECK-NEXT: addis 3, 2, .LCPI1_1@toc@ha33; CHECK-NEXT: addi 3, 3, .LCPI1_1@toc@l34; CHECK-NEXT: lxvd2x 1, 0, 335; CHECK-NEXT: addis 3, 2, .LCPI1_0@toc@ha36; CHECK-NEXT: addi 3, 3, .LCPI1_0@toc@l37; CHECK-NEXT: xxspltw 0, 0, 038; CHECK-NEXT: xvresp 2, 039; CHECK-NEXT: xxswapd 35, 140; CHECK-NEXT: lxvd2x 1, 0, 341; CHECK-NEXT: xvmaddasp 1, 0, 242; CHECK-NEXT: xvmulsp 0, 34, 3543; CHECK-NEXT: xvnmsubasp 2, 2, 144; CHECK-NEXT: xvmulsp 34, 0, 245; CHECK-NEXT: blr46 %ins = insertelement <4 x float> undef, float %a, i32 047 %splat = shufflevector <4 x float> %ins, <4 x float> undef, <4 x i32> zeroinitializer48 %t1 = fmul contract reassoc <4 x float> %b, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0x3FF028F5C0000000>49 %mul = fdiv contract reassoc arcp nsz ninf <4 x float> %t1, %splat50 ret <4 x float> %mul51}52 53