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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \3; RUN: -ppc-asm-full-reg-names < %s | FileCheck -check-prefixes=CHECK-PWR9 %s4; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \5; RUN: -ppc-asm-full-reg-names < %s | FileCheck -check-prefixes=CHECK-PWR8 %s6; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mtriple=powerpc64-unknown-unknown \7; RUN: -ppc-asm-full-reg-names < %s | FileCheck -check-prefixes=CHECK-PWR7 %s8 9define <1 x i64> @setcc_v1i128(<1 x i128> %a) {10; CHECK-PWR9-LABEL: setcc_v1i128:11; CHECK-PWR9: # %bb.0: # %entry12; CHECK-PWR9-NEXT: mfvsrld r3, vs3413; CHECK-PWR9-NEXT: cmpldi r3, 3570814; CHECK-PWR9-NEXT: mfvsrd r3, vs3415; CHECK-PWR9-NEXT: cmpdi cr1, r3, 016; CHECK-PWR9-NEXT: li r3, 117; CHECK-PWR9-NEXT: crnand 4*cr5+lt, 4*cr1+eq, lt18; CHECK-PWR9-NEXT: isel r3, 0, r3, 4*cr5+lt19; CHECK-PWR9-NEXT: blr20;21; CHECK-PWR8-LABEL: setcc_v1i128:22; CHECK-PWR8: # %bb.0: # %entry23; CHECK-PWR8-NEXT: mfvsrd r3, vs3424; CHECK-PWR8-NEXT: xxswapd vs0, vs3425; CHECK-PWR8-NEXT: cmpdi r3, 026; CHECK-PWR8-NEXT: mffprd r3, f027; CHECK-PWR8-NEXT: cmpldi cr1, r3, 3570828; CHECK-PWR8-NEXT: li r3, 129; CHECK-PWR8-NEXT: crnand 4*cr5+lt, eq, 4*cr1+lt30; CHECK-PWR8-NEXT: isel r3, 0, r3, 4*cr5+lt31; CHECK-PWR8-NEXT: blr32;33; CHECK-PWR7-LABEL: setcc_v1i128:34; CHECK-PWR7: # %bb.0: # %entry35; CHECK-PWR7-NEXT: li r5, 036; CHECK-PWR7-NEXT: cntlzd r3, r337; CHECK-PWR7-NEXT: ori r5, r5, 3570838; CHECK-PWR7-NEXT: rldicl r3, r3, 58, 6339; CHECK-PWR7-NEXT: subc r5, r4, r540; CHECK-PWR7-NEXT: subfe r4, r4, r441; CHECK-PWR7-NEXT: neg r4, r442; CHECK-PWR7-NEXT: and r3, r3, r443; CHECK-PWR7-NEXT: blr44entry:45 %0 = icmp ult <1 x i128> %a, <i128 35708>46 %1 = zext <1 x i1> %0 to <1 x i64>47 ret <1 x i64> %148}49 50