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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -O1 -mtriple ppc32le -o - %s | FileCheck --check-prefix CHECK-LE %s3; RUN: llc -O1 -mtriple ppc32 -o - %s | FileCheck --check-prefix CHECK-BE %s4 5; A collection of regression tests to verify the load-narrowing part of6; TargetLowering::SimplifySetCC (and/or other similar rewrites such as7; combining AND+LOAD into ZEXTLOAD).8 9 10;--------------------------------------------------------------------------11; Test non byte-sized types.12;13; As long as LLVM IR isn't defining where the padding goes we can't really14; optimize these (without adding a target lowering hook that can inform15; ISel about which bits are padding).16; --------------------------------------------------------------------------17 18define i1 @test_129_15_0(ptr %y) {19; CHECK-LE-LABEL: test_129_15_0:20; CHECK-LE: # %bb.0:21; CHECK-LE-NEXT: lhz 3, 0(3)22; CHECK-LE-NEXT: clrlwi 3, 3, 1723; CHECK-LE-NEXT: addic 4, 3, -124; CHECK-LE-NEXT: subfe 3, 4, 325; CHECK-LE-NEXT: blr26;27; CHECK-BE-LABEL: test_129_15_0:28; CHECK-BE: # %bb.0:29; CHECK-BE-NEXT: lhz 3, 15(3)30; CHECK-BE-NEXT: clrlwi 3, 3, 1731; CHECK-BE-NEXT: addic 4, 3, -132; CHECK-BE-NEXT: subfe 3, 4, 333; CHECK-BE-NEXT: blr34 %a = load i129, ptr %y35 %b = and i129 %a, u0x7fff36 %cmp = icmp ne i129 %b, 037 ret i1 %cmp38}39 40define i1 @test_126_20_4(ptr %y) {41; CHECK-LE-LABEL: test_126_20_4:42; CHECK-LE: # %bb.0:43; CHECK-LE-NEXT: lwz 3, 0(3)44; CHECK-LE-NEXT: rlwinm 3, 3, 0, 8, 2745; CHECK-LE-NEXT: addic 4, 3, -146; CHECK-LE-NEXT: subfe 3, 4, 347; CHECK-LE-NEXT: blr48;49; CHECK-BE-LABEL: test_126_20_4:50; CHECK-BE: # %bb.0:51; CHECK-BE-NEXT: lwz 3, 12(3)52; CHECK-BE-NEXT: rlwinm 3, 3, 0, 8, 2753; CHECK-BE-NEXT: addic 4, 3, -154; CHECK-BE-NEXT: subfe 3, 4, 355; CHECK-BE-NEXT: blr56 %a = load i126, ptr %y57 %b = and i126 %a, u0xfffff058 %cmp = icmp ne i126 %b, 059 ret i1 %cmp60}61 62define i1 @test_33_8_0(ptr %y) {63; CHECK-LE-LABEL: test_33_8_0:64; CHECK-LE: # %bb.0:65; CHECK-LE-NEXT: lbz 3, 0(3)66; CHECK-LE-NEXT: addic 4, 3, -167; CHECK-LE-NEXT: subfe 3, 4, 368; CHECK-LE-NEXT: blr69;70; CHECK-BE-LABEL: test_33_8_0:71; CHECK-BE: # %bb.0:72; CHECK-BE-NEXT: lbz 3, 4(3)73; CHECK-BE-NEXT: addic 4, 3, -174; CHECK-BE-NEXT: subfe 3, 4, 375; CHECK-BE-NEXT: blr76 %a = load i33, ptr %y77 %b = and i33 %a, u0xff78 %cmp = icmp ne i33 %b, 079 ret i1 %cmp80}81 82define i1 @test_33_1_32(ptr %y) {83; CHECK-LE-LABEL: test_33_1_32:84; CHECK-LE: # %bb.0:85; CHECK-LE-NEXT: lbz 3, 4(3)86; CHECK-LE-NEXT: blr87;88; CHECK-BE-LABEL: test_33_1_32:89; CHECK-BE: # %bb.0:90; CHECK-BE-NEXT: lwz 3, 0(3)91; CHECK-BE-NEXT: srwi 3, 3, 2492; CHECK-BE-NEXT: blr93 %a = load i33, ptr %y94 %b = and i33 %a, u0x10000000095 %cmp = icmp ne i33 %b, 096 ret i1 %cmp97}98 99define i1 @test_33_1_31(ptr %y) {100; CHECK-LE-LABEL: test_33_1_31:101; CHECK-LE: # %bb.0:102; CHECK-LE-NEXT: lbz 3, 3(3)103; CHECK-LE-NEXT: srwi 3, 3, 7104; CHECK-LE-NEXT: blr105;106; CHECK-BE-LABEL: test_33_1_31:107; CHECK-BE: # %bb.0:108; CHECK-BE-NEXT: lbz 3, 1(3)109; CHECK-BE-NEXT: srwi 3, 3, 7110; CHECK-BE-NEXT: blr111 %a = load i33, ptr %y112 %b = and i33 %a, u0x80000000113 %cmp = icmp ne i33 %b, 0114 ret i1 %cmp115}116 117define i1 @test_33_1_0(ptr %y) {118; CHECK-LE-LABEL: test_33_1_0:119; CHECK-LE: # %bb.0:120; CHECK-LE-NEXT: lbz 3, 0(3)121; CHECK-LE-NEXT: clrlwi 3, 3, 31122; CHECK-LE-NEXT: blr123;124; CHECK-BE-LABEL: test_33_1_0:125; CHECK-BE: # %bb.0:126; CHECK-BE-NEXT: lbz 3, 4(3)127; CHECK-BE-NEXT: clrlwi 3, 3, 31128; CHECK-BE-NEXT: blr129 %a = load i33, ptr %y130 %b = and i33 %a, u0x1131 %cmp = icmp ne i33 %b, 0132 ret i1 %cmp133}134 135;--------------------------------------------------------------------------136; Test byte-sized types.137;--------------------------------------------------------------------------138 139 140define i1 @test_128_20_4(ptr %y) {141; CHECK-LE-LABEL: test_128_20_4:142; CHECK-LE: # %bb.0:143; CHECK-LE-NEXT: lwz 3, 0(3)144; CHECK-LE-NEXT: rlwinm 3, 3, 0, 8, 27145; CHECK-LE-NEXT: addic 4, 3, -1146; CHECK-LE-NEXT: subfe 3, 4, 3147; CHECK-LE-NEXT: blr148;149; CHECK-BE-LABEL: test_128_20_4:150; CHECK-BE: # %bb.0:151; CHECK-BE-NEXT: lwz 3, 12(3)152; CHECK-BE-NEXT: rlwinm 3, 3, 0, 8, 27153; CHECK-BE-NEXT: addic 4, 3, -1154; CHECK-BE-NEXT: subfe 3, 4, 3155; CHECK-BE-NEXT: blr156 %a = load i128, ptr %y157 %b = and i128 %a, u0xfffff0158 %cmp = icmp ne i128 %b, 0159 ret i1 %cmp160}161 162define i1 @test_48_16_0(ptr %y) {163; CHECK-LE-LABEL: test_48_16_0:164; CHECK-LE: # %bb.0:165; CHECK-LE-NEXT: lhz 3, 0(3)166; CHECK-LE-NEXT: addic 4, 3, -1167; CHECK-LE-NEXT: subfe 3, 4, 3168; CHECK-LE-NEXT: blr169;170; CHECK-BE-LABEL: test_48_16_0:171; CHECK-BE: # %bb.0:172; CHECK-BE-NEXT: lhz 3, 4(3)173; CHECK-BE-NEXT: addic 4, 3, -1174; CHECK-BE-NEXT: subfe 3, 4, 3175; CHECK-BE-NEXT: blr176 %a = load i48, ptr %y177 %b = and i48 %a, u0xffff178 %cmp = icmp ne i48 %b, 0179 ret i1 %cmp180}181 182define i1 @test_48_16_8(ptr %y) {183; CHECK-LE-LABEL: test_48_16_8:184; CHECK-LE: # %bb.0:185; CHECK-LE-NEXT: lhz 3, 1(3)186; CHECK-LE-NEXT: addic 4, 3, -1187; CHECK-LE-NEXT: subfe 3, 4, 3188; CHECK-LE-NEXT: blr189;190; CHECK-BE-LABEL: test_48_16_8:191; CHECK-BE: # %bb.0:192; CHECK-BE-NEXT: lhz 3, 3(3)193; CHECK-BE-NEXT: addic 4, 3, -1194; CHECK-BE-NEXT: subfe 3, 4, 3195; CHECK-BE-NEXT: blr196 %a = load i48, ptr %y197 %b = and i48 %a, u0xffff00198 %cmp = icmp ne i48 %b, 0199 ret i1 %cmp200}201 202define i1 @test_48_16_16(ptr %y) {203; CHECK-LE-LABEL: test_48_16_16:204; CHECK-LE: # %bb.0:205; CHECK-LE-NEXT: lhz 3, 2(3)206; CHECK-LE-NEXT: addic 4, 3, -1207; CHECK-LE-NEXT: subfe 3, 4, 3208; CHECK-LE-NEXT: blr209;210; CHECK-BE-LABEL: test_48_16_16:211; CHECK-BE: # %bb.0:212; CHECK-BE-NEXT: lhz 3, 2(3)213; CHECK-BE-NEXT: addic 4, 3, -1214; CHECK-BE-NEXT: subfe 3, 4, 3215; CHECK-BE-NEXT: blr216 %a = load i48, ptr %y217 %b = and i48 %a, u0xffff0000218 %cmp = icmp ne i48 %b, 0219 ret i1 %cmp220}221 222define i1 @test_48_16_32(ptr %y) {223; CHECK-LE-LABEL: test_48_16_32:224; CHECK-LE: # %bb.0:225; CHECK-LE-NEXT: lhz 3, 4(3)226; CHECK-LE-NEXT: addic 4, 3, -1227; CHECK-LE-NEXT: subfe 3, 4, 3228; CHECK-LE-NEXT: blr229;230; CHECK-BE-LABEL: test_48_16_32:231; CHECK-BE: # %bb.0:232; CHECK-BE-NEXT: lhz 3, 0(3)233; CHECK-BE-NEXT: addic 4, 3, -1234; CHECK-BE-NEXT: subfe 3, 4, 3235; CHECK-BE-NEXT: blr236 %a = load i48, ptr %y237 %b = and i48 %a, u0xffff00000000238 %cmp = icmp ne i48 %b, 0239 ret i1 %cmp240}241 242define i1 @test_48_17_0(ptr %y) {243; CHECK-LE-LABEL: test_48_17_0:244; CHECK-LE: # %bb.0:245; CHECK-LE-NEXT: lwz 3, 0(3)246; CHECK-LE-NEXT: clrlwi 3, 3, 15247; CHECK-LE-NEXT: addic 4, 3, -1248; CHECK-LE-NEXT: subfe 3, 4, 3249; CHECK-LE-NEXT: blr250;251; CHECK-BE-LABEL: test_48_17_0:252; CHECK-BE: # %bb.0:253; CHECK-BE-NEXT: lwz 3, 2(3)254; CHECK-BE-NEXT: clrlwi 3, 3, 15255; CHECK-BE-NEXT: addic 4, 3, -1256; CHECK-BE-NEXT: subfe 3, 4, 3257; CHECK-BE-NEXT: blr258 %a = load i48, ptr %y259 %b = and i48 %a, u0x1ffff260 %cmp = icmp ne i48 %b, 0261 ret i1 %cmp262}263 264define i1 @test_40_16_0(ptr %y) {265; CHECK-LE-LABEL: test_40_16_0:266; CHECK-LE: # %bb.0:267; CHECK-LE-NEXT: lhz 3, 0(3)268; CHECK-LE-NEXT: addic 4, 3, -1269; CHECK-LE-NEXT: subfe 3, 4, 3270; CHECK-LE-NEXT: blr271;272; CHECK-BE-LABEL: test_40_16_0:273; CHECK-BE: # %bb.0:274; CHECK-BE-NEXT: lhz 3, 3(3)275; CHECK-BE-NEXT: addic 4, 3, -1276; CHECK-BE-NEXT: subfe 3, 4, 3277; CHECK-BE-NEXT: blr278 %a = load i40, ptr %y279 %b = and i40 %a, u0xffff280 %cmp = icmp ne i40 %b, 0281 ret i1 %cmp282}283 284define i1 @test_40_1_32(ptr %y) {285; CHECK-LE-LABEL: test_40_1_32:286; CHECK-LE: # %bb.0:287; CHECK-LE-NEXT: lbz 3, 4(3)288; CHECK-LE-NEXT: clrlwi 3, 3, 31289; CHECK-LE-NEXT: blr290;291; CHECK-BE-LABEL: test_40_1_32:292; CHECK-BE: # %bb.0:293; CHECK-BE-NEXT: lbz 3, 0(3)294; CHECK-BE-NEXT: clrlwi 3, 3, 31295; CHECK-BE-NEXT: blr296 %a = load i40, ptr %y297 %b = and i40 %a, u0x100000000298 %cmp = icmp ne i40 %b, 0299 ret i1 %cmp300}301 302define i1 @test_24_16_0(ptr %y) {303; CHECK-LE-LABEL: test_24_16_0:304; CHECK-LE: # %bb.0:305; CHECK-LE-NEXT: lhz 3, 0(3)306; CHECK-LE-NEXT: addic 4, 3, -1307; CHECK-LE-NEXT: subfe 3, 4, 3308; CHECK-LE-NEXT: blr309;310; CHECK-BE-LABEL: test_24_16_0:311; CHECK-BE: # %bb.0:312; CHECK-BE-NEXT: lhz 3, 1(3)313; CHECK-BE-NEXT: addic 4, 3, -1314; CHECK-BE-NEXT: subfe 3, 4, 3315; CHECK-BE-NEXT: blr316 %a = load i24, ptr %y317 %b = and i24 %a, u0xffff318 %cmp = icmp ne i24 %b, 0319 ret i1 %cmp320}321 322define i1 @test_24_8_8(ptr %y) {323; CHECK-LE-LABEL: test_24_8_8:324; CHECK-LE: # %bb.0:325; CHECK-LE-NEXT: lbz 3, 1(3)326; CHECK-LE-NEXT: addic 4, 3, -1327; CHECK-LE-NEXT: subfe 3, 4, 3328; CHECK-LE-NEXT: blr329;330; CHECK-BE-LABEL: test_24_8_8:331; CHECK-BE: # %bb.0:332; CHECK-BE-NEXT: lbz 3, 1(3)333; CHECK-BE-NEXT: addic 4, 3, -1334; CHECK-BE-NEXT: subfe 3, 4, 3335; CHECK-BE-NEXT: blr336 %a = load i24, ptr %y337 %b = and i24 %a, u0xff00338 %cmp = icmp ne i24 %b, 0339 ret i1 %cmp340}341 342define i1 @test_24_8_12(ptr %y) {343; CHECK-LE-LABEL: test_24_8_12:344; CHECK-LE: # %bb.0:345; CHECK-LE-NEXT: lhz 3, 1(3)346; CHECK-LE-NEXT: rlwinm 3, 3, 0, 20, 27347; CHECK-LE-NEXT: addic 4, 3, -1348; CHECK-LE-NEXT: subfe 3, 4, 3349; CHECK-LE-NEXT: blr350;351; CHECK-BE-LABEL: test_24_8_12:352; CHECK-BE: # %bb.0:353; CHECK-BE-NEXT: lhz 3, 0(3)354; CHECK-BE-NEXT: rlwinm 3, 3, 0, 20, 27355; CHECK-BE-NEXT: addic 4, 3, -1356; CHECK-BE-NEXT: subfe 3, 4, 3357; CHECK-BE-NEXT: blr358 %a = load i24, ptr %y359 %b = and i24 %a, u0xff000360 %cmp = icmp ne i24 %b, 0361 ret i1 %cmp362}363 364define i1 @test_24_8_16(ptr %y) {365; CHECK-LE-LABEL: test_24_8_16:366; CHECK-LE: # %bb.0:367; CHECK-LE-NEXT: lbz 3, 2(3)368; CHECK-LE-NEXT: addic 4, 3, -1369; CHECK-LE-NEXT: subfe 3, 4, 3370; CHECK-LE-NEXT: blr371;372; CHECK-BE-LABEL: test_24_8_16:373; CHECK-BE: # %bb.0:374; CHECK-BE-NEXT: lbz 3, 0(3)375; CHECK-BE-NEXT: addic 4, 3, -1376; CHECK-BE-NEXT: subfe 3, 4, 3377; CHECK-BE-NEXT: blr378 %a = load i24, ptr %y379 %b = and i24 %a, u0xff0000380 %cmp = icmp ne i24 %b, 0381 ret i1 %cmp382}383