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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -o - %s -verify-machineinstrs \3# RUN: -run-pass=machine-sink | FileCheck %s4 5--- |6 ; ModuleID = 'sink-down-more-instructions-regpressure-high.ll'7 source_filename = "sink-down-more-instructions-regpressure-high.c"8 target datalayout = "e-m:e-i64:64-n32:64"9 target triple = "powerpc64le-unknown-linux-gnu"10 11 ; This file check that %16:gprc in MIR can not be sunk down because of high12 ; register pressure in destination block.13 14 ; Function Attrs: nofree norecurse nounwind15 define dso_local signext i32 @foo(i32 signext %0, i32 signext %1, ptr nocapture readonly %2, ptr nocapture %3, i32 signext %4, ptr nocapture readonly %5, ptr nocapture readonly %6, ptr nocapture readonly %7, ptr nocapture readonly %8, ptr nocapture readonly %9, ptr nocapture readonly %10, ptr nocapture readonly %11, ptr nocapture readonly %12, ptr nocapture readonly %13, ptr nocapture readonly %14, ptr nocapture readonly %15, ptr nocapture readonly %16, ptr nocapture readonly %17, ptr nocapture readonly %18, ptr nocapture readonly %19, ptr nocapture readonly %20, ptr nocapture readonly %21, ptr nocapture readonly %22, ptr nocapture readonly %23, ptr nocapture readonly %24, ptr nocapture readonly %25, ptr nocapture readonly %26, ptr nocapture readonly %27, ptr nocapture readonly %28, ptr nocapture readonly %29, ptr nocapture readonly %30, ptr nocapture readonly %31, ptr nocapture readonly %32, ptr nocapture readonly %33, ptr nocapture readonly %34, ptr nocapture readonly %35, ptr nocapture readonly %36) local_unnamed_addr #0 {16 %38 = icmp sgt i32 %4, 017 br i1 %38, label %39, label %4118 19 39: ; preds = %3720 %40 = zext i32 %4 to i6421 %scevgep = getelementptr i32, ptr %2, i64 -122 %scevgep69 = bitcast ptr %scevgep to ptr23 %scevgep70 = getelementptr i32, ptr %5, i64 -124 %scevgep7071 = bitcast ptr %scevgep70 to ptr25 %scevgep72 = getelementptr i32, ptr %6, i64 -126 %scevgep7273 = bitcast ptr %scevgep72 to ptr27 call void @llvm.set.loop.iterations.i64(i64 %40)28 br label %4229 30 41: ; preds = %65, %3731 ret i32 undef32 33 42: ; preds = %65, %3934 %lsr.iv = phi i64 [ %lsr.iv.next, %65 ], [ 0, %39 ]35 %43 = phi i64 [ 0, %39 ], [ %163, %65 ]36 %44 = phi i32 [ 0, %39 ], [ %58, %65 ]37 %45 = phi ptr [ %scevgep69, %39 ], [ %52, %65 ]38 %46 = phi ptr [ %scevgep7071, %39 ], [ %50, %65 ]39 %47 = phi ptr [ %scevgep7273, %39 ], [ %48, %65 ]40 %48 = getelementptr i8, ptr %47, i64 441 %49 = bitcast ptr %48 to ptr42 %50 = getelementptr i8, ptr %46, i64 443 %51 = bitcast ptr %50 to ptr44 %52 = getelementptr i8, ptr %45, i64 445 %53 = bitcast ptr %52 to ptr46 %lsr68 = trunc i64 %43 to i3247 %54 = udiv i32 %lsr68, 3048 %55 = mul nuw nsw i32 %54, 3049 %56 = sub i32 %lsr68, %5550 %57 = load i32, ptr %53, align 4, !tbaa !251 %58 = add nsw i32 %57, %4452 switch i32 %0, label %64 [53 i32 1, label %5954 i32 3, label %6255 ]56 57 59: ; preds = %4258 %60 = trunc i64 %43 to i3259 %61 = shl i32 %60, 160 br label %6561 62 62: ; preds = %4263 %63 = add nuw nsw i32 %lsr68, 10064 br label %6565 66 64: ; preds = %4267 br label %6568 69 65: ; preds = %64, %62, %5970 %66 = phi i32 [ %56, %64 ], [ %63, %62 ], [ %61, %59 ]71 %67 = bitcast ptr %7 to ptr72 %68 = bitcast ptr %8 to ptr73 %69 = bitcast ptr %9 to ptr74 %70 = bitcast ptr %10 to ptr75 %71 = bitcast ptr %11 to ptr76 %72 = bitcast ptr %12 to ptr77 %73 = bitcast ptr %13 to ptr78 %74 = bitcast ptr %14 to ptr79 %75 = bitcast ptr %15 to ptr80 %76 = bitcast ptr %16 to ptr81 %77 = bitcast ptr %17 to ptr82 %78 = bitcast ptr %18 to ptr83 %79 = bitcast ptr %19 to ptr84 %80 = bitcast ptr %20 to ptr85 %81 = bitcast ptr %21 to ptr86 %82 = bitcast ptr %22 to ptr87 %83 = bitcast ptr %23 to ptr88 %84 = bitcast ptr %24 to ptr89 %85 = bitcast ptr %25 to ptr90 %86 = bitcast ptr %26 to ptr91 %87 = bitcast ptr %27 to ptr92 %88 = bitcast ptr %28 to ptr93 %89 = bitcast ptr %29 to ptr94 %90 = bitcast ptr %30 to ptr95 %91 = bitcast ptr %31 to ptr96 %92 = bitcast ptr %32 to ptr97 %93 = bitcast ptr %33 to ptr98 %94 = bitcast ptr %34 to ptr99 %95 = bitcast ptr %35 to ptr100 %96 = bitcast ptr %36 to ptr101 %97 = bitcast ptr %3 to ptr102 %98 = add nsw i32 %66, %58103 %99 = load i32, ptr %51, align 4, !tbaa !2104 %100 = add nsw i32 %98, %99105 %101 = load i32, ptr %49, align 4, !tbaa !2106 %102 = add nsw i32 %100, %101107 %uglygep60 = getelementptr i8, ptr %67, i64 %lsr.iv108 %uglygep6061 = bitcast ptr %uglygep60 to ptr109 %103 = load i32, ptr %uglygep6061, align 4, !tbaa !2110 %104 = add nsw i32 %102, %103111 %uglygep58 = getelementptr i8, ptr %68, i64 %lsr.iv112 %uglygep5859 = bitcast ptr %uglygep58 to ptr113 %105 = load i32, ptr %uglygep5859, align 4, !tbaa !2114 %106 = add nsw i32 %104, %105115 %uglygep56 = getelementptr i8, ptr %69, i64 %lsr.iv116 %uglygep5657 = bitcast ptr %uglygep56 to ptr117 %107 = load i32, ptr %uglygep5657, align 4, !tbaa !2118 %108 = add nsw i32 %106, %107119 %uglygep54 = getelementptr i8, ptr %70, i64 %lsr.iv120 %uglygep5455 = bitcast ptr %uglygep54 to ptr121 %109 = load i32, ptr %uglygep5455, align 4, !tbaa !2122 %110 = add nsw i32 %108, %109123 %uglygep52 = getelementptr i8, ptr %71, i64 %lsr.iv124 %uglygep5253 = bitcast ptr %uglygep52 to ptr125 %111 = load i32, ptr %uglygep5253, align 4, !tbaa !2126 %112 = add nsw i32 %110, %111127 %uglygep50 = getelementptr i8, ptr %72, i64 %lsr.iv128 %uglygep5051 = bitcast ptr %uglygep50 to ptr129 %113 = load i32, ptr %uglygep5051, align 4, !tbaa !2130 %114 = add nsw i32 %112, %113131 %uglygep48 = getelementptr i8, ptr %73, i64 %lsr.iv132 %uglygep4849 = bitcast ptr %uglygep48 to ptr133 %115 = load i32, ptr %uglygep4849, align 4, !tbaa !2134 %116 = add nsw i32 %114, %115135 %uglygep46 = getelementptr i8, ptr %74, i64 %lsr.iv136 %uglygep4647 = bitcast ptr %uglygep46 to ptr137 %117 = load i32, ptr %uglygep4647, align 4, !tbaa !2138 %118 = add nsw i32 %116, %117139 %uglygep44 = getelementptr i8, ptr %75, i64 %lsr.iv140 %uglygep4445 = bitcast ptr %uglygep44 to ptr141 %119 = load i32, ptr %uglygep4445, align 4, !tbaa !2142 %120 = add nsw i32 %118, %119143 %uglygep42 = getelementptr i8, ptr %76, i64 %lsr.iv144 %uglygep4243 = bitcast ptr %uglygep42 to ptr145 %121 = load i32, ptr %uglygep4243, align 4, !tbaa !2146 %122 = add nsw i32 %120, %121147 %uglygep40 = getelementptr i8, ptr %77, i64 %lsr.iv148 %uglygep4041 = bitcast ptr %uglygep40 to ptr149 %123 = load i32, ptr %uglygep4041, align 4, !tbaa !2150 %124 = add nsw i32 %122, %123151 %uglygep38 = getelementptr i8, ptr %78, i64 %lsr.iv152 %uglygep3839 = bitcast ptr %uglygep38 to ptr153 %125 = load i32, ptr %uglygep3839, align 4, !tbaa !2154 %126 = add nsw i32 %124, %125155 %uglygep36 = getelementptr i8, ptr %79, i64 %lsr.iv156 %uglygep3637 = bitcast ptr %uglygep36 to ptr157 %127 = load i32, ptr %uglygep3637, align 4, !tbaa !2158 %128 = add nsw i32 %126, %127159 %uglygep34 = getelementptr i8, ptr %80, i64 %lsr.iv160 %uglygep3435 = bitcast ptr %uglygep34 to ptr161 %129 = load i32, ptr %uglygep3435, align 4, !tbaa !2162 %130 = add nsw i32 %128, %129163 %uglygep32 = getelementptr i8, ptr %81, i64 %lsr.iv164 %uglygep3233 = bitcast ptr %uglygep32 to ptr165 %131 = load i32, ptr %uglygep3233, align 4, !tbaa !2166 %132 = add nsw i32 %130, %131167 %uglygep30 = getelementptr i8, ptr %82, i64 %lsr.iv168 %uglygep3031 = bitcast ptr %uglygep30 to ptr169 %133 = load i32, ptr %uglygep3031, align 4, !tbaa !2170 %134 = add nsw i32 %132, %133171 %uglygep28 = getelementptr i8, ptr %83, i64 %lsr.iv172 %uglygep2829 = bitcast ptr %uglygep28 to ptr173 %135 = load i32, ptr %uglygep2829, align 4, !tbaa !2174 %136 = add nsw i32 %134, %135175 %uglygep26 = getelementptr i8, ptr %84, i64 %lsr.iv176 %uglygep2627 = bitcast ptr %uglygep26 to ptr177 %137 = load i32, ptr %uglygep2627, align 4, !tbaa !2178 %138 = add nsw i32 %136, %137179 %uglygep24 = getelementptr i8, ptr %85, i64 %lsr.iv180 %uglygep2425 = bitcast ptr %uglygep24 to ptr181 %139 = load i32, ptr %uglygep2425, align 4, !tbaa !2182 %140 = add nsw i32 %138, %139183 %uglygep22 = getelementptr i8, ptr %86, i64 %lsr.iv184 %uglygep2223 = bitcast ptr %uglygep22 to ptr185 %141 = load i32, ptr %uglygep2223, align 4, !tbaa !2186 %142 = add nsw i32 %140, %141187 %uglygep20 = getelementptr i8, ptr %87, i64 %lsr.iv188 %uglygep2021 = bitcast ptr %uglygep20 to ptr189 %143 = load i32, ptr %uglygep2021, align 4, !tbaa !2190 %144 = add nsw i32 %142, %143191 %uglygep18 = getelementptr i8, ptr %88, i64 %lsr.iv192 %uglygep1819 = bitcast ptr %uglygep18 to ptr193 %145 = load i32, ptr %uglygep1819, align 4, !tbaa !2194 %146 = add nsw i32 %144, %145195 %uglygep16 = getelementptr i8, ptr %89, i64 %lsr.iv196 %uglygep1617 = bitcast ptr %uglygep16 to ptr197 %147 = load i32, ptr %uglygep1617, align 4, !tbaa !2198 %148 = add nsw i32 %146, %147199 %uglygep14 = getelementptr i8, ptr %90, i64 %lsr.iv200 %uglygep1415 = bitcast ptr %uglygep14 to ptr201 %149 = load i32, ptr %uglygep1415, align 4, !tbaa !2202 %150 = add nsw i32 %148, %149203 %uglygep12 = getelementptr i8, ptr %91, i64 %lsr.iv204 %uglygep1213 = bitcast ptr %uglygep12 to ptr205 %151 = load i32, ptr %uglygep1213, align 4, !tbaa !2206 %152 = add nsw i32 %150, %151207 %uglygep10 = getelementptr i8, ptr %92, i64 %lsr.iv208 %uglygep1011 = bitcast ptr %uglygep10 to ptr209 %153 = load i32, ptr %uglygep1011, align 4, !tbaa !2210 %154 = add nsw i32 %152, %153211 %uglygep8 = getelementptr i8, ptr %93, i64 %lsr.iv212 %uglygep89 = bitcast ptr %uglygep8 to ptr213 %155 = load i32, ptr %uglygep89, align 4, !tbaa !2214 %156 = add nsw i32 %154, %155215 %uglygep6 = getelementptr i8, ptr %94, i64 %lsr.iv216 %uglygep67 = bitcast ptr %uglygep6 to ptr217 %157 = load i32, ptr %uglygep67, align 4, !tbaa !2218 %158 = add nsw i32 %156, %157219 %uglygep4 = getelementptr i8, ptr %95, i64 %lsr.iv220 %uglygep45 = bitcast ptr %uglygep4 to ptr221 %159 = load i32, ptr %uglygep45, align 4, !tbaa !2222 %160 = add nsw i32 %158, %159223 %uglygep2 = getelementptr i8, ptr %96, i64 %lsr.iv224 %uglygep23 = bitcast ptr %uglygep2 to ptr225 %161 = load i32, ptr %uglygep23, align 4, !tbaa !2226 %162 = add nsw i32 %160, %161227 %uglygep = getelementptr i8, ptr %97, i64 %lsr.iv228 %uglygep1 = bitcast ptr %uglygep to ptr229 store i32 %162, ptr %uglygep1, align 4, !tbaa !2230 %163 = add nuw nsw i64 %43, 1231 %lsr.iv.next = add nuw nsw i64 %lsr.iv, 4232 %164 = call i1 @llvm.loop.decrement.i64(i64 1)233 br i1 %164, label %42, label %41234 }235 236 ; Function Attrs: noduplicate nounwind237 declare void @llvm.set.loop.iterations.i64(i64) #1238 239 ; Function Attrs: noduplicate nounwind240 declare i1 @llvm.loop.decrement.i64(i64) #1241 242 attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-spe" "use-soft-float"="false" }243 attributes #1 = { noduplicate nounwind }244 245 !llvm.module.flags = !{!0}246 !llvm.ident = !{!1}247 248 !0 = !{i32 1, !"wchar_size", i32 4}249 !1 = !{!"clang version 12.0.0"}250 !2 = !{!3, !3, i64 0}251 !3 = !{!"int", !4, i64 0}252 !4 = !{!"omnipotent char", !5, i64 0}253 !5 = !{!"Simple C/C++ TBAA"}254 255...256---257name: foo258alignment: 16259tracksRegLiveness: true260registers:261 - { id: 0, class: g8rc }262 - { id: 1, class: g8rc }263 - { id: 2, class: g8rc }264 - { id: 3, class: g8rc_and_g8rc_nox0 }265 - { id: 4, class: g8rc_and_g8rc_nox0 }266 - { id: 5, class: gprc }267 - { id: 6, class: g8rc_and_g8rc_nox0 }268 - { id: 7, class: g8rc_and_g8rc_nox0 }269 - { id: 8, class: g8rc_and_g8rc_nox0 }270 - { id: 9, class: g8rc }271 - { id: 10, class: g8rc_and_g8rc_nox0 }272 - { id: 11, class: g8rc }273 - { id: 12, class: g8rc_and_g8rc_nox0 }274 - { id: 13, class: g8rc }275 - { id: 14, class: gprc_and_gprc_nor0 }276 - { id: 15, class: gprc }277 - { id: 16, class: gprc }278 - { id: 17, class: gprc }279 - { id: 18, class: gprc }280 - { id: 19, class: gprc }281 - { id: 20, class: g8rc }282 - { id: 21, class: g8rc }283 - { id: 22, class: g8rc }284 - { id: 23, class: g8rc }285 - { id: 24, class: g8rc_and_g8rc_nox0 }286 - { id: 25, class: g8rc_and_g8rc_nox0 }287 - { id: 26, class: g8rc }288 - { id: 27, class: g8rc_and_g8rc_nox0 }289 - { id: 28, class: g8rc_and_g8rc_nox0 }290 - { id: 29, class: g8rc_and_g8rc_nox0 }291 - { id: 30, class: gprc }292 - { id: 31, class: gprc }293 - { id: 32, class: g8rc_and_g8rc_nox0 }294 - { id: 33, class: g8rc_and_g8rc_nox0 }295 - { id: 34, class: g8rc_and_g8rc_nox0 }296 - { id: 35, class: g8rc_and_g8rc_nox0 }297 - { id: 36, class: g8rc_and_g8rc_nox0 }298 - { id: 37, class: g8rc_and_g8rc_nox0 }299 - { id: 38, class: g8rc_and_g8rc_nox0 }300 - { id: 39, class: g8rc_and_g8rc_nox0 }301 - { id: 40, class: g8rc_and_g8rc_nox0 }302 - { id: 41, class: g8rc_and_g8rc_nox0 }303 - { id: 42, class: g8rc_and_g8rc_nox0 }304 - { id: 43, class: g8rc_and_g8rc_nox0 }305 - { id: 44, class: g8rc_and_g8rc_nox0 }306 - { id: 45, class: g8rc_and_g8rc_nox0 }307 - { id: 46, class: g8rc_and_g8rc_nox0 }308 - { id: 47, class: g8rc_and_g8rc_nox0 }309 - { id: 48, class: g8rc_and_g8rc_nox0 }310 - { id: 49, class: g8rc_and_g8rc_nox0 }311 - { id: 50, class: g8rc_and_g8rc_nox0 }312 - { id: 51, class: g8rc_and_g8rc_nox0 }313 - { id: 52, class: g8rc_and_g8rc_nox0 }314 - { id: 53, class: g8rc_and_g8rc_nox0 }315 - { id: 54, class: g8rc_and_g8rc_nox0 }316 - { id: 55, class: g8rc_and_g8rc_nox0 }317 - { id: 56, class: g8rc_and_g8rc_nox0 }318 - { id: 57, class: g8rc_and_g8rc_nox0 }319 - { id: 58, class: g8rc_and_g8rc_nox0 }320 - { id: 59, class: g8rc_and_g8rc_nox0 }321 - { id: 60, class: g8rc_and_g8rc_nox0 }322 - { id: 61, class: crrc }323 - { id: 62, class: g8rc }324 - { id: 63, class: gprc }325 - { id: 64, class: g8rc }326 - { id: 65, class: g8rc }327 - { id: 66, class: g8rc }328 - { id: 67, class: gprc }329 - { id: 68, class: g8rc_and_g8rc_nox0 }330 - { id: 69, class: gprc }331 - { id: 70, class: gprc }332 - { id: 71, class: gprc }333 - { id: 72, class: gprc }334 - { id: 73, class: gprc }335 - { id: 74, class: crrc }336 - { id: 75, class: crrc }337 - { id: 76, class: gprc }338 - { id: 77, class: gprc }339 - { id: 78, class: gprc }340 - { id: 79, class: gprc }341 - { id: 80, class: gprc }342 - { id: 81, class: gprc }343 - { id: 82, class: gprc }344 - { id: 83, class: gprc }345 - { id: 84, class: gprc }346 - { id: 85, class: gprc }347 - { id: 86, class: gprc }348 - { id: 87, class: gprc }349 - { id: 88, class: gprc }350 - { id: 89, class: gprc }351 - { id: 90, class: gprc }352 - { id: 91, class: gprc }353 - { id: 92, class: gprc }354 - { id: 93, class: gprc }355 - { id: 94, class: gprc }356 - { id: 95, class: gprc }357 - { id: 96, class: gprc }358 - { id: 97, class: gprc }359 - { id: 98, class: gprc }360 - { id: 99, class: gprc }361 - { id: 100, class: gprc }362 - { id: 101, class: gprc }363 - { id: 102, class: gprc }364 - { id: 103, class: gprc }365 - { id: 104, class: gprc }366 - { id: 105, class: gprc }367 - { id: 106, class: gprc }368 - { id: 107, class: gprc }369 - { id: 108, class: gprc }370 - { id: 109, class: gprc }371 - { id: 110, class: gprc }372 - { id: 111, class: gprc }373 - { id: 112, class: gprc }374 - { id: 113, class: gprc }375 - { id: 114, class: gprc }376 - { id: 115, class: gprc }377 - { id: 116, class: gprc }378 - { id: 117, class: gprc }379 - { id: 118, class: gprc }380 - { id: 119, class: gprc }381 - { id: 120, class: gprc }382 - { id: 121, class: gprc }383 - { id: 122, class: gprc }384 - { id: 123, class: gprc }385 - { id: 124, class: gprc }386 - { id: 125, class: gprc }387 - { id: 126, class: gprc }388 - { id: 127, class: gprc }389 - { id: 128, class: gprc }390 - { id: 129, class: gprc }391 - { id: 130, class: gprc }392 - { id: 131, class: gprc }393 - { id: 132, class: gprc }394 - { id: 133, class: gprc }395 - { id: 134, class: gprc }396 - { id: 135, class: gprc }397 - { id: 136, class: gprc }398 - { id: 137, class: gprc }399 - { id: 138, class: gprc }400 - { id: 139, class: gprc }401 - { id: 140, class: gprc }402 - { id: 141, class: gprc }403 - { id: 142, class: g8rc }404liveins:405 - { reg: '$x3', virtual-reg: '%22' }406 - { reg: '$x5', virtual-reg: '%24' }407 - { reg: '$x6', virtual-reg: '%25' }408 - { reg: '$x7', virtual-reg: '%26' }409 - { reg: '$x8', virtual-reg: '%27' }410 - { reg: '$x9', virtual-reg: '%28' }411 - { reg: '$x10', virtual-reg: '%29' }412frameInfo:413 maxAlignment: 1414fixedStack:415 - { id: 0, offset: 320, size: 8, alignment: 16, isImmutable: true }416 - { id: 1, offset: 312, size: 8, alignment: 8, isImmutable: true }417 - { id: 2, offset: 304, size: 8, alignment: 16, isImmutable: true }418 - { id: 3, offset: 296, size: 8, alignment: 8, isImmutable: true }419 - { id: 4, offset: 288, size: 8, alignment: 16, isImmutable: true }420 - { id: 5, offset: 280, size: 8, alignment: 8, isImmutable: true }421 - { id: 6, offset: 272, size: 8, alignment: 16, isImmutable: true }422 - { id: 7, offset: 264, size: 8, alignment: 8, isImmutable: true }423 - { id: 8, offset: 256, size: 8, alignment: 16, isImmutable: true }424 - { id: 9, offset: 248, size: 8, alignment: 8, isImmutable: true }425 - { id: 10, offset: 240, size: 8, alignment: 16, isImmutable: true }426 - { id: 11, offset: 232, size: 8, alignment: 8, isImmutable: true }427 - { id: 12, offset: 224, size: 8, alignment: 16, isImmutable: true }428 - { id: 13, offset: 216, size: 8, alignment: 8, isImmutable: true }429 - { id: 14, offset: 208, size: 8, alignment: 16, isImmutable: true }430 - { id: 15, offset: 200, size: 8, alignment: 8, isImmutable: true }431 - { id: 16, offset: 192, size: 8, alignment: 16, isImmutable: true }432 - { id: 17, offset: 184, size: 8, alignment: 8, isImmutable: true }433 - { id: 18, offset: 176, size: 8, alignment: 16, isImmutable: true }434 - { id: 19, offset: 168, size: 8, alignment: 8, isImmutable: true }435 - { id: 20, offset: 160, size: 8, alignment: 16, isImmutable: true }436 - { id: 21, offset: 152, size: 8, alignment: 8, isImmutable: true }437 - { id: 22, offset: 144, size: 8, alignment: 16, isImmutable: true }438 - { id: 23, offset: 136, size: 8, alignment: 8, isImmutable: true }439 - { id: 24, offset: 128, size: 8, alignment: 16, isImmutable: true }440 - { id: 25, offset: 120, size: 8, alignment: 8, isImmutable: true }441 - { id: 26, offset: 112, size: 8, alignment: 16, isImmutable: true }442 - { id: 27, offset: 104, size: 8, alignment: 8, isImmutable: true }443 - { id: 28, offset: 96, size: 8, alignment: 16, isImmutable: true }444machineFunctionInfo: {}445body: |446 ; CHECK-LABEL: name: foo447 ; CHECK: bb.0 (%ir-block.37):448 ; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000)449 ; CHECK: liveins: $x3, $x5, $x6, $x7, $x8, $x9, $x10450 ; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x10451 ; CHECK: [[COPY1:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x9452 ; CHECK: [[COPY2:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x8453 ; CHECK: [[COPY3:%[0-9]+]]:g8rc = COPY $x7454 ; CHECK: [[COPY4:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x6455 ; CHECK: [[COPY5:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x5456 ; CHECK: [[COPY6:%[0-9]+]]:g8rc = COPY $x3457 ; CHECK: [[COPY7:%[0-9]+]]:gprc = COPY [[COPY3]].sub_32458 ; CHECK: [[CMPWI:%[0-9]+]]:crrc = CMPWI [[COPY7]], 1459 ; CHECK: BCC 12, killed [[CMPWI]], %bb.2460 ; CHECK: B %bb.1461 ; CHECK: bb.1 (%ir-block.39):462 ; CHECK: successors: %bb.3(0x80000000)463 ; CHECK: [[COPY8:%[0-9]+]]:gprc = COPY [[COPY6]].sub_32464 ; CHECK: [[LD:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.28 :: (load (s64) from %fixed-stack.28, align 16)465 ; CHECK: [[LD1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.27 :: (load (s64) from %fixed-stack.27)466 ; CHECK: [[LD2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.26 :: (load (s64) from %fixed-stack.26, align 16)467 ; CHECK: [[LD3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.25 :: (load (s64) from %fixed-stack.25)468 ; CHECK: [[LD4:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.24 :: (load (s64) from %fixed-stack.24, align 16)469 ; CHECK: [[LD5:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.23 :: (load (s64) from %fixed-stack.23)470 ; CHECK: [[LD6:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.22 :: (load (s64) from %fixed-stack.22, align 16)471 ; CHECK: [[LD7:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.21 :: (load (s64) from %fixed-stack.21)472 ; CHECK: [[LD8:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.20 :: (load (s64) from %fixed-stack.20, align 16)473 ; CHECK: [[LD9:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.19 :: (load (s64) from %fixed-stack.19)474 ; CHECK: [[LD10:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.18 :: (load (s64) from %fixed-stack.18, align 16)475 ; CHECK: [[LD11:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.17 :: (load (s64) from %fixed-stack.17)476 ; CHECK: [[LD12:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.16 :: (load (s64) from %fixed-stack.16, align 16)477 ; CHECK: [[LD13:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.15 :: (load (s64) from %fixed-stack.15)478 ; CHECK: [[LD14:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.14 :: (load (s64) from %fixed-stack.14, align 16)479 ; CHECK: [[LD15:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.13 :: (load (s64) from %fixed-stack.13)480 ; CHECK: [[LD16:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.12 :: (load (s64) from %fixed-stack.12, align 16)481 ; CHECK: [[LD17:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.11 :: (load (s64) from %fixed-stack.11)482 ; CHECK: [[LD18:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.10 :: (load (s64) from %fixed-stack.10, align 16)483 ; CHECK: [[LD19:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.9 :: (load (s64) from %fixed-stack.9)484 ; CHECK: [[LD20:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.8 :: (load (s64) from %fixed-stack.8, align 16)485 ; CHECK: [[LD21:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.7 :: (load (s64) from %fixed-stack.7)486 ; CHECK: [[LD22:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.6 :: (load (s64) from %fixed-stack.6, align 16)487 ; CHECK: [[LD23:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.5 :: (load (s64) from %fixed-stack.5)488 ; CHECK: [[LD24:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.4 :: (load (s64) from %fixed-stack.4, align 16)489 ; CHECK: [[LD25:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.3 :: (load (s64) from %fixed-stack.3)490 ; CHECK: [[LD26:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.2 :: (load (s64) from %fixed-stack.2, align 16)491 ; CHECK: [[LD27:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1)492 ; CHECK: [[LD28:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0, align 16)493 ; CHECK: [[DEF:%[0-9]+]]:g8rc = IMPLICIT_DEF494 ; CHECK: [[INSERT_SUBREG:%[0-9]+]]:g8rc = INSERT_SUBREG [[DEF]], [[COPY7]], %subreg.sub_32495 ; CHECK: [[RLDICL:%[0-9]+]]:g8rc = RLDICL killed [[INSERT_SUBREG]], 0, 32496 ; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 [[COPY5]], -4497 ; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 [[COPY2]], -4498 ; CHECK: [[ADDI8_2:%[0-9]+]]:g8rc = ADDI8 [[COPY1]], -4499 ; CHECK: MTCTR8loop killed [[RLDICL]], implicit-def dead $ctr8500 ; CHECK: [[LI:%[0-9]+]]:gprc = LI 0501 ; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 0502 ; CHECK: [[LIS:%[0-9]+]]:gprc = LIS 34952503 ; CHECK: [[ORI:%[0-9]+]]:gprc = ORI [[LIS]], 34953504 ; CHECK: [[CMPLWI:%[0-9]+]]:crrc = CMPLWI [[COPY8]], 3505 ; CHECK: [[CMPLWI1:%[0-9]+]]:crrc = CMPLWI [[COPY8]], 1506 ; CHECK: B %bb.3507 ; CHECK: bb.2 (%ir-block.41):508 ; CHECK: [[LI8_1:%[0-9]+]]:g8rc = LI8 0509 ; CHECK: $x3 = COPY [[LI8_1]]510 ; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3511 ; CHECK: bb.3 (%ir-block.42):512 ; CHECK: successors: %bb.6(0x2aaaaaab), %bb.4(0x55555555)513 ; CHECK: [[PHI:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[LI8_]], %bb.1, %21, %bb.8514 ; CHECK: [[PHI1:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[LI8_]], %bb.1, %20, %bb.8515 ; CHECK: [[PHI2:%[0-9]+]]:gprc = PHI [[LI]], %bb.1, %16, %bb.8516 ; CHECK: [[PHI3:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_]], %bb.1, %13, %bb.8517 ; CHECK: [[PHI4:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_1]], %bb.1, %11, %bb.8518 ; CHECK: [[PHI5:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_2]], %bb.1, %9, %bb.8519 ; CHECK: [[LWZU:%[0-9]+]]:gprc, [[LWZU1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LWZU 4, [[PHI3]] :: (load (s32) from %ir.53, !tbaa !2)520 ; CHECK: [[COPY9:%[0-9]+]]:gprc_and_gprc_nor0 = COPY [[PHI1]].sub_32521 ; CHECK: [[ADD4_:%[0-9]+]]:gprc = nsw ADD4 killed [[LWZU]], [[PHI2]]522 ; CHECK: BCC 76, [[CMPLWI]], %bb.6523 ; CHECK: B %bb.4524 ; CHECK: bb.4 (%ir-block.42):525 ; CHECK: successors: %bb.5(0x40000001), %bb.7(0x3fffffff)526 ; CHECK: BCC 68, [[CMPLWI1]], %bb.7527 ; CHECK: B %bb.5528 ; CHECK: bb.5 (%ir-block.59):529 ; CHECK: successors: %bb.8(0x80000000)530 ; CHECK: [[COPY10:%[0-9]+]]:gprc = COPY [[PHI1]].sub_32531 ; CHECK: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY10]], 1, 0, 30532 ; CHECK: B %bb.8533 ; CHECK: bb.6 (%ir-block.62):534 ; CHECK: successors: %bb.8(0x80000000)535 ; CHECK: [[ADDI:%[0-9]+]]:gprc = nuw nsw ADDI [[COPY9]], 100536 ; CHECK: B %bb.8537 ; CHECK: bb.7 (%ir-block.64):538 ; CHECK: successors: %bb.8(0x80000000)539 ; CHECK: [[MULHWU:%[0-9]+]]:gprc = MULHWU [[COPY9]], [[ORI]]540 ; CHECK: [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[MULHWU]], 28, 4, 31541 ; CHECK: [[MULLI:%[0-9]+]]:gprc = nuw nsw MULLI [[RLWINM1]], 30542 ; CHECK: [[SUBF:%[0-9]+]]:gprc = SUBF [[MULLI]], [[COPY9]]543 ; CHECK: bb.8 (%ir-block.65):544 ; CHECK: successors: %bb.3(0x7c000000), %bb.2(0x04000000)545 ; CHECK: [[PHI6:%[0-9]+]]:gprc = PHI [[ADDI]], %bb.6, [[RLWINM]], %bb.5, [[SUBF]], %bb.7546 ; CHECK: [[ADDI8_3:%[0-9]+]]:g8rc_and_g8rc_nox0 = ADDI8 [[PHI5]], 4547 ; CHECK: [[COPY11:%[0-9]+]]:g8rc = COPY [[ADDI8_3]]548 ; CHECK: [[ADDI8_4:%[0-9]+]]:g8rc_and_g8rc_nox0 = ADDI8 [[PHI4]], 4549 ; CHECK: [[COPY12:%[0-9]+]]:g8rc = COPY [[ADDI8_4]]550 ; CHECK: [[COPY13:%[0-9]+]]:g8rc = COPY [[LWZU1]]551 ; CHECK: [[ADD4_1:%[0-9]+]]:gprc = nsw ADD4 [[PHI6]], [[ADD4_]]552 ; CHECK: [[LWZ:%[0-9]+]]:gprc = LWZ 0, [[ADDI8_4]] :: (load (s32) from %ir.51, !tbaa !2)553 ; CHECK: [[ADD4_2:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_1]], killed [[LWZ]]554 ; CHECK: [[LWZ1:%[0-9]+]]:gprc = LWZ 0, [[ADDI8_3]] :: (load (s32) from %ir.49, !tbaa !2)555 ; CHECK: [[ADD4_3:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_2]], killed [[LWZ1]]556 ; CHECK: [[LWZX:%[0-9]+]]:gprc = LWZX [[COPY]], [[PHI]] :: (load (s32) from %ir.uglygep6061, !tbaa !2)557 ; CHECK: [[ADD4_4:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_3]], killed [[LWZX]]558 ; CHECK: [[LWZX1:%[0-9]+]]:gprc = LWZX [[LD28]], [[PHI]] :: (load (s32) from %ir.uglygep5859, !tbaa !2)559 ; CHECK: [[ADD4_5:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_4]], killed [[LWZX1]]560 ; CHECK: [[LWZX2:%[0-9]+]]:gprc = LWZX [[LD27]], [[PHI]] :: (load (s32) from %ir.uglygep5657, !tbaa !2)561 ; CHECK: [[ADD4_6:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_5]], killed [[LWZX2]]562 ; CHECK: [[LWZX3:%[0-9]+]]:gprc = LWZX [[LD26]], [[PHI]] :: (load (s32) from %ir.uglygep5455, !tbaa !2)563 ; CHECK: [[ADD4_7:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_6]], killed [[LWZX3]]564 ; CHECK: [[LWZX4:%[0-9]+]]:gprc = LWZX [[LD25]], [[PHI]] :: (load (s32) from %ir.uglygep5253, !tbaa !2)565 ; CHECK: [[ADD4_8:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_7]], killed [[LWZX4]]566 ; CHECK: [[LWZX5:%[0-9]+]]:gprc = LWZX [[LD24]], [[PHI]] :: (load (s32) from %ir.uglygep5051, !tbaa !2)567 ; CHECK: [[ADD4_9:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_8]], killed [[LWZX5]]568 ; CHECK: [[LWZX6:%[0-9]+]]:gprc = LWZX [[LD23]], [[PHI]] :: (load (s32) from %ir.uglygep4849, !tbaa !2)569 ; CHECK: [[ADD4_10:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_9]], killed [[LWZX6]]570 ; CHECK: [[LWZX7:%[0-9]+]]:gprc = LWZX [[LD22]], [[PHI]] :: (load (s32) from %ir.uglygep4647, !tbaa !2)571 ; CHECK: [[ADD4_11:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_10]], killed [[LWZX7]]572 ; CHECK: [[LWZX8:%[0-9]+]]:gprc = LWZX [[LD21]], [[PHI]] :: (load (s32) from %ir.uglygep4445, !tbaa !2)573 ; CHECK: [[ADD4_12:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_11]], killed [[LWZX8]]574 ; CHECK: [[LWZX9:%[0-9]+]]:gprc = LWZX [[LD20]], [[PHI]] :: (load (s32) from %ir.uglygep4243, !tbaa !2)575 ; CHECK: [[ADD4_13:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_12]], killed [[LWZX9]]576 ; CHECK: [[LWZX10:%[0-9]+]]:gprc = LWZX [[LD19]], [[PHI]] :: (load (s32) from %ir.uglygep4041, !tbaa !2)577 ; CHECK: [[ADD4_14:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_13]], killed [[LWZX10]]578 ; CHECK: [[LWZX11:%[0-9]+]]:gprc = LWZX [[LD18]], [[PHI]] :: (load (s32) from %ir.uglygep3839, !tbaa !2)579 ; CHECK: [[ADD4_15:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_14]], killed [[LWZX11]]580 ; CHECK: [[LWZX12:%[0-9]+]]:gprc = LWZX [[LD17]], [[PHI]] :: (load (s32) from %ir.uglygep3637, !tbaa !2)581 ; CHECK: [[ADD4_16:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_15]], killed [[LWZX12]]582 ; CHECK: [[LWZX13:%[0-9]+]]:gprc = LWZX [[LD16]], [[PHI]] :: (load (s32) from %ir.uglygep3435, !tbaa !2)583 ; CHECK: [[ADD4_17:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_16]], killed [[LWZX13]]584 ; CHECK: [[LWZX14:%[0-9]+]]:gprc = LWZX [[LD15]], [[PHI]] :: (load (s32) from %ir.uglygep3233, !tbaa !2)585 ; CHECK: [[ADD4_18:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_17]], killed [[LWZX14]]586 ; CHECK: [[LWZX15:%[0-9]+]]:gprc = LWZX [[LD14]], [[PHI]] :: (load (s32) from %ir.uglygep3031, !tbaa !2)587 ; CHECK: [[ADD4_19:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_18]], killed [[LWZX15]]588 ; CHECK: [[LWZX16:%[0-9]+]]:gprc = LWZX [[LD13]], [[PHI]] :: (load (s32) from %ir.uglygep2829, !tbaa !2)589 ; CHECK: [[ADD4_20:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_19]], killed [[LWZX16]]590 ; CHECK: [[LWZX17:%[0-9]+]]:gprc = LWZX [[LD12]], [[PHI]] :: (load (s32) from %ir.uglygep2627, !tbaa !2)591 ; CHECK: [[ADD4_21:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_20]], killed [[LWZX17]]592 ; CHECK: [[LWZX18:%[0-9]+]]:gprc = LWZX [[LD11]], [[PHI]] :: (load (s32) from %ir.uglygep2425, !tbaa !2)593 ; CHECK: [[ADD4_22:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_21]], killed [[LWZX18]]594 ; CHECK: [[LWZX19:%[0-9]+]]:gprc = LWZX [[LD10]], [[PHI]] :: (load (s32) from %ir.uglygep2223, !tbaa !2)595 ; CHECK: [[ADD4_23:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_22]], killed [[LWZX19]]596 ; CHECK: [[LWZX20:%[0-9]+]]:gprc = LWZX [[LD9]], [[PHI]] :: (load (s32) from %ir.uglygep2021, !tbaa !2)597 ; CHECK: [[ADD4_24:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_23]], killed [[LWZX20]]598 ; CHECK: [[LWZX21:%[0-9]+]]:gprc = LWZX [[LD8]], [[PHI]] :: (load (s32) from %ir.uglygep1819, !tbaa !2)599 ; CHECK: [[ADD4_25:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_24]], killed [[LWZX21]]600 ; CHECK: [[LWZX22:%[0-9]+]]:gprc = LWZX [[LD7]], [[PHI]] :: (load (s32) from %ir.uglygep1617, !tbaa !2)601 ; CHECK: [[ADD4_26:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_25]], killed [[LWZX22]]602 ; CHECK: [[LWZX23:%[0-9]+]]:gprc = LWZX [[LD6]], [[PHI]] :: (load (s32) from %ir.uglygep1415, !tbaa !2)603 ; CHECK: [[ADD4_27:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_26]], killed [[LWZX23]]604 ; CHECK: [[LWZX24:%[0-9]+]]:gprc = LWZX [[LD5]], [[PHI]] :: (load (s32) from %ir.uglygep1213, !tbaa !2)605 ; CHECK: [[ADD4_28:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_27]], killed [[LWZX24]]606 ; CHECK: [[LWZX25:%[0-9]+]]:gprc = LWZX [[LD4]], [[PHI]] :: (load (s32) from %ir.uglygep1011, !tbaa !2)607 ; CHECK: [[ADD4_29:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_28]], killed [[LWZX25]]608 ; CHECK: [[LWZX26:%[0-9]+]]:gprc = LWZX [[LD3]], [[PHI]] :: (load (s32) from %ir.uglygep89, !tbaa !2)609 ; CHECK: [[ADD4_30:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_29]], killed [[LWZX26]]610 ; CHECK: [[LWZX27:%[0-9]+]]:gprc = LWZX [[LD2]], [[PHI]] :: (load (s32) from %ir.uglygep67, !tbaa !2)611 ; CHECK: [[ADD4_31:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_30]], killed [[LWZX27]]612 ; CHECK: [[LWZX28:%[0-9]+]]:gprc = LWZX [[LD1]], [[PHI]] :: (load (s32) from %ir.uglygep45, !tbaa !2)613 ; CHECK: [[ADD4_32:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_31]], killed [[LWZX28]]614 ; CHECK: [[LWZX29:%[0-9]+]]:gprc = LWZX [[LD]], [[PHI]] :: (load (s32) from %ir.uglygep23, !tbaa !2)615 ; CHECK: [[ADD4_33:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_32]], killed [[LWZX29]]616 ; CHECK: STWX killed [[ADD4_33]], [[COPY4]], [[PHI]] :: (store (s32) into %ir.uglygep1, !tbaa !2)617 ; CHECK: [[ADDI8_5:%[0-9]+]]:g8rc = nuw nsw ADDI8 [[PHI1]], 1618 ; CHECK: [[ADDI8_6:%[0-9]+]]:g8rc = nuw nsw ADDI8 [[PHI]], 4619 ; CHECK: BDNZ8 %bb.3, implicit-def dead $ctr8, implicit $ctr8620 ; CHECK: B %bb.2621 bb.0 (%ir-block.37):622 successors: %bb.1(0x50000000), %bb.2(0x30000000)623 liveins: $x3, $x5, $x6, $x7, $x8, $x9, $x10624 625 %29:g8rc_and_g8rc_nox0 = COPY $x10626 %28:g8rc_and_g8rc_nox0 = COPY $x9627 %27:g8rc_and_g8rc_nox0 = COPY $x8628 %26:g8rc = COPY $x7629 %25:g8rc_and_g8rc_nox0 = COPY $x6630 %24:g8rc_and_g8rc_nox0 = COPY $x5631 %22:g8rc = COPY $x3632 %30:gprc = COPY %22.sub_32633 %31:gprc = COPY %26.sub_32634 %60:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0, align 16)635 %59:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1)636 %58:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.2 :: (load (s64) from %fixed-stack.2, align 16)637 %57:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.3 :: (load (s64) from %fixed-stack.3)638 %56:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.4 :: (load (s64) from %fixed-stack.4, align 16)639 %55:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.5 :: (load (s64) from %fixed-stack.5)640 %54:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.6 :: (load (s64) from %fixed-stack.6, align 16)641 %53:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.7 :: (load (s64) from %fixed-stack.7)642 %52:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.8 :: (load (s64) from %fixed-stack.8, align 16)643 %51:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.9 :: (load (s64) from %fixed-stack.9)644 %50:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.10 :: (load (s64) from %fixed-stack.10, align 16)645 %49:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.11 :: (load (s64) from %fixed-stack.11)646 %48:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.12 :: (load (s64) from %fixed-stack.12, align 16)647 %47:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.13 :: (load (s64) from %fixed-stack.13)648 %46:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.14 :: (load (s64) from %fixed-stack.14, align 16)649 %45:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.15 :: (load (s64) from %fixed-stack.15)650 %44:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.16 :: (load (s64) from %fixed-stack.16, align 16)651 %43:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.17 :: (load (s64) from %fixed-stack.17)652 %42:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.18 :: (load (s64) from %fixed-stack.18, align 16)653 %41:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.19 :: (load (s64) from %fixed-stack.19)654 %40:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.20 :: (load (s64) from %fixed-stack.20, align 16)655 %39:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.21 :: (load (s64) from %fixed-stack.21)656 %38:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.22 :: (load (s64) from %fixed-stack.22, align 16)657 %37:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.23 :: (load (s64) from %fixed-stack.23)658 %36:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.24 :: (load (s64) from %fixed-stack.24, align 16)659 %35:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.25 :: (load (s64) from %fixed-stack.25)660 %34:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.26 :: (load (s64) from %fixed-stack.26, align 16)661 %33:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.27 :: (load (s64) from %fixed-stack.27)662 %32:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.28 :: (load (s64) from %fixed-stack.28, align 16)663 %61:crrc = CMPWI %31, 1664 BCC 12, killed %61, %bb.2665 B %bb.1666 667 bb.1 (%ir-block.39):668 %65:g8rc = IMPLICIT_DEF669 %64:g8rc = INSERT_SUBREG %65, %31, %subreg.sub_32670 %66:g8rc = RLDICL killed %64, 0, 32671 %0:g8rc = ADDI8 %24, -4672 %1:g8rc = ADDI8 %27, -4673 %2:g8rc = ADDI8 %28, -4674 MTCTR8loop killed %66, implicit-def dead $ctr8675 %63:gprc = LI 0676 %62:g8rc = LI8 0677 %69:gprc = LIS 34952678 %70:gprc = ORI %69, 34953679 %74:crrc = CMPLWI %30, 3680 %75:crrc = CMPLWI %30, 1681 B %bb.3682 683 bb.2 (%ir-block.41):684 %142:g8rc = LI8 0685 $x3 = COPY %142686 BLR8 implicit $lr8, implicit $rm, implicit $x3687 688 bb.3 (%ir-block.42):689 successors: %bb.5(0x2aaaaaab), %bb.8(0x55555555)690 691 %3:g8rc_and_g8rc_nox0 = PHI %62, %bb.1, %21, %bb.7692 %4:g8rc_and_g8rc_nox0 = PHI %62, %bb.1, %20, %bb.7693 %5:gprc = PHI %63, %bb.1, %16, %bb.7694 %6:g8rc_and_g8rc_nox0 = PHI %0, %bb.1, %13, %bb.7695 %7:g8rc_and_g8rc_nox0 = PHI %1, %bb.1, %11, %bb.7696 %8:g8rc_and_g8rc_nox0 = PHI %2, %bb.1, %9, %bb.7697 %10:g8rc_and_g8rc_nox0 = ADDI8 %8, 4698 %9:g8rc = COPY %10699 %12:g8rc_and_g8rc_nox0 = ADDI8 %7, 4700 %11:g8rc = COPY %12701 %67:gprc, %68:g8rc_and_g8rc_nox0 = LWZU 4, %6 :: (load (s32) from %ir.53, !tbaa !2)702 %13:g8rc = COPY %68703 %14:gprc_and_gprc_nor0 = COPY %4.sub_32704 %71:gprc = MULHWU %14, %70705 %72:gprc = RLWINM %71, 28, 4, 31706 %73:gprc = nuw nsw MULLI killed %72, 30707 %15:gprc = SUBF killed %73, %14708 %16:gprc = nsw ADD4 killed %67, %5709 BCC 76, %74, %bb.5710 B %bb.8711 712 bb.8 (%ir-block.42):713 successors: %bb.4(0x40000001), %bb.6(0x3fffffff)714 715 BCC 68, %75, %bb.6716 B %bb.4717 718 bb.4 (%ir-block.59):719 %76:gprc = COPY %4.sub_32720 %17:gprc = RLWINM %76, 1, 0, 30721 B %bb.7722 723 bb.5 (%ir-block.62):724 %18:gprc = nuw nsw ADDI %14, 100725 B %bb.7726 727 bb.6 (%ir-block.64):728 729 bb.7 (%ir-block.65):730 successors: %bb.3(0x7c000000), %bb.2(0x04000000)731 732 %19:gprc = PHI %18, %bb.5, %17, %bb.4, %15, %bb.6733 %77:gprc = nsw ADD4 %19, %16734 %78:gprc = LWZ 0, %12 :: (load (s32) from %ir.51, !tbaa !2)735 %79:gprc = nsw ADD4 killed %77, killed %78736 %80:gprc = LWZ 0, %10 :: (load (s32) from %ir.49, !tbaa !2)737 %81:gprc = nsw ADD4 killed %79, killed %80738 %82:gprc = LWZX %29, %3 :: (load (s32) from %ir.uglygep6061, !tbaa !2)739 %83:gprc = nsw ADD4 killed %81, killed %82740 %84:gprc = LWZX %32, %3 :: (load (s32) from %ir.uglygep5859, !tbaa !2)741 %85:gprc = nsw ADD4 killed %83, killed %84742 %86:gprc = LWZX %33, %3 :: (load (s32) from %ir.uglygep5657, !tbaa !2)743 %87:gprc = nsw ADD4 killed %85, killed %86744 %88:gprc = LWZX %34, %3 :: (load (s32) from %ir.uglygep5455, !tbaa !2)745 %89:gprc = nsw ADD4 killed %87, killed %88746 %90:gprc = LWZX %35, %3 :: (load (s32) from %ir.uglygep5253, !tbaa !2)747 %91:gprc = nsw ADD4 killed %89, killed %90748 %92:gprc = LWZX %36, %3 :: (load (s32) from %ir.uglygep5051, !tbaa !2)749 %93:gprc = nsw ADD4 killed %91, killed %92750 %94:gprc = LWZX %37, %3 :: (load (s32) from %ir.uglygep4849, !tbaa !2)751 %95:gprc = nsw ADD4 killed %93, killed %94752 %96:gprc = LWZX %38, %3 :: (load (s32) from %ir.uglygep4647, !tbaa !2)753 %97:gprc = nsw ADD4 killed %95, killed %96754 %98:gprc = LWZX %39, %3 :: (load (s32) from %ir.uglygep4445, !tbaa !2)755 %99:gprc = nsw ADD4 killed %97, killed %98756 %100:gprc = LWZX %40, %3 :: (load (s32) from %ir.uglygep4243, !tbaa !2)757 %101:gprc = nsw ADD4 killed %99, killed %100758 %102:gprc = LWZX %41, %3 :: (load (s32) from %ir.uglygep4041, !tbaa !2)759 %103:gprc = nsw ADD4 killed %101, killed %102760 %104:gprc = LWZX %42, %3 :: (load (s32) from %ir.uglygep3839, !tbaa !2)761 %105:gprc = nsw ADD4 killed %103, killed %104762 %106:gprc = LWZX %43, %3 :: (load (s32) from %ir.uglygep3637, !tbaa !2)763 %107:gprc = nsw ADD4 killed %105, killed %106764 %108:gprc = LWZX %44, %3 :: (load (s32) from %ir.uglygep3435, !tbaa !2)765 %109:gprc = nsw ADD4 killed %107, killed %108766 %110:gprc = LWZX %45, %3 :: (load (s32) from %ir.uglygep3233, !tbaa !2)767 %111:gprc = nsw ADD4 killed %109, killed %110768 %112:gprc = LWZX %46, %3 :: (load (s32) from %ir.uglygep3031, !tbaa !2)769 %113:gprc = nsw ADD4 killed %111, killed %112770 %114:gprc = LWZX %47, %3 :: (load (s32) from %ir.uglygep2829, !tbaa !2)771 %115:gprc = nsw ADD4 killed %113, killed %114772 %116:gprc = LWZX %48, %3 :: (load (s32) from %ir.uglygep2627, !tbaa !2)773 %117:gprc = nsw ADD4 killed %115, killed %116774 %118:gprc = LWZX %49, %3 :: (load (s32) from %ir.uglygep2425, !tbaa !2)775 %119:gprc = nsw ADD4 killed %117, killed %118776 %120:gprc = LWZX %50, %3 :: (load (s32) from %ir.uglygep2223, !tbaa !2)777 %121:gprc = nsw ADD4 killed %119, killed %120778 %122:gprc = LWZX %51, %3 :: (load (s32) from %ir.uglygep2021, !tbaa !2)779 %123:gprc = nsw ADD4 killed %121, killed %122780 %124:gprc = LWZX %52, %3 :: (load (s32) from %ir.uglygep1819, !tbaa !2)781 %125:gprc = nsw ADD4 killed %123, killed %124782 %126:gprc = LWZX %53, %3 :: (load (s32) from %ir.uglygep1617, !tbaa !2)783 %127:gprc = nsw ADD4 killed %125, killed %126784 %128:gprc = LWZX %54, %3 :: (load (s32) from %ir.uglygep1415, !tbaa !2)785 %129:gprc = nsw ADD4 killed %127, killed %128786 %130:gprc = LWZX %55, %3 :: (load (s32) from %ir.uglygep1213, !tbaa !2)787 %131:gprc = nsw ADD4 killed %129, killed %130788 %132:gprc = LWZX %56, %3 :: (load (s32) from %ir.uglygep1011, !tbaa !2)789 %133:gprc = nsw ADD4 killed %131, killed %132790 %134:gprc = LWZX %57, %3 :: (load (s32) from %ir.uglygep89, !tbaa !2)791 %135:gprc = nsw ADD4 killed %133, killed %134792 %136:gprc = LWZX %58, %3 :: (load (s32) from %ir.uglygep67, !tbaa !2)793 %137:gprc = nsw ADD4 killed %135, killed %136794 %138:gprc = LWZX %59, %3 :: (load (s32) from %ir.uglygep45, !tbaa !2)795 %139:gprc = nsw ADD4 killed %137, killed %138796 %140:gprc = LWZX %60, %3 :: (load (s32) from %ir.uglygep23, !tbaa !2)797 %141:gprc = nsw ADD4 killed %139, killed %140798 STWX killed %141, %25, %3 :: (store (s32) into %ir.uglygep1, !tbaa !2)799 %20:g8rc = nuw nsw ADDI8 %4, 1800 %21:g8rc = nuw nsw ADDI8 %3, 4801 BDNZ8 %bb.3, implicit-def dead $ctr8, implicit $ctr8802 B %bb.2803 804...805