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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \3; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \4; RUN: -check-prefix=CHECK-LE %s5; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \6; RUN: -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck \7; RUN: -check-prefix=CHECK-P9-LE %s8; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \9; RUN: -mtriple=powerpc64-linux-gnu -mcpu=ppc < %s | FileCheck \10; RUN: -check-prefix=CHECK-BE %s11; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \12; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck \13; RUN: -check-prefix=CHECK-32 %s14 15define i32 @foo(i32 %n) local_unnamed_addr #0 "stack-probe-size"="32768" nounwind {16; CHECK-LE-LABEL: foo:17; CHECK-LE: # %bb.0:18; CHECK-LE-NEXT: std r31, -8(r1)19; CHECK-LE-NEXT: stdu r1, -48(r1)20; CHECK-LE-NEXT: rldic r3, r3, 2, 3021; CHECK-LE-NEXT: li r6, -3276822; CHECK-LE-NEXT: mr r31, r123; CHECK-LE-NEXT: addi r3, r3, 1524; CHECK-LE-NEXT: rldicl r3, r3, 60, 425; CHECK-LE-NEXT: rldicl r3, r3, 4, 2926; CHECK-LE-NEXT: neg r5, r327; CHECK-LE-NEXT: addi r3, r31, 4828; CHECK-LE-NEXT: divd r7, r5, r629; CHECK-LE-NEXT: add r4, r1, r530; CHECK-LE-NEXT: mulld r6, r7, r631; CHECK-LE-NEXT: sub r5, r5, r632; CHECK-LE-NEXT: stdux r3, r1, r533; CHECK-LE-NEXT: cmpd r1, r434; CHECK-LE-NEXT: beq cr0, .LBB0_235; CHECK-LE-NEXT: .LBB0_1:36; CHECK-LE-NEXT: stdu r3, -32768(r1)37; CHECK-LE-NEXT: cmpd r1, r438; CHECK-LE-NEXT: bne cr0, .LBB0_139; CHECK-LE-NEXT: .LBB0_2:40; CHECK-LE-NEXT: li r4, 141; CHECK-LE-NEXT: addi r3, r1, 3242; CHECK-LE-NEXT: stw r4, 4792(r3)43; CHECK-LE-NEXT: lwz r3, 0(r3)44; CHECK-LE-NEXT: ld r1, 0(r1)45; CHECK-LE-NEXT: ld r31, -8(r1)46; CHECK-LE-NEXT: blr47;48; CHECK-P9-LE-LABEL: foo:49; CHECK-P9-LE: # %bb.0:50; CHECK-P9-LE-NEXT: std r31, -8(r1)51; CHECK-P9-LE-NEXT: stdu r1, -48(r1)52; CHECK-P9-LE-NEXT: rldic r3, r3, 2, 3053; CHECK-P9-LE-NEXT: li r6, -3276854; CHECK-P9-LE-NEXT: mr r31, r155; CHECK-P9-LE-NEXT: addi r3, r3, 1556; CHECK-P9-LE-NEXT: rldicl r3, r3, 60, 457; CHECK-P9-LE-NEXT: rldicl r3, r3, 4, 2958; CHECK-P9-LE-NEXT: neg r5, r359; CHECK-P9-LE-NEXT: addi r3, r31, 4860; CHECK-P9-LE-NEXT: divd r7, r5, r661; CHECK-P9-LE-NEXT: add r4, r1, r562; CHECK-P9-LE-NEXT: mulld r6, r7, r663; CHECK-P9-LE-NEXT: sub r5, r5, r664; CHECK-P9-LE-NEXT: stdux r3, r1, r565; CHECK-P9-LE-NEXT: cmpd r1, r466; CHECK-P9-LE-NEXT: beq cr0, .LBB0_267; CHECK-P9-LE-NEXT: .LBB0_1:68; CHECK-P9-LE-NEXT: stdu r3, -32768(r1)69; CHECK-P9-LE-NEXT: cmpd r1, r470; CHECK-P9-LE-NEXT: bne cr0, .LBB0_171; CHECK-P9-LE-NEXT: .LBB0_2:72; CHECK-P9-LE-NEXT: li r4, 173; CHECK-P9-LE-NEXT: addi r3, r1, 3274; CHECK-P9-LE-NEXT: stw r4, 4792(r3)75; CHECK-P9-LE-NEXT: lwz r3, 0(r3)76; CHECK-P9-LE-NEXT: ld r1, 0(r1)77; CHECK-P9-LE-NEXT: ld r31, -8(r1)78; CHECK-P9-LE-NEXT: blr79;80; CHECK-BE-LABEL: foo:81; CHECK-BE: # %bb.0:82; CHECK-BE-NEXT: std r31, -8(r1)83; CHECK-BE-NEXT: stdu r1, -64(r1)84; CHECK-BE-NEXT: rldic r3, r3, 2, 3085; CHECK-BE-NEXT: li r5, -3276886; CHECK-BE-NEXT: addi r3, r3, 1587; CHECK-BE-NEXT: rldicl r3, r3, 60, 488; CHECK-BE-NEXT: mr r31, r189; CHECK-BE-NEXT: rldicl r3, r3, 4, 2990; CHECK-BE-NEXT: neg r4, r391; CHECK-BE-NEXT: divd r6, r4, r592; CHECK-BE-NEXT: addi r3, r31, 6493; CHECK-BE-NEXT: mulld r5, r6, r594; CHECK-BE-NEXT: sub r5, r4, r595; CHECK-BE-NEXT: add r4, r1, r496; CHECK-BE-NEXT: stdux r3, r1, r597; CHECK-BE-NEXT: cmpd r1, r498; CHECK-BE-NEXT: beq cr0, .LBB0_299; CHECK-BE-NEXT: .LBB0_1:100; CHECK-BE-NEXT: stdu r3, -32768(r1)101; CHECK-BE-NEXT: cmpd r1, r4102; CHECK-BE-NEXT: bne cr0, .LBB0_1103; CHECK-BE-NEXT: .LBB0_2:104; CHECK-BE-NEXT: li r4, 1105; CHECK-BE-NEXT: addi r3, r1, 48106; CHECK-BE-NEXT: stw r4, 4792(r3)107; CHECK-BE-NEXT: lwz r3, 0(r3)108; CHECK-BE-NEXT: ld r1, 0(r1)109; CHECK-BE-NEXT: ld r31, -8(r1)110; CHECK-BE-NEXT: blr111;112; CHECK-32-LABEL: foo:113; CHECK-32: # %bb.0:114; CHECK-32-NEXT: stwu r1, -32(r1)115; CHECK-32-NEXT: slwi r3, r3, 2116; CHECK-32-NEXT: addi r3, r3, 15117; CHECK-32-NEXT: rlwinm r3, r3, 0, 0, 27118; CHECK-32-NEXT: neg r4, r3119; CHECK-32-NEXT: li r5, -32768120; CHECK-32-NEXT: divw r6, r4, r5121; CHECK-32-NEXT: stw r31, 28(r1)122; CHECK-32-NEXT: mr r31, r1123; CHECK-32-NEXT: addi r3, r31, 32124; CHECK-32-NEXT: mullw r5, r6, r5125; CHECK-32-NEXT: sub r5, r4, r5126; CHECK-32-NEXT: add r4, r1, r4127; CHECK-32-NEXT: stwux r3, r1, r5128; CHECK-32-NEXT: cmpw r1, r4129; CHECK-32-NEXT: beq cr0, .LBB0_2130; CHECK-32-NEXT: .LBB0_1:131; CHECK-32-NEXT: stwu r3, -32768(r1)132; CHECK-32-NEXT: cmpw r1, r4133; CHECK-32-NEXT: bne cr0, .LBB0_1134; CHECK-32-NEXT: .LBB0_2:135; CHECK-32-NEXT: li r4, 1136; CHECK-32-NEXT: addi r3, r1, 16137; CHECK-32-NEXT: stw r4, 4792(r3)138; CHECK-32-NEXT: lwz r3, 0(r3)139; CHECK-32-NEXT: lwz r31, 0(r1)140; CHECK-32-NEXT: lwz r0, -4(r31)141; CHECK-32-NEXT: mr r1, r31142; CHECK-32-NEXT: mr r31, r0143; CHECK-32-NEXT: blr144 %a = alloca i32, i32 %n, align 16145 %b = getelementptr inbounds i32, ptr %a, i64 1198146 store volatile i32 1, ptr %b147 %c = load volatile i32, ptr %a148 ret i32 %c149}150 151define i32 @bar(i32 %n) local_unnamed_addr #0 nounwind {152; CHECK-LE-LABEL: bar:153; CHECK-LE: # %bb.0:154; CHECK-LE-NEXT: std r31, -8(r1)155; CHECK-LE-NEXT: stdu r1, -48(r1)156; CHECK-LE-NEXT: rldic r4, r3, 2, 30157; CHECK-LE-NEXT: li r7, -4096158; CHECK-LE-NEXT: mr r31, r1159; CHECK-LE-NEXT: addi r4, r4, 15160; CHECK-LE-NEXT: rldicl r4, r4, 60, 4161; CHECK-LE-NEXT: rldicl r4, r4, 4, 29162; CHECK-LE-NEXT: neg r6, r4163; CHECK-LE-NEXT: addi r4, r31, 48164; CHECK-LE-NEXT: divd r8, r6, r7165; CHECK-LE-NEXT: add r5, r1, r6166; CHECK-LE-NEXT: mulld r7, r8, r7167; CHECK-LE-NEXT: sub r6, r6, r7168; CHECK-LE-NEXT: stdux r4, r1, r6169; CHECK-LE-NEXT: cmpd r1, r5170; CHECK-LE-NEXT: beq cr0, .LBB1_2171; CHECK-LE-NEXT: .LBB1_1:172; CHECK-LE-NEXT: stdu r4, -4096(r1)173; CHECK-LE-NEXT: cmpd r1, r5174; CHECK-LE-NEXT: bne cr0, .LBB1_1175; CHECK-LE-NEXT: .LBB1_2:176; CHECK-LE-NEXT: extsw r3, r3177; CHECK-LE-NEXT: li r5, 1178; CHECK-LE-NEXT: addi r4, r1, 32179; CHECK-LE-NEXT: sldi r3, r3, 2180; CHECK-LE-NEXT: add r3, r4, r3181; CHECK-LE-NEXT: stw r5, 4096(r3)182; CHECK-LE-NEXT: lwz r3, 0(r4)183; CHECK-LE-NEXT: ld r1, 0(r1)184; CHECK-LE-NEXT: ld r31, -8(r1)185; CHECK-LE-NEXT: blr186;187; CHECK-P9-LE-LABEL: bar:188; CHECK-P9-LE: # %bb.0:189; CHECK-P9-LE-NEXT: std r31, -8(r1)190; CHECK-P9-LE-NEXT: stdu r1, -48(r1)191; CHECK-P9-LE-NEXT: rldic r4, r3, 2, 30192; CHECK-P9-LE-NEXT: li r7, -4096193; CHECK-P9-LE-NEXT: mr r31, r1194; CHECK-P9-LE-NEXT: addi r4, r4, 15195; CHECK-P9-LE-NEXT: rldicl r4, r4, 60, 4196; CHECK-P9-LE-NEXT: rldicl r4, r4, 4, 29197; CHECK-P9-LE-NEXT: neg r6, r4198; CHECK-P9-LE-NEXT: addi r4, r31, 48199; CHECK-P9-LE-NEXT: divd r8, r6, r7200; CHECK-P9-LE-NEXT: add r5, r1, r6201; CHECK-P9-LE-NEXT: mulld r7, r8, r7202; CHECK-P9-LE-NEXT: sub r6, r6, r7203; CHECK-P9-LE-NEXT: stdux r4, r1, r6204; CHECK-P9-LE-NEXT: cmpd r1, r5205; CHECK-P9-LE-NEXT: beq cr0, .LBB1_2206; CHECK-P9-LE-NEXT: .LBB1_1:207; CHECK-P9-LE-NEXT: stdu r4, -4096(r1)208; CHECK-P9-LE-NEXT: cmpd r1, r5209; CHECK-P9-LE-NEXT: bne cr0, .LBB1_1210; CHECK-P9-LE-NEXT: .LBB1_2:211; CHECK-P9-LE-NEXT: extswsli r3, r3, 2212; CHECK-P9-LE-NEXT: li r5, 1213; CHECK-P9-LE-NEXT: addi r4, r1, 32214; CHECK-P9-LE-NEXT: add r3, r4, r3215; CHECK-P9-LE-NEXT: stw r5, 4096(r3)216; CHECK-P9-LE-NEXT: lwz r3, 0(r4)217; CHECK-P9-LE-NEXT: ld r1, 0(r1)218; CHECK-P9-LE-NEXT: ld r31, -8(r1)219; CHECK-P9-LE-NEXT: blr220;221; CHECK-BE-LABEL: bar:222; CHECK-BE: # %bb.0:223; CHECK-BE-NEXT: std r31, -8(r1)224; CHECK-BE-NEXT: stdu r1, -64(r1)225; CHECK-BE-NEXT: rldic r4, r3, 2, 30226; CHECK-BE-NEXT: li r6, -4096227; CHECK-BE-NEXT: addi r4, r4, 15228; CHECK-BE-NEXT: rldicl r4, r4, 60, 4229; CHECK-BE-NEXT: mr r31, r1230; CHECK-BE-NEXT: rldicl r4, r4, 4, 29231; CHECK-BE-NEXT: neg r5, r4232; CHECK-BE-NEXT: divd r7, r5, r6233; CHECK-BE-NEXT: addi r4, r31, 64234; CHECK-BE-NEXT: mulld r6, r7, r6235; CHECK-BE-NEXT: sub r6, r5, r6236; CHECK-BE-NEXT: add r5, r1, r5237; CHECK-BE-NEXT: stdux r4, r1, r6238; CHECK-BE-NEXT: cmpd r1, r5239; CHECK-BE-NEXT: beq cr0, .LBB1_2240; CHECK-BE-NEXT: .LBB1_1:241; CHECK-BE-NEXT: stdu r4, -4096(r1)242; CHECK-BE-NEXT: cmpd r1, r5243; CHECK-BE-NEXT: bne cr0, .LBB1_1244; CHECK-BE-NEXT: .LBB1_2:245; CHECK-BE-NEXT: extsw r3, r3246; CHECK-BE-NEXT: addi r4, r1, 48247; CHECK-BE-NEXT: sldi r3, r3, 2248; CHECK-BE-NEXT: li r5, 1249; CHECK-BE-NEXT: add r3, r4, r3250; CHECK-BE-NEXT: stw r5, 4096(r3)251; CHECK-BE-NEXT: lwz r3, 0(r4)252; CHECK-BE-NEXT: ld r1, 0(r1)253; CHECK-BE-NEXT: ld r31, -8(r1)254; CHECK-BE-NEXT: blr255;256; CHECK-32-LABEL: bar:257; CHECK-32: # %bb.0:258; CHECK-32-NEXT: stwu r1, -32(r1)259; CHECK-32-NEXT: slwi r3, r3, 2260; CHECK-32-NEXT: addi r4, r3, 15261; CHECK-32-NEXT: rlwinm r4, r4, 0, 0, 27262; CHECK-32-NEXT: neg r5, r4263; CHECK-32-NEXT: li r6, -4096264; CHECK-32-NEXT: divw r7, r5, r6265; CHECK-32-NEXT: stw r31, 28(r1)266; CHECK-32-NEXT: mr r31, r1267; CHECK-32-NEXT: addi r4, r31, 32268; CHECK-32-NEXT: mullw r6, r7, r6269; CHECK-32-NEXT: sub r6, r5, r6270; CHECK-32-NEXT: add r5, r1, r5271; CHECK-32-NEXT: stwux r4, r1, r6272; CHECK-32-NEXT: cmpw r1, r5273; CHECK-32-NEXT: beq cr0, .LBB1_2274; CHECK-32-NEXT: .LBB1_1:275; CHECK-32-NEXT: stwu r4, -4096(r1)276; CHECK-32-NEXT: cmpw r1, r5277; CHECK-32-NEXT: bne cr0, .LBB1_1278; CHECK-32-NEXT: .LBB1_2:279; CHECK-32-NEXT: addi r4, r1, 16280; CHECK-32-NEXT: li r5, 1281; CHECK-32-NEXT: add r3, r4, r3282; CHECK-32-NEXT: stw r5, 4096(r3)283; CHECK-32-NEXT: lwz r3, 0(r4)284; CHECK-32-NEXT: lwz r31, 0(r1)285; CHECK-32-NEXT: lwz r0, -4(r31)286; CHECK-32-NEXT: mr r1, r31287; CHECK-32-NEXT: mr r31, r0288; CHECK-32-NEXT: blr289 %a = alloca i32, i32 %n, align 16290 %i = add i32 %n, 1024291 %b = getelementptr inbounds i32, ptr %a, i32 %i292 store volatile i32 1, ptr %b293 %c = load volatile i32, ptr %a294 ret i32 %c295}296 297define i32 @f(i32 %n) local_unnamed_addr #0 "stack-probe-size"="65536" nounwind {298; CHECK-LE-LABEL: f:299; CHECK-LE: # %bb.0:300; CHECK-LE-NEXT: std r31, -8(r1)301; CHECK-LE-NEXT: stdu r1, -48(r1)302; CHECK-LE-NEXT: rldic r3, r3, 2, 30303; CHECK-LE-NEXT: lis r5, -1304; CHECK-LE-NEXT: mr r31, r1305; CHECK-LE-NEXT: addi r3, r3, 15306; CHECK-LE-NEXT: ori r5, r5, 0307; CHECK-LE-NEXT: rldicl r3, r3, 60, 4308; CHECK-LE-NEXT: rldicl r3, r3, 4, 29309; CHECK-LE-NEXT: neg r6, r3310; CHECK-LE-NEXT: addi r3, r31, 48311; CHECK-LE-NEXT: divd r7, r6, r5312; CHECK-LE-NEXT: add r4, r1, r6313; CHECK-LE-NEXT: mulld r7, r7, r5314; CHECK-LE-NEXT: sub r6, r6, r7315; CHECK-LE-NEXT: stdux r3, r1, r6316; CHECK-LE-NEXT: cmpd r1, r4317; CHECK-LE-NEXT: beq cr0, .LBB2_2318; CHECK-LE-NEXT: .LBB2_1:319; CHECK-LE-NEXT: stdux r3, r1, r5320; CHECK-LE-NEXT: cmpd r1, r4321; CHECK-LE-NEXT: bne cr0, .LBB2_1322; CHECK-LE-NEXT: .LBB2_2:323; CHECK-LE-NEXT: li r4, 1324; CHECK-LE-NEXT: addi r3, r1, 32325; CHECK-LE-NEXT: stw r4, 4792(r3)326; CHECK-LE-NEXT: lwz r3, 0(r3)327; CHECK-LE-NEXT: ld r1, 0(r1)328; CHECK-LE-NEXT: ld r31, -8(r1)329; CHECK-LE-NEXT: blr330;331; CHECK-P9-LE-LABEL: f:332; CHECK-P9-LE: # %bb.0:333; CHECK-P9-LE-NEXT: std r31, -8(r1)334; CHECK-P9-LE-NEXT: stdu r1, -48(r1)335; CHECK-P9-LE-NEXT: rldic r3, r3, 2, 30336; CHECK-P9-LE-NEXT: lis r5, -1337; CHECK-P9-LE-NEXT: mr r31, r1338; CHECK-P9-LE-NEXT: addi r3, r3, 15339; CHECK-P9-LE-NEXT: ori r5, r5, 0340; CHECK-P9-LE-NEXT: rldicl r3, r3, 60, 4341; CHECK-P9-LE-NEXT: rldicl r3, r3, 4, 29342; CHECK-P9-LE-NEXT: neg r6, r3343; CHECK-P9-LE-NEXT: addi r3, r31, 48344; CHECK-P9-LE-NEXT: divd r7, r6, r5345; CHECK-P9-LE-NEXT: add r4, r1, r6346; CHECK-P9-LE-NEXT: mulld r7, r7, r5347; CHECK-P9-LE-NEXT: sub r6, r6, r7348; CHECK-P9-LE-NEXT: stdux r3, r1, r6349; CHECK-P9-LE-NEXT: cmpd r1, r4350; CHECK-P9-LE-NEXT: beq cr0, .LBB2_2351; CHECK-P9-LE-NEXT: .LBB2_1:352; CHECK-P9-LE-NEXT: stdux r3, r1, r5353; CHECK-P9-LE-NEXT: cmpd r1, r4354; CHECK-P9-LE-NEXT: bne cr0, .LBB2_1355; CHECK-P9-LE-NEXT: .LBB2_2:356; CHECK-P9-LE-NEXT: li r4, 1357; CHECK-P9-LE-NEXT: addi r3, r1, 32358; CHECK-P9-LE-NEXT: stw r4, 4792(r3)359; CHECK-P9-LE-NEXT: lwz r3, 0(r3)360; CHECK-P9-LE-NEXT: ld r1, 0(r1)361; CHECK-P9-LE-NEXT: ld r31, -8(r1)362; CHECK-P9-LE-NEXT: blr363;364; CHECK-BE-LABEL: f:365; CHECK-BE: # %bb.0:366; CHECK-BE-NEXT: std r31, -8(r1)367; CHECK-BE-NEXT: stdu r1, -64(r1)368; CHECK-BE-NEXT: rldic r3, r3, 2, 30369; CHECK-BE-NEXT: lis r4, -1370; CHECK-BE-NEXT: addi r3, r3, 15371; CHECK-BE-NEXT: rldicl r3, r3, 60, 4372; CHECK-BE-NEXT: ori r4, r4, 0373; CHECK-BE-NEXT: rldicl r3, r3, 4, 29374; CHECK-BE-NEXT: mr r31, r1375; CHECK-BE-NEXT: neg r5, r3376; CHECK-BE-NEXT: divd r6, r5, r4377; CHECK-BE-NEXT: addi r3, r31, 64378; CHECK-BE-NEXT: mulld r6, r6, r4379; CHECK-BE-NEXT: sub r6, r5, r6380; CHECK-BE-NEXT: add r5, r1, r5381; CHECK-BE-NEXT: stdux r3, r1, r6382; CHECK-BE-NEXT: cmpd r1, r5383; CHECK-BE-NEXT: beq cr0, .LBB2_2384; CHECK-BE-NEXT: .LBB2_1:385; CHECK-BE-NEXT: stdux r3, r1, r4386; CHECK-BE-NEXT: cmpd r1, r5387; CHECK-BE-NEXT: bne cr0, .LBB2_1388; CHECK-BE-NEXT: .LBB2_2:389; CHECK-BE-NEXT: li r4, 1390; CHECK-BE-NEXT: addi r3, r1, 48391; CHECK-BE-NEXT: stw r4, 4792(r3)392; CHECK-BE-NEXT: lwz r3, 0(r3)393; CHECK-BE-NEXT: ld r1, 0(r1)394; CHECK-BE-NEXT: ld r31, -8(r1)395; CHECK-BE-NEXT: blr396;397; CHECK-32-LABEL: f:398; CHECK-32: # %bb.0:399; CHECK-32-NEXT: stwu r1, -32(r1)400; CHECK-32-NEXT: slwi r3, r3, 2401; CHECK-32-NEXT: addi r3, r3, 15402; CHECK-32-NEXT: rlwinm r3, r3, 0, 0, 27403; CHECK-32-NEXT: lis r4, -1404; CHECK-32-NEXT: neg r5, r3405; CHECK-32-NEXT: ori r4, r4, 0406; CHECK-32-NEXT: divw r6, r5, r4407; CHECK-32-NEXT: stw r31, 28(r1)408; CHECK-32-NEXT: mr r31, r1409; CHECK-32-NEXT: addi r3, r31, 32410; CHECK-32-NEXT: mullw r6, r6, r4411; CHECK-32-NEXT: sub r6, r5, r6412; CHECK-32-NEXT: add r5, r1, r5413; CHECK-32-NEXT: stwux r3, r1, r6414; CHECK-32-NEXT: cmpw r1, r5415; CHECK-32-NEXT: beq cr0, .LBB2_2416; CHECK-32-NEXT: .LBB2_1:417; CHECK-32-NEXT: stwux r3, r1, r4418; CHECK-32-NEXT: cmpw r1, r5419; CHECK-32-NEXT: bne cr0, .LBB2_1420; CHECK-32-NEXT: .LBB2_2:421; CHECK-32-NEXT: li r4, 1422; CHECK-32-NEXT: addi r3, r1, 16423; CHECK-32-NEXT: stw r4, 4792(r3)424; CHECK-32-NEXT: lwz r3, 0(r3)425; CHECK-32-NEXT: lwz r31, 0(r1)426; CHECK-32-NEXT: lwz r0, -4(r31)427; CHECK-32-NEXT: mr r1, r31428; CHECK-32-NEXT: mr r31, r0429; CHECK-32-NEXT: blr430 %a = alloca i32, i32 %n, align 16431 %b = getelementptr inbounds i32, ptr %a, i64 1198432 store volatile i32 1, ptr %b433 %c = load volatile i32, ptr %a434 ret i32 %c435}436 437attributes #0 = {"probe-stack"="inline-asm"}438