475 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \3; RUN: -mtriple=powerpc64le-linux-gnu < %s | FileCheck \4; RUN: -check-prefix=CHECK-LE %s5; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \6; RUN: -mtriple=powerpc64-linux-gnu < %s | FileCheck \7; RUN: -check-prefix=CHECK-BE %s8; RUN: llc -ppc-asm-full-reg-names -verify-machineinstrs \9; RUN: -mtriple=powerpc-linux-gnu < %s | FileCheck \10; RUN: -check-prefix=CHECK-32 %s11 12; Free probe13define i8 @f0() #0 nounwind {14; CHECK-LE-LABEL: f0:15; CHECK-LE: # %bb.0: # %entry16; CHECK-LE-NEXT: li r3, 317; CHECK-LE-NEXT: stb r3, -64(r1)18; CHECK-LE-NEXT: lbz r3, -64(r1)19; CHECK-LE-NEXT: blr20;21; CHECK-BE-LABEL: f0:22; CHECK-BE: # %bb.0: # %entry23; CHECK-BE-NEXT: li r3, 324; CHECK-BE-NEXT: stb r3, -64(r1)25; CHECK-BE-NEXT: lbz r3, -64(r1)26; CHECK-BE-NEXT: blr27;28; CHECK-32-LABEL: f0:29; CHECK-32: # %bb.0: # %entry30; CHECK-32-NEXT: stwu r1, -80(r1)31; CHECK-32-NEXT: li r3, 332; CHECK-32-NEXT: stb r3, 16(r1)33; CHECK-32-NEXT: lbz r3, 16(r1)34; CHECK-32-NEXT: addi r1, r1, 8035; CHECK-32-NEXT: blr36entry:37 %a = alloca i8, i64 6438 %b = getelementptr inbounds i8, ptr %a, i64 6339 store volatile i8 3, ptr %a40 %c = load volatile i8, ptr %a41 ret i8 %c42}43 44define i8 @f1() #0 "stack-probe-size"="0" nounwind {45; CHECK-LE-LABEL: f1:46; CHECK-LE: # %bb.0: # %entry47; CHECK-LE-NEXT: mr r0, r148; CHECK-LE-NEXT: li r12, 25949; CHECK-LE-NEXT: mtctr r1250; CHECK-LE-NEXT: .LBB1_1: # %entry51; CHECK-LE-NEXT: #52; CHECK-LE-NEXT: stdu r0, -16(r1)53; CHECK-LE-NEXT: bdnz .LBB1_154; CHECK-LE-NEXT: # %bb.2: # %entry55; CHECK-LE-NEXT: li r3, 356; CHECK-LE-NEXT: stb r3, 48(r1)57; CHECK-LE-NEXT: lbz r3, 48(r1)58; CHECK-LE-NEXT: addi r1, r1, 414459; CHECK-LE-NEXT: blr60;61; CHECK-BE-LABEL: f1:62; CHECK-BE: # %bb.0: # %entry63; CHECK-BE-NEXT: mr r0, r164; CHECK-BE-NEXT: li r12, 26065; CHECK-BE-NEXT: mtctr r1266; CHECK-BE-NEXT: .LBB1_1: # %entry67; CHECK-BE-NEXT: #68; CHECK-BE-NEXT: stdu r0, -16(r1)69; CHECK-BE-NEXT: bdnz .LBB1_170; CHECK-BE-NEXT: # %bb.2: # %entry71; CHECK-BE-NEXT: li r3, 372; CHECK-BE-NEXT: stb r3, 64(r1)73; CHECK-BE-NEXT: lbz r3, 64(r1)74; CHECK-BE-NEXT: addi r1, r1, 416075; CHECK-BE-NEXT: blr76;77; CHECK-32-LABEL: f1:78; CHECK-32: # %bb.0: # %entry79; CHECK-32-NEXT: mr r0, r180; CHECK-32-NEXT: li r12, 25781; CHECK-32-NEXT: mtctr r1282; CHECK-32-NEXT: .LBB1_1: # %entry83; CHECK-32-NEXT: #84; CHECK-32-NEXT: stwu r0, -16(r1)85; CHECK-32-NEXT: bdnz .LBB1_186; CHECK-32-NEXT: # %bb.2: # %entry87; CHECK-32-NEXT: li r3, 388; CHECK-32-NEXT: sub r0, r1, r089; CHECK-32-NEXT: stb r3, 16(r1)90; CHECK-32-NEXT: sub r0, r1, r091; CHECK-32-NEXT: lbz r3, 16(r1)92; CHECK-32-NEXT: addi r1, r1, 411293; CHECK-32-NEXT: blr94entry:95 %a = alloca i8, i64 409696 %b = getelementptr inbounds i8, ptr %a, i64 6397 store volatile i8 3, ptr %a98 %c = load volatile i8, ptr %a99 ret i8 %c100}101 102define i8 @f2() #0 nounwind {103; CHECK-LE-LABEL: f2:104; CHECK-LE: # %bb.0: # %entry105; CHECK-LE-NEXT: mr r0, r1106; CHECK-LE-NEXT: stdu r0, -48(r1)107; CHECK-LE-NEXT: li r12, 16108; CHECK-LE-NEXT: mtctr r12109; CHECK-LE-NEXT: .LBB2_1: # %entry110; CHECK-LE-NEXT: #111; CHECK-LE-NEXT: stdu r0, -4096(r1)112; CHECK-LE-NEXT: bdnz .LBB2_1113; CHECK-LE-NEXT: # %bb.2: # %entry114; CHECK-LE-NEXT: li r3, 3115; CHECK-LE-NEXT: stb r3, 48(r1)116; CHECK-LE-NEXT: lbz r3, 48(r1)117; CHECK-LE-NEXT: ld r1, 0(r1)118; CHECK-LE-NEXT: blr119;120; CHECK-BE-LABEL: f2:121; CHECK-BE: # %bb.0: # %entry122; CHECK-BE-NEXT: mr r0, r1123; CHECK-BE-NEXT: stdu r0, -64(r1)124; CHECK-BE-NEXT: li r12, 16125; CHECK-BE-NEXT: mtctr r12126; CHECK-BE-NEXT: .LBB2_1: # %entry127; CHECK-BE-NEXT: #128; CHECK-BE-NEXT: stdu r0, -4096(r1)129; CHECK-BE-NEXT: bdnz .LBB2_1130; CHECK-BE-NEXT: # %bb.2: # %entry131; CHECK-BE-NEXT: li r3, 3132; CHECK-BE-NEXT: stb r3, 64(r1)133; CHECK-BE-NEXT: lbz r3, 64(r1)134; CHECK-BE-NEXT: ld r1, 0(r1)135; CHECK-BE-NEXT: blr136;137; CHECK-32-LABEL: f2:138; CHECK-32: # %bb.0: # %entry139; CHECK-32-NEXT: mr r0, r1140; CHECK-32-NEXT: stwu r0, -16(r1)141; CHECK-32-NEXT: li r12, 16142; CHECK-32-NEXT: mtctr r12143; CHECK-32-NEXT: .LBB2_1: # %entry144; CHECK-32-NEXT: #145; CHECK-32-NEXT: stwu r0, -4096(r1)146; CHECK-32-NEXT: bdnz .LBB2_1147; CHECK-32-NEXT: # %bb.2: # %entry148; CHECK-32-NEXT: sub r0, r1, r0149; CHECK-32-NEXT: li r3, 3150; CHECK-32-NEXT: sub r0, r1, r0151; CHECK-32-NEXT: stb r3, 16(r1)152; CHECK-32-NEXT: mr r0, r31153; CHECK-32-NEXT: lbz r3, 16(r1)154; CHECK-32-NEXT: lwz r31, 0(r1)155; CHECK-32-NEXT: mr r1, r31156; CHECK-32-NEXT: mr r31, r0157; CHECK-32-NEXT: blr158entry:159 %a = alloca i8, i64 65536160 %b = getelementptr inbounds i8, ptr %a, i64 63161 store volatile i8 3, ptr %a162 %c = load volatile i8, ptr %a163 ret i8 %c164}165 166define i8 @f3() #0 "stack-probe-size"="32768" nounwind {167; CHECK-LE-LABEL: f3:168; CHECK-LE: # %bb.0: # %entry169; CHECK-LE-NEXT: mr r0, r1170; CHECK-LE-NEXT: stdu r0, -48(r1)171; CHECK-LE-NEXT: stdu r0, -32768(r1)172; CHECK-LE-NEXT: stdu r0, -32768(r1)173; CHECK-LE-NEXT: li r3, 3174; CHECK-LE-NEXT: stb r3, 48(r1)175; CHECK-LE-NEXT: lbz r3, 48(r1)176; CHECK-LE-NEXT: ld r1, 0(r1)177; CHECK-LE-NEXT: blr178;179; CHECK-BE-LABEL: f3:180; CHECK-BE: # %bb.0: # %entry181; CHECK-BE-NEXT: mr r0, r1182; CHECK-BE-NEXT: stdu r0, -64(r1)183; CHECK-BE-NEXT: stdu r0, -32768(r1)184; CHECK-BE-NEXT: stdu r0, -32768(r1)185; CHECK-BE-NEXT: li r3, 3186; CHECK-BE-NEXT: stb r3, 64(r1)187; CHECK-BE-NEXT: lbz r3, 64(r1)188; CHECK-BE-NEXT: ld r1, 0(r1)189; CHECK-BE-NEXT: blr190;191; CHECK-32-LABEL: f3:192; CHECK-32: # %bb.0: # %entry193; CHECK-32-NEXT: mr r0, r1194; CHECK-32-NEXT: stwu r0, -16(r1)195; CHECK-32-NEXT: stwu r0, -32768(r1)196; CHECK-32-NEXT: stwu r0, -32768(r1)197; CHECK-32-NEXT: sub r0, r1, r0198; CHECK-32-NEXT: li r3, 3199; CHECK-32-NEXT: sub r0, r1, r0200; CHECK-32-NEXT: stb r3, 16(r1)201; CHECK-32-NEXT: mr r0, r31202; CHECK-32-NEXT: lbz r3, 16(r1)203; CHECK-32-NEXT: lwz r31, 0(r1)204; CHECK-32-NEXT: mr r1, r31205; CHECK-32-NEXT: mr r31, r0206; CHECK-32-NEXT: blr207entry:208 %a = alloca i8, i64 65536209 %b = getelementptr inbounds i8, ptr %a, i64 63210 store volatile i8 3, ptr %a211 %c = load volatile i8, ptr %a212 ret i8 %c213}214 215; Same as f2, but without protection.216define i8 @f4() nounwind {217; CHECK-LE-LABEL: f4:218; CHECK-LE: # %bb.0: # %entry219; CHECK-LE-NEXT: lis r0, -2220; CHECK-LE-NEXT: ori r0, r0, 65488221; CHECK-LE-NEXT: stdux r1, r1, r0222; CHECK-LE-NEXT: li r3, 3223; CHECK-LE-NEXT: stb r3, 48(r1)224; CHECK-LE-NEXT: lbz r3, 48(r1)225; CHECK-LE-NEXT: ld r1, 0(r1)226; CHECK-LE-NEXT: blr227;228; CHECK-BE-LABEL: f4:229; CHECK-BE: # %bb.0: # %entry230; CHECK-BE-NEXT: lis r0, -2231; CHECK-BE-NEXT: ori r0, r0, 65472232; CHECK-BE-NEXT: stdux r1, r1, r0233; CHECK-BE-NEXT: li r3, 3234; CHECK-BE-NEXT: stb r3, 64(r1)235; CHECK-BE-NEXT: lbz r3, 64(r1)236; CHECK-BE-NEXT: ld r1, 0(r1)237; CHECK-BE-NEXT: blr238;239; CHECK-32-LABEL: f4:240; CHECK-32: # %bb.0: # %entry241; CHECK-32-NEXT: lis r0, -2242; CHECK-32-NEXT: ori r0, r0, 65520243; CHECK-32-NEXT: stwux r1, r1, r0244; CHECK-32-NEXT: li r3, 3245; CHECK-32-NEXT: sub r0, r1, r0246; CHECK-32-NEXT: stb r3, 16(r1)247; CHECK-32-NEXT: mr r0, r31248; CHECK-32-NEXT: lbz r3, 16(r1)249; CHECK-32-NEXT: lwz r31, 0(r1)250; CHECK-32-NEXT: mr r1, r31251; CHECK-32-NEXT: mr r31, r0252; CHECK-32-NEXT: blr253entry:254 %a = alloca i8, i64 65536255 %b = getelementptr inbounds i8, ptr %a, i64 63256 store volatile i8 3, ptr %a257 %c = load volatile i8, ptr %a258 ret i8 %c259}260 261define i8 @f5() #0 "stack-probe-size"="65536" nounwind {262; CHECK-LE-LABEL: f5:263; CHECK-LE: # %bb.0: # %entry264; CHECK-LE-NEXT: mr r0, r1265; CHECK-LE-NEXT: stdu r0, -48(r1)266; CHECK-LE-NEXT: li r12, 16267; CHECK-LE-NEXT: mtctr r12268; CHECK-LE-NEXT: lis r12, -1269; CHECK-LE-NEXT: ori r12, r12, 0270; CHECK-LE-NEXT: .LBB5_1: # %entry271; CHECK-LE-NEXT: #272; CHECK-LE-NEXT: stdux r0, r1, r12273; CHECK-LE-NEXT: bdnz .LBB5_1274; CHECK-LE-NEXT: # %bb.2: # %entry275; CHECK-LE-NEXT: li r3, 3276; CHECK-LE-NEXT: stb r3, 48(r1)277; CHECK-LE-NEXT: lbz r3, 48(r1)278; CHECK-LE-NEXT: ld r1, 0(r1)279; CHECK-LE-NEXT: blr280;281; CHECK-BE-LABEL: f5:282; CHECK-BE: # %bb.0: # %entry283; CHECK-BE-NEXT: mr r0, r1284; CHECK-BE-NEXT: stdu r0, -64(r1)285; CHECK-BE-NEXT: li r12, 16286; CHECK-BE-NEXT: mtctr r12287; CHECK-BE-NEXT: lis r12, -1288; CHECK-BE-NEXT: ori r12, r12, 0289; CHECK-BE-NEXT: .LBB5_1: # %entry290; CHECK-BE-NEXT: #291; CHECK-BE-NEXT: stdux r0, r1, r12292; CHECK-BE-NEXT: bdnz .LBB5_1293; CHECK-BE-NEXT: # %bb.2: # %entry294; CHECK-BE-NEXT: li r3, 3295; CHECK-BE-NEXT: stb r3, 64(r1)296; CHECK-BE-NEXT: lbz r3, 64(r1)297; CHECK-BE-NEXT: ld r1, 0(r1)298; CHECK-BE-NEXT: blr299;300; CHECK-32-LABEL: f5:301; CHECK-32: # %bb.0: # %entry302; CHECK-32-NEXT: mr r0, r1303; CHECK-32-NEXT: stwu r0, -16(r1)304; CHECK-32-NEXT: li r12, 16305; CHECK-32-NEXT: mtctr r12306; CHECK-32-NEXT: lis r12, -1307; CHECK-32-NEXT: ori r12, r12, 0308; CHECK-32-NEXT: .LBB5_1: # %entry309; CHECK-32-NEXT: #310; CHECK-32-NEXT: stwux r0, r1, r12311; CHECK-32-NEXT: bdnz .LBB5_1312; CHECK-32-NEXT: # %bb.2: # %entry313; CHECK-32-NEXT: sub r0, r1, r0314; CHECK-32-NEXT: li r3, 3315; CHECK-32-NEXT: sub r0, r1, r0316; CHECK-32-NEXT: stb r3, 16(r1)317; CHECK-32-NEXT: mr r0, r31318; CHECK-32-NEXT: lbz r3, 16(r1)319; CHECK-32-NEXT: lwz r31, 0(r1)320; CHECK-32-NEXT: mr r1, r31321; CHECK-32-NEXT: mr r31, r0322; CHECK-32-NEXT: blr323entry:324 %a = alloca i8, i64 1048576325 %b = getelementptr inbounds i8, ptr %a, i64 63326 store volatile i8 3, ptr %a327 %c = load volatile i8, ptr %a328 ret i8 %c329}330 331define i8 @f6() #0 nounwind {332; CHECK-LE-LABEL: f6:333; CHECK-LE: # %bb.0: # %entry334; CHECK-LE-NEXT: mr r0, r1335; CHECK-LE-NEXT: stdu r0, -48(r1)336; CHECK-LE-NEXT: lis r12, 4337; CHECK-LE-NEXT: ori r12, r12, 0338; CHECK-LE-NEXT: mtctr r12339; CHECK-LE-NEXT: .LBB6_1: # %entry340; CHECK-LE-NEXT: #341; CHECK-LE-NEXT: stdu r0, -4096(r1)342; CHECK-LE-NEXT: bdnz .LBB6_1343; CHECK-LE-NEXT: # %bb.2: # %entry344; CHECK-LE-NEXT: li r3, 3345; CHECK-LE-NEXT: stb r3, 48(r1)346; CHECK-LE-NEXT: lbz r3, 48(r1)347; CHECK-LE-NEXT: ld r1, 0(r1)348; CHECK-LE-NEXT: blr349;350; CHECK-BE-LABEL: f6:351; CHECK-BE: # %bb.0: # %entry352; CHECK-BE-NEXT: mr r0, r1353; CHECK-BE-NEXT: stdu r0, -64(r1)354; CHECK-BE-NEXT: lis r12, 4355; CHECK-BE-NEXT: ori r12, r12, 0356; CHECK-BE-NEXT: mtctr r12357; CHECK-BE-NEXT: .LBB6_1: # %entry358; CHECK-BE-NEXT: #359; CHECK-BE-NEXT: stdu r0, -4096(r1)360; CHECK-BE-NEXT: bdnz .LBB6_1361; CHECK-BE-NEXT: # %bb.2: # %entry362; CHECK-BE-NEXT: li r3, 3363; CHECK-BE-NEXT: stb r3, 64(r1)364; CHECK-BE-NEXT: lbz r3, 64(r1)365; CHECK-BE-NEXT: ld r1, 0(r1)366; CHECK-BE-NEXT: blr367;368; CHECK-32-LABEL: f6:369; CHECK-32: # %bb.0: # %entry370; CHECK-32-NEXT: mr r0, r1371; CHECK-32-NEXT: stwu r0, -16(r1)372; CHECK-32-NEXT: lis r12, 4373; CHECK-32-NEXT: ori r12, r12, 0374; CHECK-32-NEXT: mtctr r12375; CHECK-32-NEXT: .LBB6_1: # %entry376; CHECK-32-NEXT: #377; CHECK-32-NEXT: stwu r0, -4096(r1)378; CHECK-32-NEXT: bdnz .LBB6_1379; CHECK-32-NEXT: # %bb.2: # %entry380; CHECK-32-NEXT: sub r0, r1, r0381; CHECK-32-NEXT: li r3, 3382; CHECK-32-NEXT: sub r0, r1, r0383; CHECK-32-NEXT: stb r3, 16(r1)384; CHECK-32-NEXT: mr r0, r31385; CHECK-32-NEXT: lbz r3, 16(r1)386; CHECK-32-NEXT: lwz r31, 0(r1)387; CHECK-32-NEXT: mr r1, r31388; CHECK-32-NEXT: mr r31, r0389; CHECK-32-NEXT: blr390entry:391 %a = alloca i8, i64 1073741824392 %b = getelementptr inbounds i8, ptr %a, i64 63393 store volatile i8 3, ptr %a394 %c = load volatile i8, ptr %a395 ret i8 %c396}397 398define i8 @f7() #0 "stack-probe-size"="65536" nounwind {399; CHECK-LE-LABEL: f7:400; CHECK-LE: # %bb.0: # %entry401; CHECK-LE-NEXT: lis r12, -1402; CHECK-LE-NEXT: mr r0, r1403; CHECK-LE-NEXT: ori r12, r12, 13776404; CHECK-LE-NEXT: stdux r0, r1, r12405; CHECK-LE-NEXT: li r12, 15258406; CHECK-LE-NEXT: mtctr r12407; CHECK-LE-NEXT: lis r12, -1408; CHECK-LE-NEXT: ori r12, r12, 0409; CHECK-LE-NEXT: .LBB7_1: # %entry410; CHECK-LE-NEXT: #411; CHECK-LE-NEXT: stdux r0, r1, r12412; CHECK-LE-NEXT: bdnz .LBB7_1413; CHECK-LE-NEXT: # %bb.2: # %entry414; CHECK-LE-NEXT: li r3, 3415; CHECK-LE-NEXT: stb r3, 41(r1)416; CHECK-LE-NEXT: lbz r3, 41(r1)417; CHECK-LE-NEXT: ld r1, 0(r1)418; CHECK-LE-NEXT: blr419;420; CHECK-BE-LABEL: f7:421; CHECK-BE: # %bb.0: # %entry422; CHECK-BE-NEXT: lis r12, -1423; CHECK-BE-NEXT: mr r0, r1424; CHECK-BE-NEXT: ori r12, r12, 13760425; CHECK-BE-NEXT: stdux r0, r1, r12426; CHECK-BE-NEXT: li r12, 15258427; CHECK-BE-NEXT: mtctr r12428; CHECK-BE-NEXT: lis r12, -1429; CHECK-BE-NEXT: ori r12, r12, 0430; CHECK-BE-NEXT: .LBB7_1: # %entry431; CHECK-BE-NEXT: #432; CHECK-BE-NEXT: stdux r0, r1, r12433; CHECK-BE-NEXT: bdnz .LBB7_1434; CHECK-BE-NEXT: # %bb.2: # %entry435; CHECK-BE-NEXT: li r3, 3436; CHECK-BE-NEXT: stb r3, 57(r1)437; CHECK-BE-NEXT: lbz r3, 57(r1)438; CHECK-BE-NEXT: ld r1, 0(r1)439; CHECK-BE-NEXT: blr440;441; CHECK-32-LABEL: f7:442; CHECK-32: # %bb.0: # %entry443; CHECK-32-NEXT: lis r12, -1444; CHECK-32-NEXT: mr r0, r1445; CHECK-32-NEXT: ori r12, r12, 13808446; CHECK-32-NEXT: stwux r0, r1, r12447; CHECK-32-NEXT: li r12, 15258448; CHECK-32-NEXT: mtctr r12449; CHECK-32-NEXT: lis r12, -1450; CHECK-32-NEXT: ori r12, r12, 0451; CHECK-32-NEXT: .LBB7_1: # %entry452; CHECK-32-NEXT: #453; CHECK-32-NEXT: stwux r0, r1, r12454; CHECK-32-NEXT: bdnz .LBB7_1455; CHECK-32-NEXT: # %bb.2: # %entry456; CHECK-32-NEXT: sub r0, r1, r0457; CHECK-32-NEXT: li r3, 3458; CHECK-32-NEXT: sub r0, r1, r0459; CHECK-32-NEXT: stb r3, 9(r1)460; CHECK-32-NEXT: mr r0, r31461; CHECK-32-NEXT: lbz r3, 9(r1)462; CHECK-32-NEXT: lwz r31, 0(r1)463; CHECK-32-NEXT: mr r1, r31464; CHECK-32-NEXT: mr r31, r0465; CHECK-32-NEXT: blr466entry:467 %a = alloca i8, i64 1000000007468 %b = getelementptr inbounds i8, ptr %a, i64 101469 store volatile i8 3, ptr %a470 %c = load volatile i8, ptr %a471 ret i8 %c472}473 474attributes #0 = { "probe-stack"="inline-asm" }475