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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -verify-machineinstrs | FileCheck %s3 4@CVal = external local_unnamed_addr global i8, align 15@SVal = external local_unnamed_addr global i16, align 26@IVal = external local_unnamed_addr global i32, align 47@LVal = external local_unnamed_addr global i64, align 88@USVal = external local_unnamed_addr global i16, align 29@arr = external local_unnamed_addr global ptr, align 810@arri = external local_unnamed_addr global ptr, align 811 12; Test the same constant can be used by different stores.13 14%struct.S = type { i64, i8, i16, i32 }15 16define void @foo(ptr %p) {17; CHECK-LABEL: foo:18; CHECK: # %bb.0:19; CHECK-NEXT: li 4, 020; CHECK-NEXT: std 4, 0(3)21; CHECK-NEXT: stb 4, 8(3)22; CHECK-NEXT: sth 4, 10(3)23; CHECK-NEXT: stw 4, 12(3)24; CHECK-NEXT: blr25 store i64 0, ptr %p, align 826 %c = getelementptr %struct.S, ptr %p, i64 0, i32 127 store i8 0, ptr %c, align 828 %s = getelementptr %struct.S, ptr %p, i64 0, i32 229 store i16 0, ptr %s, align 230 %i = getelementptr %struct.S, ptr %p, i64 0, i32 331 store i32 0, ptr %i, align 432 ret void33 34}35 36define void @bar(ptr %p) {37; CHECK-LABEL: bar:38; CHECK: # %bb.0:39; CHECK-NEXT: li 4, 240; CHECK-NEXT: stw 4, 12(3)41; CHECK-NEXT: sth 4, 10(3)42; CHECK-NEXT: stb 4, 8(3)43; CHECK-NEXT: std 4, 0(3)44; CHECK-NEXT: blr45 %i = getelementptr %struct.S, ptr %p, i64 0, i32 346 store i32 2, ptr %i, align 447 %s = getelementptr %struct.S, ptr %p, i64 0, i32 248 store i16 2, ptr %s, align 249 %c = getelementptr %struct.S, ptr %p, i64 0, i32 150 store i8 2, ptr %c, align 851 store i64 2, ptr %p, align 852 ret void53 54}55 56; Function Attrs: norecurse nounwind57define void @setSmallNeg() {58; CHECK-LABEL: setSmallNeg:59; CHECK: # %bb.0: # %entry60; CHECK-NEXT: addis 3, 2, .LC0@toc@ha61; CHECK-NEXT: li 4, -762; CHECK-NEXT: ld 3, .LC0@toc@l(3)63; CHECK-NEXT: stb 4, 0(3)64; CHECK-NEXT: addis 3, 2, .LC1@toc@ha65; CHECK-NEXT: ld 3, .LC1@toc@l(3)66; CHECK-NEXT: sth 4, 0(3)67; CHECK-NEXT: addis 3, 2, .LC2@toc@ha68; CHECK-NEXT: ld 3, .LC2@toc@l(3)69; CHECK-NEXT: stw 4, 0(3)70; CHECK-NEXT: addis 3, 2, .LC3@toc@ha71; CHECK-NEXT: ld 3, .LC3@toc@l(3)72; CHECK-NEXT: std 4, 0(3)73; CHECK-NEXT: blr74entry:75 store i8 -7, ptr @CVal, align 176 store i16 -7, ptr @SVal, align 277 store i32 -7, ptr @IVal, align 478 store i64 -7, ptr @LVal, align 879 ret void80}81 82; Function Attrs: norecurse nounwind83define void @setSmallPos() {84; CHECK-LABEL: setSmallPos:85; CHECK: # %bb.0: # %entry86; CHECK-NEXT: addis 3, 2, .LC0@toc@ha87; CHECK-NEXT: li 4, 888; CHECK-NEXT: ld 3, .LC0@toc@l(3)89; CHECK-NEXT: stb 4, 0(3)90; CHECK-NEXT: addis 3, 2, .LC1@toc@ha91; CHECK-NEXT: ld 3, .LC1@toc@l(3)92; CHECK-NEXT: sth 4, 0(3)93; CHECK-NEXT: addis 3, 2, .LC2@toc@ha94; CHECK-NEXT: ld 3, .LC2@toc@l(3)95; CHECK-NEXT: stw 4, 0(3)96; CHECK-NEXT: addis 3, 2, .LC3@toc@ha97; CHECK-NEXT: ld 3, .LC3@toc@l(3)98; CHECK-NEXT: std 4, 0(3)99; CHECK-NEXT: blr100entry:101 store i8 8, ptr @CVal, align 1102 store i16 8, ptr @SVal, align 2103 store i32 8, ptr @IVal, align 4104 store i64 8, ptr @LVal, align 8105 ret void106}107 108; Function Attrs: norecurse nounwind109define void @setMaxNeg() {110; CHECK-LABEL: setMaxNeg:111; CHECK: # %bb.0: # %entry112; CHECK-NEXT: addis 3, 2, .LC1@toc@ha113; CHECK-NEXT: li 4, -32768114; CHECK-NEXT: ld 3, .LC1@toc@l(3)115; CHECK-NEXT: sth 4, 0(3)116; CHECK-NEXT: addis 3, 2, .LC2@toc@ha117; CHECK-NEXT: ld 3, .LC2@toc@l(3)118; CHECK-NEXT: stw 4, 0(3)119; CHECK-NEXT: addis 3, 2, .LC3@toc@ha120; CHECK-NEXT: ld 3, .LC3@toc@l(3)121; CHECK-NEXT: std 4, 0(3)122; CHECK-NEXT: blr123entry:124 store i16 -32768, ptr @SVal, align 2125 store i32 -32768, ptr @IVal, align 4126 store i64 -32768, ptr @LVal, align 8127 ret void128}129 130; Function Attrs: norecurse nounwind131define void @setMaxPos() {132; CHECK-LABEL: setMaxPos:133; CHECK: # %bb.0: # %entry134; CHECK-NEXT: addis 3, 2, .LC1@toc@ha135; CHECK-NEXT: li 4, 32767136; CHECK-NEXT: ld 3, .LC1@toc@l(3)137; CHECK-NEXT: sth 4, 0(3)138; CHECK-NEXT: addis 3, 2, .LC2@toc@ha139; CHECK-NEXT: ld 3, .LC2@toc@l(3)140; CHECK-NEXT: stw 4, 0(3)141; CHECK-NEXT: addis 3, 2, .LC3@toc@ha142; CHECK-NEXT: ld 3, .LC3@toc@l(3)143; CHECK-NEXT: std 4, 0(3)144; CHECK-NEXT: blr145entry:146 store i16 32767, ptr @SVal, align 2147 store i32 32767, ptr @IVal, align 4148 store i64 32767, ptr @LVal, align 8149 ret void150}151 152; Function Attrs: norecurse nounwind153define void @setExcessiveNeg() {154; CHECK-LABEL: setExcessiveNeg:155; CHECK: # %bb.0: # %entry156; CHECK-NEXT: addis 3, 2, .LC2@toc@ha157; CHECK-NEXT: lis 4, -1158; CHECK-NEXT: ld 3, .LC2@toc@l(3)159; CHECK-NEXT: ori 4, 4, 32767160; CHECK-NEXT: stw 4, 0(3)161; CHECK-NEXT: addis 3, 2, .LC3@toc@ha162; CHECK-NEXT: ld 3, .LC3@toc@l(3)163; CHECK-NEXT: std 4, 0(3)164; CHECK-NEXT: blr165entry:166 store i32 -32769, ptr @IVal, align 4167 store i64 -32769, ptr @LVal, align 8168 ret void169}170 171; Function Attrs: norecurse nounwind172define void @setExcessivePos() {173; CHECK-LABEL: setExcessivePos:174; CHECK: # %bb.0: # %entry175; CHECK-NEXT: addis 3, 2, .LC4@toc@ha176; CHECK-NEXT: li 4, 0177; CHECK-NEXT: ld 3, .LC4@toc@l(3)178; CHECK-NEXT: ori 4, 4, 32768179; CHECK-NEXT: sth 4, 0(3)180; CHECK-NEXT: addis 3, 2, .LC2@toc@ha181; CHECK-NEXT: ld 3, .LC2@toc@l(3)182; CHECK-NEXT: stw 4, 0(3)183; CHECK-NEXT: addis 3, 2, .LC3@toc@ha184; CHECK-NEXT: ld 3, .LC3@toc@l(3)185; CHECK-NEXT: std 4, 0(3)186; CHECK-NEXT: blr187entry:188 store i16 -32768, ptr @USVal, align 2189 store i32 32768, ptr @IVal, align 4190 store i64 32768, ptr @LVal, align 8191 ret void192}193 194define void @SetArr(i32 signext %Len) {195; CHECK-LABEL: SetArr:196; CHECK: # %bb.0: # %entry197; CHECK-NEXT: cmpwi 3, 0198; CHECK-NEXT: blelr 0199; CHECK-NEXT: # %bb.1: # %for.body.lr.ph200; CHECK-NEXT: addis 4, 2, .LC5@toc@ha201; CHECK-NEXT: addis 5, 2, .LC6@toc@ha202; CHECK-NEXT: clrldi 6, 3, 32203; CHECK-NEXT: ld 4, .LC5@toc@l(4)204; CHECK-NEXT: ld 5, .LC6@toc@l(5)205; CHECK-NEXT: ld 4, 0(4)206; CHECK-NEXT: ld 5, 0(5)207; CHECK-NEXT: mtctr 6208; CHECK-NEXT: addi 3, 4, -8209; CHECK-NEXT: addi 4, 5, -4210; CHECK-NEXT: li 5, -7211; CHECK-NEXT: .p2align 4212; CHECK-NEXT: .LBB8_2: # %for.body213; CHECK-NEXT: #214; CHECK-NEXT: stdu 5, 8(3)215; CHECK-NEXT: stwu 5, 4(4)216; CHECK-NEXT: bdnz .LBB8_2217; CHECK-NEXT: # %bb.3: # %for.cond.cleanup218; CHECK-NEXT: blr219entry:220 %cmp7 = icmp sgt i32 %Len, 0221 br i1 %cmp7, label %for.body.lr.ph, label %for.cond.cleanup222 223for.body.lr.ph: ; preds = %entry224 %0 = load ptr, ptr @arr, align 8225 %1 = load ptr, ptr @arri, align 8226 %wide.trip.count = zext i32 %Len to i64227 br label %for.body228 229for.cond.cleanup: ; preds = %for.body, %entry230 ret void231 232for.body: ; preds = %for.body, %for.body.lr.ph233 %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ]234 %arrayidx = getelementptr inbounds i64, ptr %0, i64 %indvars.iv235 store i64 -7, ptr %arrayidx, align 8236 %arrayidx2 = getelementptr inbounds i32, ptr %1, i64 %indvars.iv237 store i32 -7, ptr %arrayidx2, align 4238 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1239 %exitcond = icmp eq i64 %indvars.iv.next, %wide.trip.count240 br i1 %exitcond, label %for.cond.cleanup, label %for.body241}242 243define void @setSameValDiffSizeCI() {244; CHECK-LABEL: setSameValDiffSizeCI:245; CHECK: # %bb.0: # %entry246; CHECK-NEXT: addis 3, 2, .LC2@toc@ha247; CHECK-NEXT: li 4, 255248; CHECK-NEXT: ld 3, .LC2@toc@l(3)249; CHECK-NEXT: stw 4, 0(3)250; CHECK-NEXT: addis 3, 2, .LC0@toc@ha251; CHECK-NEXT: ld 3, .LC0@toc@l(3)252; CHECK-NEXT: stb 4, 0(3)253; CHECK-NEXT: blr254entry:255 store i32 255, ptr @IVal, align 4256 store i8 -1, ptr @CVal, align 1257 ret void258}259 260define void @setSameValDiffSizeSI() {261; CHECK-LABEL: setSameValDiffSizeSI:262; CHECK: # %bb.0: # %entry263; CHECK-NEXT: addis 3, 2, .LC2@toc@ha264; CHECK-NEXT: li 4, 0265; CHECK-NEXT: ld 3, .LC2@toc@l(3)266; CHECK-NEXT: ori 4, 4, 65535267; CHECK-NEXT: stw 4, 0(3)268; CHECK-NEXT: addis 3, 2, .LC1@toc@ha269; CHECK-NEXT: ld 3, .LC1@toc@l(3)270; CHECK-NEXT: sth 4, 0(3)271; CHECK-NEXT: blr272entry:273 store i32 65535, ptr @IVal, align 4274 store i16 -1, ptr @SVal, align 2275 ret void276}277