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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mcpu=generic -verify-machineinstrs < %s | FileCheck %s3 4target datalayout = "E-m:a-i64:64-n32:64-S128-v256:256:256-v512:512:512"5target triple = "powerpc64-ibm-aix7.2.0.0"6 7%struct.USST = type { i16, i16 }8%struct.SST = type { i16, i16 }9%struct.CST = type { i8, i8 }10%struct.SCST = type { i8, i8 }11%struct.ST = type { i32, i32 }12%struct.UST = type { i32, i32 }13%struct.LST = type { i64, i64 }14%struct.ULST = type { i64, i64 }15 16; Function Attrs: nounwind17define zeroext i32 @ustc1(ptr noundef byval(%struct.USST) align 8 %s) {18; CHECK-LABEL: ustc1:19; CHECK: # %bb.0: # %entry20; CHECK-NEXT: mr 4, 321; CHECK-NEXT: rldicl 3, 3, 8, 5622; CHECK-NEXT: std 4, 48(1)23; CHECK-NEXT: blr24entry:25 %0 = load i16, ptr %s, align 826 %conv = zext i16 %0 to i3227 %shr = ashr i32 %conv, 828 ret i32 %shr29}30 31; Function Attrs: nounwind32define zeroext i32 @ustc2(ptr noundef byval(%struct.USST) align 8 %s) {33; CHECK-LABEL: ustc2:34; CHECK: # %bb.0: # %entry35; CHECK-NEXT: mr 4, 336; CHECK-NEXT: rldicl 3, 3, 16, 4837; CHECK-NEXT: std 4, 48(1)38; CHECK-NEXT: blr39entry:40 %0 = load i16, ptr %s, align 841 %conv = zext i16 %0 to i3242 ret i32 %conv43}44 45; Function Attrs: nounwind46define signext i32 @stc1(ptr noundef byval(%struct.SST) align 8 %s) {47; CHECK-LABEL: stc1:48; CHECK: # %bb.0: # %entry49; CHECK-NEXT: mr 4, 350; CHECK-NEXT: rldicl 3, 3, 16, 4851; CHECK-NEXT: std 4, 48(1)52; CHECK-NEXT: extsh 3, 353; CHECK-NEXT: srawi 3, 3, 854; CHECK-NEXT: blr55entry:56 %0 = load i16, ptr %s, align 857 %conv = sext i16 %0 to i3258 %shr = ashr i32 %conv, 859 ret i32 %shr60}61 62; Function Attrs: nounwind63define signext i32 @stc2(ptr noundef byval(%struct.SST) align 8 %s) {64; CHECK-LABEL: stc2:65; CHECK: # %bb.0: # %entry66; CHECK-NEXT: mr 4, 367; CHECK-NEXT: sradi 3, 3, 4868; CHECK-NEXT: std 4, 48(1)69; CHECK-NEXT: blr70entry:71 %0 = load i16, ptr %s, align 872 %conv = sext i16 %0 to i3273 ret i32 %conv74}75 76; Function Attrs: nounwind77define signext i32 @ctc(ptr noundef byval(%struct.CST) align 8 %s) {78; CHECK-LABEL: ctc:79; CHECK: # %bb.0: # %entry80; CHECK-NEXT: mr 4, 381; CHECK-NEXT: rldicl 3, 3, 8, 5682; CHECK-NEXT: std 4, 48(1)83; CHECK-NEXT: blr84entry:85 %0 = load i8, ptr %s, align 886 %conv = zext i8 %0 to i3287 ret i32 %conv88}89 90; Function Attrs: nounwind91define signext i32 @sctc(ptr noundef byval(%struct.SCST) align 8 %s) {92; CHECK-LABEL: sctc:93; CHECK: # %bb.0: # %entry94; CHECK-NEXT: mr 4, 395; CHECK-NEXT: sradi 3, 3, 5696; CHECK-NEXT: std 4, 48(1)97; CHECK-NEXT: blr98entry:99 %0 = load i8, ptr %s, align 8100 %conv = sext i8 %0 to i32101 ret i32 %conv102}103 104; Function Attrs: nounwind105define signext i32 @tc44(ptr noundef byval(%struct.ST) align 8 %s) {106; CHECK-LABEL: tc44:107; CHECK: # %bb.0: # %entry108; CHECK-NEXT: mr 4, 3109; CHECK-NEXT: sradi 3, 3, 32110; CHECK-NEXT: std 4, 48(1)111; CHECK-NEXT: blr112entry:113 %0 = load i32, ptr %s, align 8114 ret i32 %0115}116 117; Function Attrs: nounwind118define signext i32 @tc41(ptr noundef byval(%struct.ST) align 8 %s) {119; CHECK-LABEL: tc41:120; CHECK: # %bb.0: # %entry121; CHECK-NEXT: mr 4, 3122; CHECK-NEXT: sradi 3, 3, 56123; CHECK-NEXT: std 4, 48(1)124; CHECK-NEXT: blr125entry:126 %0 = load i32, ptr %s, align 8127 %shr = ashr i32 %0, 24128 ret i32 %shr129}130 131; Function Attrs: nounwind132define signext i32 @tc42(ptr noundef byval(%struct.ST) align 8 %s) {133; CHECK-LABEL: tc42:134; CHECK: # %bb.0: # %entry135; CHECK-NEXT: mr 4, 3136; CHECK-NEXT: sradi 3, 3, 48137; CHECK-NEXT: std 4, 48(1)138; CHECK-NEXT: blr139entry:140 %0 = load i32, ptr %s, align 8141 %shr = ashr i32 %0, 16142 ret i32 %shr143}144 145; Function Attrs: nounwind146define signext i32 @tc43(ptr noundef byval(%struct.ST) align 8 %s) {147; CHECK-LABEL: tc43:148; CHECK: # %bb.0: # %entry149; CHECK-NEXT: mr 4, 3150; CHECK-NEXT: sradi 3, 3, 40151; CHECK-NEXT: std 4, 48(1)152; CHECK-NEXT: blr153entry:154 %0 = load i32, ptr %s, align 8155 %shr = ashr i32 %0, 8156 ret i32 %shr157}158 159; Function Attrs: nounwind160define zeroext i32 @utc44(ptr noundef byval(%struct.UST) align 8 %s) #0 {161; CHECK-LABEL: utc44:162; CHECK: # %bb.0: # %entry163; CHECK-NEXT: mr 4, 3164; CHECK-NEXT: rldicl 3, 3, 32, 32165; CHECK-NEXT: std 4, 48(1)166; CHECK-NEXT: blr167entry:168 %0 = load i32, ptr %s, align 8169 ret i32 %0170}171 172; Function Attrs: nounwind173define zeroext i32 @utc41(ptr noundef byval(%struct.UST) align 8 %s) {174; CHECK-LABEL: utc41:175; CHECK: # %bb.0: # %entry176; CHECK-NEXT: mr 4, 3177; CHECK-NEXT: rldicl 3, 3, 8, 56178; CHECK-NEXT: std 4, 48(1)179; CHECK-NEXT: blr180entry:181 %0 = load i32, ptr %s, align 8182 %shr = lshr i32 %0, 24183 ret i32 %shr184}185 186; Function Attrs: nounwind187define zeroext i32 @utc42(ptr noundef byval(%struct.UST) align 8 %s) {188; CHECK-LABEL: utc42:189; CHECK: # %bb.0: # %entry190; CHECK-NEXT: mr 4, 3191; CHECK-NEXT: rldicl 3, 3, 16, 48192; CHECK-NEXT: std 4, 48(1)193; CHECK-NEXT: blr194entry:195 %0 = load i32, ptr %s, align 8196 %shr = lshr i32 %0, 16197 ret i32 %shr198}199 200; Function Attrs: nounwind201define zeroext i32 @utc43(ptr noundef byval(%struct.UST) align 8 %s) {202; CHECK-LABEL: utc43:203; CHECK: # %bb.0: # %entry204; CHECK-NEXT: mr 4, 3205; CHECK-NEXT: rldicl 3, 3, 24, 40206; CHECK-NEXT: std 4, 48(1)207; CHECK-NEXT: blr208entry:209 %0 = load i32, ptr %s, align 8210 %shr = lshr i32 %0, 8211 ret i32 %shr212}213 214; Function Attrs: nounwind215define i64 @ltc88(ptr noundef byval(%struct.LST) align 8 %s) {216; CHECK-LABEL: ltc88:217; CHECK: # %bb.0: # %entry218; CHECK-NEXT: mr 5, 3219; CHECK-NEXT: sradi 3, 3, 8220; CHECK-NEXT: std 5, 48(1)221; CHECK-NEXT: std 4, 56(1)222; CHECK-NEXT: blr223entry:224 %0 = load i64, ptr %s, align 8225 %shr = ashr i64 %0, 8226 ret i64 %shr227}228 229; Function Attrs: nounwind230define i64 @ltc86(ptr noundef byval(%struct.LST) align 8 %s) {231; CHECK-LABEL: ltc86:232; CHECK: # %bb.0: # %entry233; CHECK-NEXT: mr 5, 3234; CHECK-NEXT: sradi 3, 3, 16235; CHECK-NEXT: std 5, 48(1)236; CHECK-NEXT: std 4, 56(1)237; CHECK-NEXT: blr238entry:239 %0 = load i64, ptr %s, align 8240 %shr = ashr i64 %0, 16241 ret i64 %shr242}243 244; Function Attrs: nounwind245define i64 @ltc85(ptr noundef byval(%struct.LST) align 8 %s) {246; CHECK-LABEL: ltc85:247; CHECK: # %bb.0: # %entry248; CHECK-NEXT: mr 5, 3249; CHECK-NEXT: sradi 3, 3, 24250; CHECK-NEXT: std 5, 48(1)251; CHECK-NEXT: std 4, 56(1)252; CHECK-NEXT: blr253entry:254 %0 = load i64, ptr %s, align 8255 %shr = ashr i64 %0, 24256 ret i64 %shr257}258 259; Function Attrs: nounwind260define i64 @ltc84(ptr noundef byval(%struct.LST) align 8 %s) {261; CHECK-LABEL: ltc84:262; CHECK: # %bb.0: # %entry263; CHECK-NEXT: mr 5, 3264; CHECK-NEXT: sradi 3, 3, 32265; CHECK-NEXT: std 5, 48(1)266; CHECK-NEXT: std 4, 56(1)267; CHECK-NEXT: blr268entry:269 %0 = load i64, ptr %s, align 8270 %shr = ashr i64 %0, 32271 ret i64 %shr272}273 274; Function Attrs: nounwind275define i64 @ltc83(ptr noundef byval(%struct.LST) align 8 %s) {276; CHECK-LABEL: ltc83:277; CHECK: # %bb.0: # %entry278; CHECK-NEXT: mr 5, 3279; CHECK-NEXT: sradi 3, 3, 40280; CHECK-NEXT: std 5, 48(1)281; CHECK-NEXT: std 4, 56(1)282; CHECK-NEXT: blr283entry:284 %0 = load i64, ptr %s, align 8285 %shr = ashr i64 %0, 40286 ret i64 %shr287}288 289; Function Attrs: nounwind290define i64 @ltc82(ptr noundef byval(%struct.LST) align 8 %s) {291; CHECK-LABEL: ltc82:292; CHECK: # %bb.0: # %entry293; CHECK-NEXT: mr 5, 3294; CHECK-NEXT: sradi 3, 3, 48295; CHECK-NEXT: std 5, 48(1)296; CHECK-NEXT: std 4, 56(1)297; CHECK-NEXT: blr298entry:299 %0 = load i64, ptr %s, align 8300 %shr = ashr i64 %0, 48301 ret i64 %shr302}303 304; Function Attrs: nounwind305define i64 @ltc81(ptr noundef byval(%struct.LST) align 8 %s) {306; CHECK-LABEL: ltc81:307; CHECK: # %bb.0: # %entry308; CHECK-NEXT: mr 5, 3309; CHECK-NEXT: sradi 3, 3, 56310; CHECK-NEXT: std 5, 48(1)311; CHECK-NEXT: std 4, 56(1)312; CHECK-NEXT: blr313entry:314 %0 = load i64, ptr %s, align 8315 %shr = ashr i64 %0, 56316 ret i64 %shr317}318 319; Function Attrs: nounwind320define i64 @ultc88(ptr noundef byval(%struct.ULST) align 8 %s) {321; CHECK-LABEL: ultc88:322; CHECK: # %bb.0: # %entry323; CHECK-NEXT: std 3, 48(1)324; CHECK-NEXT: std 4, 56(1)325; CHECK-NEXT: blr326entry:327 %0 = load i64, ptr %s, align 8328 ret i64 %0329}330 331; Function Attrs: nounwind332define i64 @ultc87(ptr noundef byval(%struct.ULST) align 8 %s) {333; CHECK-LABEL: ultc87:334; CHECK: # %bb.0: # %entry335; CHECK-NEXT: mr 5, 3336; CHECK-NEXT: rldicl 3, 3, 56, 8337; CHECK-NEXT: std 5, 48(1)338; CHECK-NEXT: std 4, 56(1)339; CHECK-NEXT: blr340entry:341 %0 = load i64, ptr %s, align 8342 %shr = lshr i64 %0, 8343 ret i64 %shr344}345 346; Function Attrs: nounwind347define i64 @ultc86(ptr noundef byval(%struct.ULST) align 8 %s) {348; CHECK-LABEL: ultc86:349; CHECK: # %bb.0: # %entry350; CHECK-NEXT: mr 5, 3351; CHECK-NEXT: rldicl 3, 3, 48, 16352; CHECK-NEXT: std 5, 48(1)353; CHECK-NEXT: std 4, 56(1)354; CHECK-NEXT: blr355entry:356 %0 = load i64, ptr %s, align 8357 %shr = lshr i64 %0, 16358 ret i64 %shr359}360 361; Function Attrs: nounwind362define i64 @ultc85(ptr noundef byval(%struct.ULST) align 8 %s) {363; CHECK-LABEL: ultc85:364; CHECK: # %bb.0: # %entry365; CHECK-NEXT: mr 5, 3366; CHECK-NEXT: rldicl 3, 3, 40, 24367; CHECK-NEXT: std 5, 48(1)368; CHECK-NEXT: std 4, 56(1)369; CHECK-NEXT: blr370entry:371 %0 = load i64, ptr %s, align 8372 %shr = lshr i64 %0, 24373 ret i64 %shr374}375 376; Function Attrs: nounwind377define i64 @ultc84(ptr noundef byval(%struct.ULST) align 8 %s) {378; CHECK-LABEL: ultc84:379; CHECK: # %bb.0: # %entry380; CHECK-NEXT: mr 5, 3381; CHECK-NEXT: rldicl 3, 3, 32, 32382; CHECK-NEXT: std 5, 48(1)383; CHECK-NEXT: std 4, 56(1)384; CHECK-NEXT: blr385entry:386 %0 = load i64, ptr %s, align 8387 %shr = lshr i64 %0, 32388 ret i64 %shr389}390 391; Function Attrs: nounwind392define i64 @ultc83(ptr noundef byval(%struct.ULST) align 8 %s) {393; CHECK-LABEL: ultc83:394; CHECK: # %bb.0: # %entry395; CHECK-NEXT: mr 5, 3396; CHECK-NEXT: rldicl 3, 3, 24, 40397; CHECK-NEXT: std 5, 48(1)398; CHECK-NEXT: std 4, 56(1)399; CHECK-NEXT: blr400entry:401 %0 = load i64, ptr %s, align 8402 %shr = lshr i64 %0, 40403 ret i64 %shr404}405 406; Function Attrs: nounwind407define i64 @ultc82(ptr noundef byval(%struct.ULST) align 8 %s) {408; CHECK-LABEL: ultc82:409; CHECK: # %bb.0: # %entry410; CHECK-NEXT: mr 5, 3411; CHECK-NEXT: rldicl 3, 3, 16, 48412; CHECK-NEXT: std 5, 48(1)413; CHECK-NEXT: std 4, 56(1)414; CHECK-NEXT: blr415entry:416 %0 = load i64, ptr %s, align 8417 %shr = lshr i64 %0, 48418 ret i64 %shr419}420 421; Function Attrs: nounwind422define i64 @ultc81(ptr noundef byval(%struct.ULST) align 8 %s) {423; CHECK-LABEL: ultc81:424; CHECK: # %bb.0: # %entry425; CHECK-NEXT: mr 5, 3426; CHECK-NEXT: rldicl 3, 3, 8, 56427; CHECK-NEXT: std 5, 48(1)428; CHECK-NEXT: std 4, 56(1)429; CHECK-NEXT: blr430entry:431 %0 = load i64, ptr %s, align 8432 %shr = lshr i64 %0, 56433 ret i64 %shr434}435