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1; RUN: llc -verify-machineinstrs -mcpu=ppc64 -O0 -frame-pointer=all -fast-isel=false < %s | FileCheck %s2 3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"4target triple = "powerpc64-unknown-linux-gnu"5 6%struct.s1 = type { i8 }7%struct.s2 = type { i16 }8%struct.s4 = type { i32 }9%struct.t1 = type { i8 }10%struct.t3 = type <{ i16, i8 }>11%struct.t5 = type <{ i32, i8 }>12%struct.t6 = type <{ i32, i16 }>13%struct.t7 = type <{ i32, i16, i8 }>14%struct.s3 = type { i16, i8 }15%struct.s5 = type { i32, i8 }16%struct.s6 = type { i32, i16 }17%struct.s7 = type { i32, i16, i8 }18%struct.t2 = type <{ i16 }>19%struct.t4 = type <{ i32 }>20 21@caller1.p1 = private unnamed_addr constant %struct.s1 { i8 1 }, align 122@caller1.p2 = private unnamed_addr constant %struct.s2 { i16 2 }, align 223@caller1.p3 = private unnamed_addr constant { i16, i8, i8 } { i16 4, i8 8, i8 undef }, align 224@caller1.p4 = private unnamed_addr constant %struct.s4 { i32 16 }, align 425@caller1.p5 = private unnamed_addr constant { i32, i8, [3 x i8] } { i32 32, i8 64, [3 x i8] undef }, align 426@caller1.p6 = private unnamed_addr constant { i32, i16, [2 x i8] } { i32 128, i16 256, [2 x i8] undef }, align 427@caller1.p7 = private unnamed_addr constant { i32, i16, i8, i8 } { i32 512, i16 1024, i8 -3, i8 undef }, align 428@caller2.p1 = private unnamed_addr constant %struct.t1 { i8 1 }, align 129@caller2.p2 = private unnamed_addr constant { i16 } { i16 2 }, align 130@caller2.p3 = private unnamed_addr constant %struct.t3 <{ i16 4, i8 8 }>, align 131@caller2.p4 = private unnamed_addr constant { i32 } { i32 16 }, align 132@caller2.p5 = private unnamed_addr constant %struct.t5 <{ i32 32, i8 64 }>, align 133@caller2.p6 = private unnamed_addr constant %struct.t6 <{ i32 128, i16 256 }>, align 134@caller2.p7 = private unnamed_addr constant %struct.t7 <{ i32 512, i16 1024, i8 -3 }>, align 135 36define i32 @caller1() nounwind {37entry:38 %p1 = alloca %struct.s139 %p2 = alloca %struct.s240 %p3 = alloca %struct.s341 %p4 = alloca %struct.s442 %p5 = alloca %struct.s543 %p6 = alloca %struct.s644 %p7 = alloca %struct.s745 call void @llvm.memcpy.p0.p0.i64(ptr %p1, ptr @caller1.p1, i64 1, i1 false)46 call void @llvm.memcpy.p0.p0.i64(ptr align 2 %p2, ptr align 2 @caller1.p2, i64 2, i1 false)47 call void @llvm.memcpy.p0.p0.i64(ptr align 2 %p3, ptr align 2 @caller1.p3, i64 4, i1 false)48 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p4, ptr align 4 @caller1.p4, i64 4, i1 false)49 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p5, ptr align 4 @caller1.p5, i64 8, i1 false)50 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p6, ptr align 4 @caller1.p6, i64 8, i1 false)51 call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p7, ptr align 4 @caller1.p7, i64 8, i1 false)52 %call = call i32 @callee1(ptr byval(%struct.s1) %p1, ptr byval(%struct.s2) %p2, ptr byval(%struct.s3) %p3, ptr byval(%struct.s4) %p4, ptr byval(%struct.s5) %p5, ptr byval(%struct.s6) %p6, ptr byval(%struct.s7) %p7)53 ret i32 %call54 55; CHECK-LABEL: caller156; CHECK: ld 9, 112(31)57; CHECK: ld 8, 120(31)58; CHECK: ld 7, 128(31)59; CHECK: lwz 6, 136(31)60; CHECK: lwz 5, 144(31)61; CHECK: lhz 4, 152(31)62; CHECK: lbz 3, 160(31)63}64 65declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind66 67define internal i32 @callee1(ptr byval(%struct.s1) %v1, ptr byval(%struct.s2) %v2, ptr byval(%struct.s3) %v3, ptr byval(%struct.s4) %v4, ptr byval(%struct.s5) %v5, ptr byval(%struct.s6) %v6, ptr byval(%struct.s7) %v7) nounwind {68entry:69 %0 = load i8, ptr %v1, align 170 %conv = zext i8 %0 to i3271 %1 = load i16, ptr %v2, align 272 %conv2 = sext i16 %1 to i3273 %add = add nsw i32 %conv, %conv274 %2 = load i16, ptr %v3, align 275 %conv4 = sext i16 %2 to i3276 %add5 = add nsw i32 %add, %conv477 %3 = load i32, ptr %v4, align 478 %add7 = add nsw i32 %add5, %379 %4 = load i32, ptr %v5, align 480 %add9 = add nsw i32 %add7, %481 %5 = load i32, ptr %v6, align 482 %add11 = add nsw i32 %add9, %583 %6 = load i32, ptr %v7, align 484 %add13 = add nsw i32 %add11, %685 ret i32 %add1386 87; CHECK-LABEL: callee188; CHECK-DAG: std 9, 96(1)89; CHECK-DAG: std 8, 88(1)90; CHECK-DAG: std 7, 80(1)91; CHECK-DAG: stw 6, 76(1)92; CHECK-DAG: stw 5, 68(1)93; CHECK-DAG: sth 4, 62(1)94; CHECK-DAG: stb 3, 55(1)95; CHECK-DAG: lha {{[0-9]+}}, 62(1)96; CHECK-DAG: lha {{[0-9]+}}, 68(1)97; CHECK-DAG: lbz {{[0-9]+}}, 55(1)98; CHECK-DAG: lwz {{[0-9]+}}, 76(1)99; CHECK-DAG: lwz {{[0-9]+}}, 80(1)100; CHECK-DAG: lwz {{[0-9]+}}, 88(1)101; CHECK-DAG: lwz {{[0-9]+}}, 96(1)102}103 104define i32 @caller2() nounwind {105entry:106 %p1 = alloca %struct.t1107 %p2 = alloca %struct.t2108 %p3 = alloca %struct.t3109 %p4 = alloca %struct.t4110 %p5 = alloca %struct.t5111 %p6 = alloca %struct.t6112 %p7 = alloca %struct.t7113 call void @llvm.memcpy.p0.p0.i64(ptr %p1, ptr @caller2.p1, i64 1, i1 false)114 call void @llvm.memcpy.p0.p0.i64(ptr %p2, ptr @caller2.p2, i64 2, i1 false)115 call void @llvm.memcpy.p0.p0.i64(ptr %p3, ptr @caller2.p3, i64 3, i1 false)116 call void @llvm.memcpy.p0.p0.i64(ptr %p4, ptr @caller2.p4, i64 4, i1 false)117 call void @llvm.memcpy.p0.p0.i64(ptr %p5, ptr @caller2.p5, i64 5, i1 false)118 call void @llvm.memcpy.p0.p0.i64(ptr %p6, ptr @caller2.p6, i64 6, i1 false)119 call void @llvm.memcpy.p0.p0.i64(ptr %p7, ptr @caller2.p7, i64 7, i1 false)120 %call = call i32 @callee2(ptr byval(%struct.t1) %p1, ptr byval(%struct.t2) %p2, ptr byval(%struct.t3) %p3, ptr byval(%struct.t4) %p4, ptr byval(%struct.t5) %p5, ptr byval(%struct.t6) %p6, ptr byval(%struct.t7) %p7)121 ret i32 %call122 123; CHECK-LABEL: caller2124; CHECK: stb {{[0-9]+}}, 71(1)125; CHECK: sth {{[0-9]+}}, 69(1)126; CHECK: stb {{[0-9]+}}, 87(1)127; CHECK: stw {{[0-9]+}}, 83(1)128; CHECK: sth {{[0-9]+}}, 94(1)129; CHECK: stw {{[0-9]+}}, 90(1)130; CHECK: stw {{[0-9]+}}, 100(1)131; CHECK: stw {{[0-9]+}}, 97(1)132; CHECK: ld 9, 96(1)133; CHECK: ld 8, 88(1)134; CHECK: ld 7, 80(1)135; CHECK: lwz 6, 136(31)136; CHECK: ld 5, 64(1)137; CHECK: lhz 4, 152(31)138; CHECK: lbz 3, 160(31)139}140 141define internal i32 @callee2(ptr byval(%struct.t1) %v1, ptr byval(%struct.t2) %v2, ptr byval(%struct.t3) %v3, ptr byval(%struct.t4) %v4, ptr byval(%struct.t5) %v5, ptr byval(%struct.t6) %v6, ptr byval(%struct.t7) %v7) nounwind {142entry:143 %0 = load i8, ptr %v1, align 1144 %conv = zext i8 %0 to i32145 %1 = load i16, ptr %v2, align 1146 %conv2 = sext i16 %1 to i32147 %add = add nsw i32 %conv, %conv2148 %2 = load i16, ptr %v3, align 1149 %conv4 = sext i16 %2 to i32150 %add5 = add nsw i32 %add, %conv4151 %3 = load i32, ptr %v4, align 1152 %add7 = add nsw i32 %add5, %3153 %4 = load i32, ptr %v5, align 1154 %add9 = add nsw i32 %add7, %4155 %5 = load i32, ptr %v6, align 1156 %add11 = add nsw i32 %add9, %5157 %6 = load i32, ptr %v7, align 1158 %add13 = add nsw i32 %add11, %6159 ret i32 %add13160 161; CHECK-LABEL: callee2162; CHECK: stb 9, 103(1)163; CHECK: rldicl 10, 9, 56, 8164; CHECK: sth 10, 101(1)165; CHECK: rldicl 9, 9, 40, 24166; CHECK: stw 9, 97(1)167; CHECK: sth 8, 94(1)168; CHECK: rldicl 8, 8, 48, 16169; CHECK: stw 8, 90(1)170; CHECK: stb 7, 87(1)171; CHECK: rldicl 7, 7, 56, 8172; CHECK: stw 7, 83(1)173; CHECK: stb 5, 71(1)174; CHECK: rldicl 5, 5, 56, 8175; CHECK: sth 5, 69(1)176; CHECK: stw 6, 76(1)177; CHECK: sth 4, 62(1)178; CHECK: stb 3, 55(1)179; CHECK-DAG: lha {{[0-9]+}}, 62(1)180; CHECK-DAG: lha {{[0-9]+}}, 69(1)181; CHECK-DAG: lbz {{[0-9]+}}, 55(1)182; CHECK-DAG: lwz {{[0-9]+}}, 76(1)183; CHECK-DAG: lwz {{[0-9]+}}, 83(1)184; CHECK-DAG: lwz {{[0-9]+}}, 90(1)185; CHECK-DAG: lwz {{[0-9]+}}, 97(1)186}187