60 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \9; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-P1011; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \12; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \13; RUN: FileCheck %s --check-prefix=CHECK-P1014; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \15; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \16; RUN: FileCheck %s --check-prefix=CHECK-P10-CMP \17; RUN: --implicit-check-not cmpld --implicit-check-not cmplw18; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \19; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr10 < %s | \20; RUN: FileCheck %s --check-prefix=CHECK-P10-CMP \21; RUN: --implicit-check-not cmpld --implicit-check-not cmplw22 23define signext i32 @test(i8 zeroext %a, i8 zeroext %b) {24; CHECK-LABEL: test:25; CHECK: # %bb.0: # %entry26; CHECK-NEXT: clrlwi r3, r3, 3127; CHECK-NEXT: clrlwi r4, r4, 3128; CHECK-NEXT: clrldi r3, r3, 3229; CHECK-NEXT: clrldi r4, r4, 3230; CHECK-NEXT: sub r3, r4, r331; CHECK-NEXT: rldicl r3, r3, 1, 6332; CHECK-NEXT: xori r3, r3, 133; CHECK-NEXT: blr34;35; CHECK-P10-LABEL: test:36; CHECK-P10: # %bb.0: # %entry37; CHECK-P10-NEXT: clrlwi r3, r3, 3138; CHECK-P10-NEXT: clrlwi r4, r4, 3139; CHECK-P10-NEXT: cmplw r3, r440; CHECK-P10-NEXT: setbcr r3, gt41; CHECK-P10-NEXT: blr42;43; CHECK-P10-CMP-LABEL: test:44; CHECK-P10-CMP: # %bb.0: # %entry45; CHECK-P10-CMP-NEXT: clrlwi r3, r3, 3146; CHECK-P10-CMP-NEXT: clrlwi r4, r4, 3147; CHECK-P10-CMP-NEXT: clrldi r3, r3, 3248; CHECK-P10-CMP-NEXT: clrldi r4, r4, 3249; CHECK-P10-CMP-NEXT: sub r3, r4, r350; CHECK-P10-CMP-NEXT: rldicl r3, r3, 1, 6351; CHECK-P10-CMP-NEXT: xori r3, r3, 152; CHECK-P10-CMP-NEXT: blr53entry:54 %0 = and i8 %a, 155 %1 = and i8 %b, 156 %cmp = icmp ule i8 %0, %157 %conv3 = zext i1 %cmp to i3258 ret i32 %conv359}60