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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8 9@glob = local_unnamed_addr global i32 0, align 410 11; Function Attrs: norecurse nounwind readnone12define signext i32 @test_igtsi(i32 signext %a, i32 signext %b) {13; CHECK-LABEL: test_igtsi:14; CHECK: # %bb.0: # %entry15; CHECK-NEXT: sub r3, r4, r316; CHECK-NEXT: rldicl r3, r3, 1, 6317; CHECK-NEXT: blr18entry:19 %cmp = icmp sgt i32 %a, %b20 %conv = zext i1 %cmp to i3221 ret i32 %conv22}23 24; Function Attrs: norecurse nounwind readnone25define signext i32 @test_igtsi_sext(i32 signext %a, i32 signext %b) {26; CHECK-LABEL: test_igtsi_sext:27; CHECK: # %bb.0: # %entry28; CHECK-NEXT: sub r3, r4, r329; CHECK-NEXT: sradi r3, r3, 6330; CHECK-NEXT: blr31entry:32 %cmp = icmp sgt i32 %a, %b33 %sub = sext i1 %cmp to i3234 ret i32 %sub35}36 37; FIXME38; Function Attrs: norecurse nounwind readnone39define signext i32 @test_igtsi_z(i32 signext %a) {40; CHECK-LABEL: test_igtsi_z:41; CHECK: # %bb.0: # %entry42; CHECK-NEXT: neg r3, r343; CHECK-NEXT: rldicl r3, r3, 1, 6344; CHECK-NEXT: blr45entry:46 %cmp = icmp sgt i32 %a, 047 %conv = zext i1 %cmp to i3248 ret i32 %conv49}50 51; Function Attrs: norecurse nounwind readnone52define signext i32 @test_igtsi_sext_z(i32 signext %a) {53; CHECK-LABEL: test_igtsi_sext_z:54; CHECK: # %bb.0: # %entry55; CHECK-NEXT: neg r3, r356; CHECK-NEXT: sradi r3, r3, 6357; CHECK-NEXT: blr58entry:59 %cmp = icmp sgt i32 %a, 060 %sub = sext i1 %cmp to i3261 ret i32 %sub62}63 64; Function Attrs: norecurse nounwind65define void @test_igtsi_store(i32 signext %a, i32 signext %b) {66; CHECK-LABEL: test_igtsi_store:67; CHECK: # %bb.0: # %entry68; CHECK-NEXT: sub r3, r4, r369; CHECK-NEXT: addis r4, r2, .LC0@toc@ha70; CHECK-NEXT: ld r4, .LC0@toc@l(r4)71; CHECK-NEXT: rldicl r3, r3, 1, 6372; CHECK-NEXT: stw r3, 0(r4)73; CHECK-NEXT: blr74entry:75 %cmp = icmp sgt i32 %a, %b76 %conv = zext i1 %cmp to i3277 store i32 %conv, ptr @glob, align 478 ret void79}80 81; Function Attrs: norecurse nounwind82define void @test_igtsi_sext_store(i32 signext %a, i32 signext %b) {83; CHECK-LABEL: test_igtsi_sext_store:84; CHECK: # %bb.0: # %entry85; CHECK-NEXT: sub r3, r4, r386; CHECK-NEXT: addis r4, r2, .LC0@toc@ha87; CHECK-NEXT: ld r4, .LC0@toc@l(r4)88; CHECK-NEXT: sradi r3, r3, 6389; CHECK-NEXT: stw r3, 0(r4)90; CHECK-NEXT: blr91entry:92 %cmp = icmp sgt i32 %a, %b93 %sub = sext i1 %cmp to i3294 store i32 %sub, ptr @glob, align 495 ret void96}97 98; FIXME99; Function Attrs: norecurse nounwind100define void @test_igtsi_z_store(i32 signext %a) {101; CHECK-LABEL: test_igtsi_z_store:102; CHECK: # %bb.0: # %entry103; CHECK-NEXT: addis r4, r2, .LC0@toc@ha104; CHECK-NEXT: neg r3, r3105; CHECK-NEXT: ld r4, .LC0@toc@l(r4)106; CHECK-NEXT: rldicl r3, r3, 1, 63107; CHECK-NEXT: stw r3, 0(r4)108; CHECK-NEXT: blr109entry:110 %cmp = icmp sgt i32 %a, 0111 %conv = zext i1 %cmp to i32112 store i32 %conv, ptr @glob, align 4113 ret void114}115 116; Function Attrs: norecurse nounwind117define void @test_igtsi_sext_z_store(i32 signext %a) {118; CHECK-LABEL: test_igtsi_sext_z_store:119; CHECK: # %bb.0: # %entry120; CHECK-NEXT: addis r4, r2, .LC0@toc@ha121; CHECK-NEXT: neg r3, r3122; CHECK-NEXT: ld r4, .LC0@toc@l(r4)123; CHECK-NEXT: sradi r3, r3, 63124; CHECK-NEXT: stw r3, 0(r4)125; CHECK-NEXT: blr126entry:127 %cmp = icmp sgt i32 %a, 0128 %sub = sext i1 %cmp to i32129 store i32 %sub, ptr @glob, align 4130 ret void131}132