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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8@glob = dso_local local_unnamed_addr global i16 0, align 29 10define dso_local signext i32 @test_iless(i16 signext %a, i16 signext %b) {11; CHECK-LABEL: test_iless:12; CHECK: # %bb.0: # %entry13; CHECK-NEXT: sub r3, r4, r314; CHECK-NEXT: rldicl r3, r3, 1, 6315; CHECK-NEXT: xori r3, r3, 116; CHECK-NEXT: blr17; CHECK-BE-LABEL: test_iless:18; CHECK-BE: # %bb.0: # %entry19; CHECK-BE-NEXT: sub r3, r4, r320; CHECK-BE-NEXT: rldicl r3, r3, 1, 6321; CHECK-BE-NEXT: xori r3, r3, 122; CHECK-BE-NEXT: blr23;24; CHECK-LE-LABEL: test_iless:25; CHECK-LE: # %bb.0: # %entry26; CHECK-LE-NEXT: sub r3, r4, r327; CHECK-LE-NEXT: rldicl r3, r3, 1, 6328; CHECK-LE-NEXT: xori r3, r3, 129; CHECK-LE-NEXT: blr30entry:31 %cmp = icmp sle i16 %a, %b32 %conv2 = zext i1 %cmp to i3233 ret i32 %conv234}35 36define dso_local signext i32 @test_iless_sext(i16 signext %a, i16 signext %b) {37; CHECK-LABEL: test_iless_sext:38; CHECK: # %bb.0: # %entry39; CHECK-NEXT: sub r3, r4, r340; CHECK-NEXT: rldicl r3, r3, 1, 6341; CHECK-NEXT: addi r3, r3, -142; CHECK-NEXT: blr43; CHECK-BE-LABEL: test_iless_sext:44; CHECK-BE: # %bb.0: # %entry45; CHECK-BE-NEXT: sub r3, r4, r346; CHECK-BE-NEXT: rldicl r3, r3, 1, 6347; CHECK-BE-NEXT: addi r3, r3, -148; CHECK-BE-NEXT: blr49;50; CHECK-LE-LABEL: test_iless_sext:51; CHECK-LE: # %bb.0: # %entry52; CHECK-LE-NEXT: sub r3, r4, r353; CHECK-LE-NEXT: rldicl r3, r3, 1, 6354; CHECK-LE-NEXT: addi r3, r3, -155; CHECK-LE-NEXT: blr56entry:57 %cmp = icmp sle i16 %a, %b58 %sub = sext i1 %cmp to i3259 ret i32 %sub60}61 62define dso_local void @test_iless_store(i16 signext %a, i16 signext %b) {63; CHECK-LABEL: test_iless_store:64; CHECK: # %bb.0: # %entry65; CHECK-NEXT: sub r3, r4, r366; CHECK-NEXT: addis r5, r2, glob@toc@ha67; CHECK-NEXT: rldicl r3, r3, 1, 6368; CHECK-NEXT: xori r3, r3, 169; CHECK-NEXT: sth r3, glob@toc@l(r5)70; CHECK-NEXT: blr71; CHECK-BE-LABEL: test_iless_store:72; CHECK-BE: # %bb.0: # %entry73; CHECK-BE-NEXT: sub r3, r4, r374; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha75; CHECK-BE-NEXT: rldicl r3, r3, 1, 6376; CHECK-BE-NEXT: xori r3, r3, 177; CHECK-BE-NEXT: sth r3, glob@toc@l(r4)78; CHECK-BE-NEXT: blr79;80; CHECK-LE-LABEL: test_iless_store:81; CHECK-LE: # %bb.0: # %entry82; CHECK-LE-NEXT: sub r3, r4, r383; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha84; CHECK-LE-NEXT: rldicl r3, r3, 1, 6385; CHECK-LE-NEXT: xori r3, r3, 186; CHECK-LE-NEXT: sth r3, glob@toc@l(r4)87; CHECK-LE-NEXT: blr88entry:89 %cmp = icmp sle i16 %a, %b90 %conv3 = zext i1 %cmp to i1691 store i16 %conv3, ptr @glob, align 292 ret void93}94 95define dso_local void @test_iless_sext_store(i16 signext %a, i16 signext %b) {96; CHECK-LABEL: test_iless_sext_store:97; CHECK: # %bb.0: # %entry98; CHECK-NEXT: sub r3, r4, r399; CHECK-NEXT: addis r5, r2, glob@toc@ha100; CHECK-NEXT: rldicl r3, r3, 1, 63101; CHECK-NEXT: addi r3, r3, -1102; CHECK-NEXT: sth r3, glob@toc@l(r5)103; CHECK-NEXT: blr104; CHECK-BE-LABEL: test_iless_sext_store:105; CHECK-BE: # %bb.0: # %entry106; CHECK-BE-NEXT: sub r3, r4, r3107; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha108; CHECK-BE-NEXT: rldicl r3, r3, 1, 63109; CHECK-BE-NEXT: addi r3, r3, -1110; CHECK-BE-NEXT: sth r3, glob@toc@l(r4)111; CHECK-BE-NEXT: blr112;113; CHECK-LE-LABEL: test_iless_sext_store:114; CHECK-LE: # %bb.0: # %entry115; CHECK-LE-NEXT: sub r3, r4, r3116; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha117; CHECK-LE-NEXT: rldicl r3, r3, 1, 63118; CHECK-LE-NEXT: addi r3, r3, -1119; CHECK-LE-NEXT: sth r3, glob@toc@l(r4)120; CHECK-LE-NEXT: blr121entry:122 %cmp = icmp sle i16 %a, %b123 %conv3 = sext i1 %cmp to i16124 store i16 %conv3, ptr @glob, align 2125 ret void126}127