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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8 9@glob = local_unnamed_addr global i64 0, align 810 11; Function Attrs: norecurse nounwind readnone12define i64 @test_llgtsll(i64 %a, i64 %b) {13; CHECK-LABEL: test_llgtsll:14; CHECK: # %bb.0: # %entry15; CHECK-NEXT: sradi r5, r4, 6316; CHECK-NEXT: rldicl r6, r3, 1, 6317; CHECK-NEXT: subc r3, r4, r318; CHECK-NEXT: adde r3, r6, r519; CHECK-NEXT: xori r3, r3, 120; CHECK-NEXT: blr21entry:22 %cmp = icmp sgt i64 %a, %b23 %conv1 = zext i1 %cmp to i6424 ret i64 %conv125}26 27; Function Attrs: norecurse nounwind readnone28define i64 @test_llgtsll_sext(i64 %a, i64 %b) {29; CHECK-LABEL: test_llgtsll_sext:30; CHECK: # %bb.0: # %entry31; CHECK-NEXT: sradi r5, r4, 6332; CHECK-NEXT: rldicl r6, r3, 1, 6333; CHECK-NEXT: subc r3, r4, r334; CHECK-NEXT: adde r3, r6, r535; CHECK-NEXT: xori r3, r3, 136; CHECK-NEXT: neg r3, r337; CHECK-NEXT: blr38entry:39 %cmp = icmp sgt i64 %a, %b40 %conv1 = sext i1 %cmp to i6441 ret i64 %conv142}43 44; FIXME45; Function Attrs: norecurse nounwind readnone46define i64 @test_llgtsll_z(i64 %a) {47; CHECK-LABEL: test_llgtsll_z:48; CHECK: # %bb.0: # %entry49; CHECK-NEXT: addi r4, r3, -150; CHECK-NEXT: nor r3, r4, r351; CHECK-NEXT: rldicl r3, r3, 1, 6352; CHECK-NEXT: blr53entry:54 %cmp = icmp sgt i64 %a, 055 %conv1 = zext i1 %cmp to i6456 ret i64 %conv157}58 59; Function Attrs: norecurse nounwind readnone60define i64 @test_llgtsll_sext_z(i64 %a) {61; CHECK-LABEL: test_llgtsll_sext_z:62; CHECK: # %bb.0: # %entry63; CHECK-NEXT: addi r4, r3, -164; CHECK-NEXT: nor r3, r4, r365; CHECK-NEXT: sradi r3, r3, 6366; CHECK-NEXT: blr67entry:68 %cmp = icmp sgt i64 %a, 069 %conv1 = sext i1 %cmp to i6470 ret i64 %conv171}72 73; Function Attrs: norecurse nounwind74define void @test_llgtsll_store(i64 %a, i64 %b) {75; CHECK-LABEL: test_llgtsll_store:76; CHECK: # %bb.0: # %entry77; CHECK-NEXT: sradi r5, r4, 6378; CHECK-NEXT: rldicl r6, r3, 1, 6379; CHECK-NEXT: subc r3, r4, r380; CHECK-NEXT: addis r4, r2, .LC0@toc@ha81; CHECK-NEXT: adde r3, r6, r582; CHECK-NEXT: ld r4, .LC0@toc@l(r4)83; CHECK-NEXT: xori r3, r3, 184; CHECK-NEXT: std r3, 0(r4)85; CHECK-NEXT: blr86entry:87 %cmp = icmp sgt i64 %a, %b88 %conv1 = zext i1 %cmp to i6489 store i64 %conv1, ptr @glob, align 890 ret void91}92 93; Function Attrs: norecurse nounwind94define void @test_llgtsll_sext_store(i64 %a, i64 %b) {95; CHECK-LABEL: test_llgtsll_sext_store:96; CHECK: # %bb.0: # %entry97; CHECK-NEXT: sradi r5, r4, 6398; CHECK-NEXT: rldicl r6, r3, 1, 6399; CHECK-NEXT: subc r3, r4, r3100; CHECK-NEXT: addis r4, r2, .LC0@toc@ha101; CHECK-NEXT: adde r3, r6, r5102; CHECK-NEXT: ld r4, .LC0@toc@l(r4)103; CHECK-NEXT: xori r3, r3, 1104; CHECK-NEXT: neg r3, r3105; CHECK-NEXT: std r3, 0(r4)106; CHECK-NEXT: blr107entry:108 %cmp = icmp sgt i64 %a, %b109 %conv1 = sext i1 %cmp to i64110 store i64 %conv1, ptr @glob, align 8111 ret void112}113 114; FIXME115; Function Attrs: norecurse nounwind116define void @test_llgtsll_z_store(i64 %a) {117; CHECK-LABEL: test_llgtsll_z_store:118; CHECK: # %bb.0: # %entry119; CHECK-NEXT: addi r4, r3, -1120; CHECK-NEXT: nor r3, r4, r3121; CHECK-NEXT: addis r4, r2, .LC0@toc@ha122; CHECK-NEXT: ld r4, .LC0@toc@l(r4)123; CHECK-NEXT: rldicl r3, r3, 1, 63124; CHECK-NEXT: std r3, 0(r4)125; CHECK-NEXT: blr126entry:127 %cmp = icmp sgt i64 %a, 0128 %conv1 = zext i1 %cmp to i64129 store i64 %conv1, ptr @glob, align 8130 ret void131}132 133; Function Attrs: norecurse nounwind134define void @test_llgtsll_sext_z_store(i64 %a) {135; CHECK-LABEL: test_llgtsll_sext_z_store:136; CHECK: # %bb.0: # %entry137; CHECK-NEXT: addi r4, r3, -1138; CHECK-NEXT: nor r3, r4, r3139; CHECK-NEXT: addis r4, r2, .LC0@toc@ha140; CHECK-NEXT: ld r4, .LC0@toc@l(r4)141; CHECK-NEXT: sradi r3, r3, 63142; CHECK-NEXT: std r3, 0(r4)143; CHECK-NEXT: blr144entry:145 %cmp = icmp sgt i64 %a, 0146 %conv1 = sext i1 %cmp to i64147 store i64 %conv1, ptr @glob, align 8148 ret void149}150