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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8 9@glob = dso_local local_unnamed_addr global i16 0, align 210 11define i64 @test_llless(i16 signext %a, i16 signext %b) {12; CHECK-LABEL: test_llless:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: sub r3, r4, r315; CHECK-NEXT: rldicl r3, r3, 1, 6316; CHECK-NEXT: xori r3, r3, 117; CHECK-NEXT: blr18; CHECK-BE-LABEL: test_llless:19; CHECK-BE: # %bb.0: # %entry20; CHECK-BE-NEXT: sub r3, r4, r321; CHECK-BE-NEXT: rldicl r3, r3, 1, 6322; CHECK-BE-NEXT: xori r3, r3, 123; CHECK-BE-NEXT: blr24;25; CHECK-LE-LABEL: test_llless:26; CHECK-LE: # %bb.0: # %entry27; CHECK-LE-NEXT: sub r3, r4, r328; CHECK-LE-NEXT: rldicl r3, r3, 1, 6329; CHECK-LE-NEXT: xori r3, r3, 130; CHECK-LE-NEXT: blr31entry:32 %cmp = icmp sle i16 %a, %b33 %conv3 = zext i1 %cmp to i6434 ret i64 %conv335}36 37define i64 @test_llless_sext(i16 signext %a, i16 signext %b) {38; CHECK-LABEL: test_llless_sext:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: sub r3, r4, r341; CHECK-NEXT: rldicl r3, r3, 1, 6342; CHECK-NEXT: addi r3, r3, -143; CHECK-NEXT: blr44; CHECK-BE-LABEL: test_llless_sext:45; CHECK-BE: # %bb.0: # %entry46; CHECK-BE-NEXT: sub r3, r4, r347; CHECK-BE-NEXT: rldicl r3, r3, 1, 6348; CHECK-BE-NEXT: addi r3, r3, -149; CHECK-BE-NEXT: blr50;51; CHECK-LE-LABEL: test_llless_sext:52; CHECK-LE: # %bb.0: # %entry53; CHECK-LE-NEXT: sub r3, r4, r354; CHECK-LE-NEXT: rldicl r3, r3, 1, 6355; CHECK-LE-NEXT: addi r3, r3, -156; CHECK-LE-NEXT: blr57entry:58 %cmp = icmp sle i16 %a, %b59 %conv3 = sext i1 %cmp to i6460 ret i64 %conv361}62 63define dso_local void @test_llless_store(i16 signext %a, i16 signext %b) {64; CHECK-LABEL: test_llless_store:65; CHECK: # %bb.0: # %entry66; CHECK-NEXT: sub r3, r4, r367; CHECK-NEXT: addis r5, r2, glob@toc@ha68; CHECK-NEXT: rldicl r3, r3, 1, 6369; CHECK-NEXT: xori r3, r3, 170; CHECK-NEXT: sth r3, glob@toc@l(r5)71; CHECK-NEXT: blr72; CHECK-BE-LABEL: test_llless_store:73; CHECK-BE: # %bb.0: # %entry74; CHECK-BE-NEXT: sub r3, r4, r375; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha76; CHECK-BE-NEXT: rldicl r3, r3, 1, 6377; CHECK-BE-NEXT: xori r3, r3, 178; CHECK-BE-NEXT: sth r3, glob@toc@l(r4)79; CHECK-BE-NEXT: blr80;81; CHECK-LE-LABEL: test_llless_store:82; CHECK-LE: # %bb.0: # %entry83; CHECK-LE-NEXT: sub r3, r4, r384; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha85; CHECK-LE-NEXT: rldicl r3, r3, 1, 6386; CHECK-LE-NEXT: xori r3, r3, 187; CHECK-LE-NEXT: sth r3, glob@toc@l(r4)88; CHECK-LE-NEXT: blr89entry:90 %cmp = icmp sle i16 %a, %b91 %conv3 = zext i1 %cmp to i1692 store i16 %conv3, ptr @glob, align 293 ret void94}95 96define dso_local void @test_llless_sext_store(i16 signext %a, i16 signext %b) {97; CHECK-LABEL: test_llless_sext_store:98; CHECK: # %bb.0: # %entry99; CHECK-NEXT: sub r3, r4, r3100; CHECK-NEXT: addis r5, r2, glob@toc@ha101; CHECK-NEXT: rldicl r3, r3, 1, 63102; CHECK-NEXT: addi r3, r3, -1103; CHECK-NEXT: sth r3, glob@toc@l(r5)104; CHECK-NEXT: blr105; CHECK-BE-LABEL: test_llless_sext_store:106; CHECK-BE: # %bb.0: # %entry107; CHECK-BE-NEXT: sub r3, r4, r3108; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha109; CHECK-BE-NEXT: rldicl r3, r3, 1, 63110; CHECK-BE-NEXT: addi r3, r3, -1111; CHECK-BE-NEXT: sth r3, glob@toc@l(r4)112; CHECK-BE-NEXT: blr113;114; CHECK-LE-LABEL: test_llless_sext_store:115; CHECK-LE: # %bb.0: # %entry116; CHECK-LE-NEXT: sub r3, r4, r3117; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha118; CHECK-LE-NEXT: rldicl r3, r3, 1, 63119; CHECK-LE-NEXT: addi r3, r3, -1120; CHECK-LE-NEXT: sth r3, glob@toc@l(r4)121; CHECK-LE-NEXT: blr122entry:123 %cmp = icmp sle i16 %a, %b124 %conv3 = sext i1 %cmp to i16125 store i16 %conv3, ptr @glob, align 2126 ret void127}128