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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \6; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \7; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl8 9@glob = dso_local local_unnamed_addr global i64 0, align 810 11define i64 @test_llneull(i64 %a, i64 %b) {12; CHECK-LABEL: test_llneull:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: xor r3, r3, r415; CHECK-NEXT: addic r4, r3, -116; CHECK-NEXT: subfe r3, r4, r317; CHECK-NEXT: blr18; CHECK-BE-LABEL: test_llneull:19; CHECK-BE: # %bb.0: # %entry20; CHECK-BE-NEXT: xor r3, r3, r421; CHECK-BE-NEXT: addic r4, r3, -122; CHECK-BE-NEXT: subfe r3, r4, r323; CHECK-BE-NEXT: blr24;25; CHECK-LE-LABEL: test_llneull:26; CHECK-LE: # %bb.0: # %entry27; CHECK-LE-NEXT: xor r3, r3, r428; CHECK-LE-NEXT: addic r4, r3, -129; CHECK-LE-NEXT: subfe r3, r4, r330; CHECK-LE-NEXT: blr31entry:32 %cmp = icmp ne i64 %a, %b33 %conv1 = zext i1 %cmp to i6434 ret i64 %conv135}36 37define i64 @test_llneull_sext(i64 %a, i64 %b) {38; CHECK-LABEL: test_llneull_sext:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: xor r3, r3, r441; CHECK-NEXT: subfic r3, r3, 042; CHECK-NEXT: subfe r3, r3, r343; CHECK-NEXT: blr44; CHECK-BE-LABEL: test_llneull_sext:45; CHECK-BE: # %bb.0: # %entry46; CHECK-BE-NEXT: xor r3, r3, r447; CHECK-BE-NEXT: subfic r3, r3, 048; CHECK-BE-NEXT: subfe r3, r3, r349; CHECK-BE-NEXT: blr50;51; CHECK-LE-LABEL: test_llneull_sext:52; CHECK-LE: # %bb.0: # %entry53; CHECK-LE-NEXT: xor r3, r3, r454; CHECK-LE-NEXT: subfic r3, r3, 055; CHECK-LE-NEXT: subfe r3, r3, r356; CHECK-LE-NEXT: blr57entry:58 %cmp = icmp ne i64 %a, %b59 %conv1 = sext i1 %cmp to i6460 ret i64 %conv161}62 63define i64 @test_llneull_z(i64 %a) {64; CHECK-LABEL: test_llneull_z:65; CHECK: # %bb.0: # %entry66; CHECK-NEXT: addic r4, r3, -167; CHECK-NEXT: subfe r3, r4, r368; CHECK-NEXT: blr69; CHECK-BE-LABEL: test_llneull_z:70; CHECK-BE: # %bb.0: # %entry71; CHECK-BE-NEXT: addic r4, r3, -172; CHECK-BE-NEXT: subfe r3, r4, r373; CHECK-BE-NEXT: blr74;75; CHECK-LE-LABEL: test_llneull_z:76; CHECK-LE: # %bb.0: # %entry77; CHECK-LE-NEXT: addic r4, r3, -178; CHECK-LE-NEXT: subfe r3, r4, r379; CHECK-LE-NEXT: blr80entry:81 %cmp = icmp ne i64 %a, 082 %conv1 = zext i1 %cmp to i6483 ret i64 %conv184}85 86define i64 @test_llneull_sext_z(i64 %a) {87; CHECK-LABEL: test_llneull_sext_z:88; CHECK: # %bb.0: # %entry89; CHECK-NEXT: subfic r3, r3, 090; CHECK-NEXT: subfe r3, r3, r391; CHECK-NEXT: blr92; CHECK-BE-LABEL: test_llneull_sext_z:93; CHECK-BE: # %bb.0: # %entry94; CHECK-BE-NEXT: subfic r3, r3, 095; CHECK-BE-NEXT: subfe r3, r3, r396; CHECK-BE-NEXT: blr97;98; CHECK-LE-LABEL: test_llneull_sext_z:99; CHECK-LE: # %bb.0: # %entry100; CHECK-LE-NEXT: subfic r3, r3, 0101; CHECK-LE-NEXT: subfe r3, r3, r3102; CHECK-LE-NEXT: blr103entry:104 %cmp = icmp ne i64 %a, 0105 %conv1 = sext i1 %cmp to i64106 ret i64 %conv1107}108 109define dso_local void @test_llneull_store(i64 %a, i64 %b) {110; CHECK-LABEL: test_llneull_store:111; CHECK: # %bb.0: # %entry112; CHECK-NEXT: xor r3, r3, r4113; CHECK-NEXT: addis r5, r2, glob@toc@ha114; CHECK-NEXT: addic r4, r3, -1115; CHECK-NEXT: subfe r3, r4, r3116; CHECK-NEXT: std r3, glob@toc@l(r5)117; CHECK-NEXT: blr118; CHECK-BE-LABEL: test_llneull_store:119; CHECK-BE: # %bb.0: # %entry120; CHECK-BE-NEXT: xor r3, r3, r4121; CHECK-BE-NEXT: addic r4, r3, -1122; CHECK-BE-NEXT: subfe r3, r4, r3123; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha124; CHECK-BE-NEXT: std r3, glob@toc@l(r4)125; CHECK-BE-NEXT: blr126;127; CHECK-LE-LABEL: test_llneull_store:128; CHECK-LE: # %bb.0: # %entry129; CHECK-LE-NEXT: xor r3, r3, r4130; CHECK-LE-NEXT: addic r4, r3, -1131; CHECK-LE-NEXT: subfe r3, r4, r3132; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha133; CHECK-LE-NEXT: std r3, glob@toc@l(r4)134; CHECK-LE-NEXT: blr135entry:136 %cmp = icmp ne i64 %a, %b137 %conv1 = zext i1 %cmp to i64138 store i64 %conv1, ptr @glob, align 8139 ret void140}141 142define dso_local void @test_llneull_sext_store(i64 %a, i64 %b) {143; CHECK-LABEL: test_llneull_sext_store:144; CHECK: # %bb.0: # %entry145; CHECK-NEXT: xor r3, r3, r4146; CHECK-NEXT: addis r5, r2, glob@toc@ha147; CHECK-NEXT: subfic r3, r3, 0148; CHECK-NEXT: subfe r3, r3, r3149; CHECK-NEXT: std r3, glob@toc@l(r5)150; CHECK-NEXT: blr151; CHECK-BE-LABEL: test_llneull_sext_store:152; CHECK-BE: # %bb.0: # %entry153; CHECK-BE-NEXT: xor r3, r3, r4154; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha155; CHECK-BE-NEXT: subfic r3, r3, 0156; CHECK-BE-NEXT: subfe r3, r3, r3157; CHECK-BE-NEXT: std r3, glob@toc@l(r4)158; CHECK-BE-NEXT: blr159;160; CHECK-LE-LABEL: test_llneull_sext_store:161; CHECK-LE: # %bb.0: # %entry162; CHECK-LE-NEXT: xor r3, r3, r4163; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha164; CHECK-LE-NEXT: subfic r3, r3, 0165; CHECK-LE-NEXT: subfe r3, r3, r3166; CHECK-LE-NEXT: std r3, glob@toc@l(r4)167; CHECK-LE-NEXT: blr168entry:169 %cmp = icmp ne i64 %a, %b170 %conv1 = sext i1 %cmp to i64171 store i64 %conv1, ptr @glob, align 8172 ret void173}174 175define dso_local void @test_llneull_z_store(i64 %a) {176; CHECK-LABEL: test_llneull_z_store:177; CHECK: # %bb.0: # %entry178; CHECK-NEXT: addic r5, r3, -1179; CHECK-NEXT: addis r4, r2, glob@toc@ha180; CHECK-NEXT: subfe r3, r5, r3181; CHECK-NEXT: std r3, glob@toc@l(r4)182; CHECK-NEXT: blr183; CHECK-BE-LABEL: test_llneull_z_store:184; CHECK-BE: # %bb.0: # %entry185; CHECK-BE-NEXT: addic r4, r3, -1186; CHECK-BE-NEXT: subfe r3, r4, r3187; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha188; CHECK-BE-NEXT: std r3, glob@toc@l(r4)189; CHECK-BE-NEXT: blr190;191; CHECK-LE-LABEL: test_llneull_z_store:192; CHECK-LE: # %bb.0: # %entry193; CHECK-LE-NEXT: addic r4, r3, -1194; CHECK-LE-NEXT: subfe r3, r4, r3195; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha196; CHECK-LE-NEXT: std r3, glob@toc@l(r4)197; CHECK-LE-NEXT: blr198entry:199 %cmp = icmp ne i64 %a, 0200 %conv1 = zext i1 %cmp to i64201 store i64 %conv1, ptr @glob, align 8202 ret void203}204 205define dso_local void @test_llneull_sext_z_store(i64 %a) {206; CHECK-LABEL: test_llneull_sext_z_store:207; CHECK: # %bb.0: # %entry208; CHECK-NEXT: subfic r3, r3, 0209; CHECK-NEXT: addis r4, r2, glob@toc@ha210; CHECK-NEXT: subfe r3, r3, r3211; CHECK-NEXT: std r3, glob@toc@l(r4)212; CHECK-NEXT: blr213; CHECK-BE-LABEL: test_llneull_sext_z_store:214; CHECK-BE: # %bb.0: # %entry215; CHECK-BE-NEXT: subfic r3, r3, 0216; CHECK-BE-NEXT: addis r4, r2, glob@toc@ha217; CHECK-BE-NEXT: subfe r3, r3, r3218; CHECK-BE-NEXT: std r3, glob@toc@l(r4)219; CHECK-BE-NEXT: blr220;221; CHECK-LE-LABEL: test_llneull_sext_z_store:222; CHECK-LE: # %bb.0: # %entry223; CHECK-LE-NEXT: subfic r3, r3, 0224; CHECK-LE-NEXT: addis r4, r2, glob@toc@ha225; CHECK-LE-NEXT: subfe r3, r3, r3226; CHECK-LE-NEXT: std r3, glob@toc@l(r4)227; CHECK-LE-NEXT: blr228entry:229 %cmp = icmp ne i64 %a, 0230 %conv1 = sext i1 %cmp to i64231 store i64 %conv1, ptr @glob, align 8232 ret void233}234