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1; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s2target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"3target triple = "powerpc64-unknown-linux-gnu"4 5declare <4 x i32> @llvm.ppc.altivec.lvx(ptr) #16 7define <4 x i32> @test1(ptr %h) #0 {8entry:9 %h1 = getelementptr <4 x i32>, ptr %h, i64 110 %vl = call <4 x i32> @llvm.ppc.altivec.lvx(ptr %h1)11 12 %v0 = load <4 x i32>, ptr %h, align 813 14 %a = add <4 x i32> %v0, %vl15 ret <4 x i32> %a16 17; CHECK-LABEL: @test118; CHECK: li [[REG:[0-9]+]], 1619; CHECK-NOT: li {{[0-9]+}}, 1520; CHECK-DAG: lvx {{[0-9]+}}, 0, 321; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]]22; CHECK: blr23}24 25declare void @llvm.ppc.altivec.stvx(<4 x i32>, ptr) #026 27define <4 x i32> @test2(ptr %h, <4 x i32> %d) #0 {28entry:29 %h1 = getelementptr <4 x i32>, ptr %h, i64 130 call void @llvm.ppc.altivec.stvx(<4 x i32> %d, ptr %h1)31 32 %v0 = load <4 x i32>, ptr %h, align 833 34 ret <4 x i32> %v035 36; CHECK-LABEL: @test237; CHECK: li [[REG:[0-9]+]], 1638; CHECK-NOT: li {{[0-9]+}}, 1539; CHECK-DAG: lvx {{[0-9]+}}, 0, 340; CHECK-DAG: lvx {{[0-9]+}}, 3, [[REG]]41; CHECK: blr42}43 44attributes #0 = { nounwind }45attributes #1 = { nounwind readonly }46 47