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1; RUN: llc -mcpu=pwr10 -mtriple=powerpc64-ibm-aix -ppc-asm-full-reg-names \2; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s3; RUN: llc -mcpu=pwr10 -mtriple=powerpc64le-unknown-linux-gnu \4; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s5; RUN: llc -mcpu=pwr10 -mtriple=powerpc-ibm-aix -ppc-asm-full-reg-names \6; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s7 8define signext i32 @cmpgtw(<4 x i32> noundef %a, <4 x i32> noundef %b) local_unnamed_addr {9; CHECK: vcmpgtsw. v2, v2, v310; CHECK: setbc r3, 4*cr6+lt11entry:12 %0 = tail call i32 @llvm.ppc.altivec.vcmpgtsw.p(i32 2, <4 x i32> %a, <4 x i32> %b)13 ret i32 %014}15 16define signext i32 @cmpanynew(<4 x i32> noundef %a, <4 x i32> noundef %b) local_unnamed_addr {17; CHECK: vcmpequw. v2, v2, v318; CHECK: setbcr r3, 4*cr6+lt19entry:20 %0 = tail call i32 @llvm.ppc.altivec.vcmpequw.p(i32 3, <4 x i32> %a, <4 x i32> %b)21 ret i32 %022}23 24define signext i32 @cmpallneh(<8 x i16> noundef %a, <8 x i16> noundef %b) local_unnamed_addr {25; CHECK: vcmpequh. v2, v2, v326; CHECK: setbc r3, 4*cr6+eq27entry:28 %0 = tail call i32 @llvm.ppc.altivec.vcmpequh.p(i32 0, <8 x i16> %a, <8 x i16> %b)29 ret i32 %030}31 32define signext i32 @cmpeqb(<16 x i8> noundef %a, <16 x i8> noundef %b) local_unnamed_addr {33; CHECK: vcmpequb. v2, v2, v334; CHECK: setbcr r3, 4*cr6+eq35entry:36 %0 = tail call i32 @llvm.ppc.altivec.vcmpequb.p(i32 1, <16 x i8> %a, <16 x i8> %b)37 ret i32 %038}39 40declare i32 @llvm.ppc.altivec.vcmpgtsw.p(i32, <4 x i32>, <4 x i32>)41 42declare i32 @llvm.ppc.altivec.vcmpequw.p(i32, <4 x i32>, <4 x i32>)43 44declare i32 @llvm.ppc.altivec.vcmpequh.p(i32, <8 x i16>, <8 x i16>)45 46declare i32 @llvm.ppc.altivec.vcmpequb.p(i32, <16 x i8>, <16 x i8>)47