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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx < %s | FileCheck %s2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=+vsx < %s | FileCheck -check-prefix=CHECK-VSX %s3target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"4target triple = "powerpc64-unknown-linux-gnu"5 6%struct.s2 = type { i64, <4 x float> }7 8@ve = external global <4 x float>9@n = external global i6410 11; Function Attrs: nounwind12define void @test1(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, <4 x float> inreg %vs.coerce) #0 {13entry:14 store <4 x float> %vs.coerce, ptr @ve, align 1615 ret void16 17; CHECK-LABEL: @test118; CHECK: stvx 2,19; CHECK: blr20 21; CHECK-VSX-LABEL: @test122; CHECK-VSX: stxvw4x 34,23; CHECK-VSX: blr24}25 26; Function Attrs: nounwind27define void @test2(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, ptr byval(%struct.s2) nocapture readonly %vs) #0 {28entry:29 %0 = load i64, ptr %vs, align 830 store i64 %0, ptr @n, align 831 %v = getelementptr inbounds %struct.s2, ptr %vs, i64 0, i32 132 %1 = load <4 x float>, ptr %v, align 1633 store <4 x float> %1, ptr @ve, align 1634 ret void35 36; CHECK-LABEL: @test237; CHECK-DAG: ld {{[0-9]+}}, 112(1)38; CHECK-DAG: li [[REG16:[0-9]+]], 1639; CHECK-DAG: addi [[REGB:[0-9]+]], 1, 11240; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]41; CHECK: blr42 43; CHECK-VSX-LABEL: @test244; CHECK-VSX-DAG: ld {{[0-9]+}}, 112(1)45; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 1646; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 11247; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]48; CHECK-VSX: blr49}50 51; Function Attrs: nounwind52define void @test3(i64 %d1, i64 %d2, i64 %d3, i64 %d4, i64 %d5, i64 %d6, i64 %d7, i64 %d8, i64 %d9, ptr byval(%struct.s2) nocapture readonly %vs) #0 {53entry:54 %0 = load i64, ptr %vs, align 855 store i64 %0, ptr @n, align 856 %v = getelementptr inbounds %struct.s2, ptr %vs, i64 0, i32 157 %1 = load <4 x float>, ptr %v, align 1658 store <4 x float> %1, ptr @ve, align 1659 ret void60 61; CHECK-LABEL: @test362; CHECK-DAG: ld {{[0-9]+}}, 128(1)63; CHECK-DAG: li [[REG16:[0-9]+]], 1664; CHECK-DAG: addi [[REGB:[0-9]+]], 1, 12865; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]66; CHECK: blr67 68; CHECK-VSX-LABEL: @test369; CHECK-VSX-DAG: ld {{[0-9]+}}, 128(1)70; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 1671; CHECK-VSX-DAG: addi [[REGB:[0-9]+]], 1, 12872; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]73; CHECK-VSX: blr74}75 76attributes #0 = { nounwind }77 78