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1; RUN: llc < %s -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 \2; RUN: -verify-machineinstrs -ppc-asm-full-reg-names | FileCheck %s3 4; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -mcpu=pwr9 \5; RUN: -verify-machineinstrs -vec-extabi | \6; RUN: FileCheck %s --check-prefixes=AIX,AIX647; RUN: llc < %s -mtriple=powerpc-ibm-aix-xcoff -mcpu=pwr9 \8; RUN: -verify-machineinstrs -vec-extabi | \9; RUN: FileCheck %s --check-prefixes=AIX,AIX3210 11define dso_local void @test(ptr %Arr, i32 signext %Len) {12; CHECK-LABEL: test:13; CHECK: lxv [[REG:vs[0-9]+]], 0(r{{[0-9]+}})14; CHECK-NOT: [[REG]]15; CHECK: xxbrw vs{{[0-9]+}}, [[REG]]16 17; AIX-LABEL: test:18; AIX64: lxv [[REG64:[0-9]+]], {{[0-9]+}}({{[0-9]+}})19; AIX32: lxv [[REG32:[0-9]+]], {{[0-9]+}}({{[0-9]+}})20; AIX64-NOT: [[REG64]]21; AIX64: xxbrw {{[0-9]+}}, [[REG64]]22; AIX32: xxbrw {{[0-9]+}}, [[REG32]]23entry:24 %cmp1 = icmp slt i32 0, %Len25 br i1 %cmp1, label %for.body.lr.ph, label %for.cond.cleanup26 27for.body.lr.ph: ; preds = %entry28 %min.iters.check = icmp ult i32 %Len, 429 br i1 %min.iters.check, label %scalar.ph, label %vector.ph30 31vector.ph: ; preds = %for.body.lr.ph32 %n.mod.vf = urem i32 %Len, 433 %n.vec = sub i32 %Len, %n.mod.vf34 br label %vector.body35 36vector.body: ; preds = %vector.body, %vector.ph37 %index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]38 %broadcast.splatinsert = insertelement <4 x i32> undef, i32 %index, i32 039 %broadcast.splat = shufflevector <4 x i32> %broadcast.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer40 %induction = add <4 x i32> %broadcast.splat, <i32 0, i32 1, i32 2, i32 3>41 %0 = add i32 %index, 042 %1 = sext i32 %0 to i6443 %2 = getelementptr inbounds i32, ptr %Arr, i64 %144 %wide.load = load <4 x i32>, ptr %2, align 445 %3 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %wide.load)46 %4 = sext i32 %0 to i6447 %5 = getelementptr inbounds i32, ptr %Arr, i64 %448 store <4 x i32> %3, ptr %5, align 449 %index.next = add i32 %index, 450 %6 = icmp eq i32 %index.next, %n.vec51 br i1 %6, label %middle.block, label %vector.body52 53middle.block: ; preds = %vector.body54 %cmp.n = icmp eq i32 %Len, %n.vec55 br i1 %cmp.n, label %for.cond.for.cond.cleanup_crit_edge, label %scalar.ph56 57scalar.ph: ; preds = %middle.block, %for.body.lr.ph58 %bc.resume.val = phi i32 [ %n.vec, %middle.block ], [ 0, %for.body.lr.ph ]59 br label %for.body60 61for.cond.for.cond.cleanup_crit_edge: ; preds = %middle.block, %for.inc62 br label %for.cond.cleanup63 64for.cond.cleanup: ; preds = %for.cond.for.cond.cleanup_crit_edge, %entry65 br label %for.end66 67for.body: ; preds = %for.inc, %scalar.ph68 %i.02 = phi i32 [ %bc.resume.val, %scalar.ph ], [ %inc, %for.inc ]69 %idxprom = sext i32 %i.02 to i6470 %arrayidx = getelementptr inbounds i32, ptr %Arr, i64 %idxprom71 %7 = load i32, ptr %arrayidx, align 472 %8 = call i32 @llvm.bswap.i32(i32 %7)73 %idxprom1 = sext i32 %i.02 to i6474 %arrayidx2 = getelementptr inbounds i32, ptr %Arr, i64 %idxprom175 store i32 %8, ptr %arrayidx2, align 476 br label %for.inc77 78for.inc: ; preds = %for.body79 %inc = add nsw i32 %i.02, 180 %cmp = icmp slt i32 %inc, %Len81 br i1 %cmp, label %for.body, label %for.cond.for.cond.cleanup_crit_edge82 83for.end: ; preds = %for.cond.cleanup84 ret void85}86 87define dso_local <8 x i16> @test_halfword(<8 x i16> %a) local_unnamed_addr {88; CHECK-LABEL: test_halfword:89; CHECK: xxbrh vs34, vs3490; CHECK-NEXT: blr91 92; AIX-LABEL: test_halfword:93; AIX: xxbrh 34, 3494; AIX-NEXT: blr95entry:96 %0 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %a)97 ret <8 x i16> %098}99 100define dso_local <2 x i64> @test_doubleword(<2 x i64> %a) local_unnamed_addr {101; CHECK-LABEL: test_doubleword:102; CHECK: xxbrd vs34, vs34103; CHECK-NEXT: blr104 105; AIX-LABEL: test_doubleword:106; AIX: xxbrd 34, 34107; AIX-NEXT: blr108entry:109 %0 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %a)110 ret <2 x i64> %0111}112 113define dso_local <1 x i128> @test_quadword(<1 x i128> %a) local_unnamed_addr {114; CHECK-LABEL: test_quadword:115; CHECK: xxbrq vs34, vs34116; CHECK-NEXT: blr117 118; AIX-LABEL: test_quadword:119; AIX: xxbrq 34, 34120; AIX-NEXT: blr121entry:122 %0 = call <1 x i128> @llvm.bswap.v1i128(<1 x i128> %a)123 ret <1 x i128> %0124}125 126; Function Attrs: nounwind readnone speculatable willreturn127declare <1 x i128> @llvm.bswap.v1i128(<1 x i128>)128 129; Function Attrs: nounwind readnone speculatable willreturn130declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>)131 132; Function Attrs: nounwind readnone speculatable willreturn133declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)134 135; Function Attrs: nounwind readnone speculatable willreturn136declare i32 @llvm.bswap.i32(i32)137 138; Function Attrs: nounwind readnone speculatable willreturn139declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)140