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1; RUN: llc -verify-machineinstrs -mcpu=pwr6 -mattr=+altivec < %s | FileCheck %s2 3; Check vector comparisons using altivec. For non-native types, just basic4; comparison instruction check is done. For altivec supported type (16i8,5; 8i16, 4i32, and 4f32) all the comparisons operators (==, !=, >, >=, <, <=)6; are checked.7 8 9target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64"10target triple = "powerpc64-unknown-linux-gnu"11 12define <2 x i8> @v2si8_cmp(<2 x i8> %x, <2 x i8> %y) nounwind readnone {13 %cmp = icmp eq <2 x i8> %x, %y14 %sext = sext <2 x i1> %cmp to <2 x i8>15 ret <2 x i8> %sext16}17; CHECK-LABEL: v2si8_cmp:18; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}19 20 21define <4 x i8> @v4si8_cmp(<4 x i8> %x, <4 x i8> %y) nounwind readnone {22 %cmp = icmp eq <4 x i8> %x, %y23 %sext = sext <4 x i1> %cmp to <4 x i8>24 ret <4 x i8> %sext25}26; CHECK-LABEL: v4si8_cmp:27; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}28 29 30define <8 x i8> @v8si8_cmp(<8 x i8> %x, <8 x i8> %y) nounwind readnone {31 %cmp = icmp eq <8 x i8> %x, %y32 %sext = sext <8 x i1> %cmp to <8 x i8>33 ret <8 x i8> %sext34}35; CHECK-LABEL: v8si8_cmp:36; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}37 38 39; Additional tests for v16i8 since it is a altivec native type40 41define <16 x i8> @v16si8_cmp_eq(<16 x i8> %x, <16 x i8> %y) nounwind readnone {42 %cmp = icmp eq <16 x i8> %x, %y43 %sext = sext <16 x i1> %cmp to <16 x i8>44 ret <16 x i8> %sext45}46; CHECK-LABEL: v16si8_cmp_eq:47; CHECK: vcmpequb 2, 2, 348 49define <16 x i8> @v16si8_cmp_ne(<16 x i8> %x, <16 x i8> %y) nounwind readnone {50entry:51 %cmp = icmp ne <16 x i8> %x, %y52 %sext = sext <16 x i1> %cmp to <16 x i8>53 ret <16 x i8> %sext54}55; CHECK-LABEL: v16si8_cmp_ne:56; CHECK: vcmpequb [[RET:[0-9]+]], 2, 357; CHECK-NEXT: vnot 2, [[RET]]58 59define <16 x i8> @v16si8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {60entry:61 %cmp = icmp sle <16 x i8> %x, %y62 %sext = sext <16 x i1> %cmp to <16 x i8>63 ret <16 x i8> %sext64}65; CHECK-LABEL: v16si8_cmp_le:66; CHECK: vcmpgtsb [[RET:[0-9]+]], 2, 367; CHECK-NEXT: vnot 2, [[RET]]68 69define <16 x i8> @v16ui8_cmp_le(<16 x i8> %x, <16 x i8> %y) nounwind readnone {70entry:71 %cmp = icmp ule <16 x i8> %x, %y72 %sext = sext <16 x i1> %cmp to <16 x i8>73 ret <16 x i8> %sext74}75; CHECK-LABEL: v16ui8_cmp_le:76; CHECK: vcmpgtub [[RET:[0-9]+]], 2, 377; CHECK-NEXT: vnot 2, [[RET]]78 79define <16 x i8> @v16si8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {80entry:81 %cmp = icmp slt <16 x i8> %x, %y82 %sext = sext <16 x i1> %cmp to <16 x i8>83 ret <16 x i8> %sext84}85; CHECK-LABEL: v16si8_cmp_lt:86; CHECK: vcmpgtsb 2, 3, 287 88define <16 x i8> @v16ui8_cmp_lt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {89entry:90 %cmp = icmp ult <16 x i8> %x, %y91 %sext = sext <16 x i1> %cmp to <16 x i8>92 ret <16 x i8> %sext93}94; CHECK-LABEL: v16ui8_cmp_lt:95; CHECK: vcmpgtub 2, 3, 296 97define <16 x i8> @v16si8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {98entry:99 %cmp = icmp sgt <16 x i8> %x, %y100 %sext = sext <16 x i1> %cmp to <16 x i8>101 ret <16 x i8> %sext102}103; CHECK-LABEL: v16si8_cmp_gt:104; CHECK: vcmpgtsb 2, 2, 3105 106define <16 x i8> @v16ui8_cmp_gt(<16 x i8> %x, <16 x i8> %y) nounwind readnone {107entry:108 %cmp = icmp ugt <16 x i8> %x, %y109 %sext = sext <16 x i1> %cmp to <16 x i8>110 ret <16 x i8> %sext111}112; CHECK-LABEL: v16ui8_cmp_gt:113; CHECK: vcmpgtub 2, 2, 3114 115define <16 x i8> @v16si8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {116entry:117 %cmp = icmp sge <16 x i8> %x, %y118 %sext = sext <16 x i1> %cmp to <16 x i8>119 ret <16 x i8> %sext120}121; CHECK-LABEL: v16si8_cmp_ge:122; CHECK: vcmpgtsb [[RET:[0-9]+]], 3, 2123; CHECK-NEXT: vnot 2, [[RET]]124 125define <16 x i8> @v16ui8_cmp_ge(<16 x i8> %x, <16 x i8> %y) nounwind readnone {126entry:127 %cmp = icmp uge <16 x i8> %x, %y128 %sext = sext <16 x i1> %cmp to <16 x i8>129 ret <16 x i8> %sext130}131; CHECK-LABEL: v16ui8_cmp_ge:132; CHECK: vcmpgtub [[RET:[0-9]+]], 3, 2133; CHECK-NEXT: vnot 2, [[RET]]134 135 136define <32 x i8> @v32si8_cmp(<32 x i8> %x, <32 x i8> %y) nounwind readnone {137 %cmp = icmp eq <32 x i8> %x, %y138 %sext = sext <32 x i1> %cmp to <32 x i8>139 ret <32 x i8> %sext140}141; CHECK-LABEL: v32si8_cmp:142; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}143; CHECK: vcmpequb {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}144 145 146define <2 x i16> @v2si16_cmp(<2 x i16> %x, <2 x i16> %y) nounwind readnone {147 %cmp = icmp eq <2 x i16> %x, %y148 %sext = sext <2 x i1> %cmp to <2 x i16>149 ret <2 x i16> %sext150}151; CHECK-LABEL: v2si16_cmp:152; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}153 154 155define <4 x i16> @v4si16_cmp(<4 x i16> %x, <4 x i16> %y) nounwind readnone {156 %cmp = icmp eq <4 x i16> %x, %y157 %sext = sext <4 x i1> %cmp to <4 x i16>158 ret <4 x i16> %sext159}160; CHECK-LABEL: v4si16_cmp:161; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}162 163 164; Additional tests for v8i16 since it is an altivec native type165 166define <8 x i16> @v8si16_cmp_eq(<8 x i16> %x, <8 x i16> %y) nounwind readnone {167entry:168 %cmp = icmp eq <8 x i16> %x, %y169 %sext = sext <8 x i1> %cmp to <8 x i16>170 ret <8 x i16> %sext171}172; CHECK-LABEL: v8si16_cmp_eq:173; CHECK: vcmpequh 2, 2, 3174 175define <8 x i16> @v8si16_cmp_ne(<8 x i16> %x, <8 x i16> %y) nounwind readnone {176entry:177 %cmp = icmp ne <8 x i16> %x, %y178 %sext = sext <8 x i1> %cmp to <8 x i16>179 ret <8 x i16> %sext180}181; CHECK-LABEL: v8si16_cmp_ne:182; CHECK: vcmpequh [[RET:[0-9]+]], 2, 3183; CHECK-NEXT: vnot 2, [[RET]]184 185define <8 x i16> @v8si16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {186entry:187 %cmp = icmp sle <8 x i16> %x, %y188 %sext = sext <8 x i1> %cmp to <8 x i16>189 ret <8 x i16> %sext190}191; CHECK-LABEL: v8si16_cmp_le:192; CHECK: vcmpgtsh [[RET:[0-9]+]], 2, 3193; CHECK-NEXT: vnot 2, [[RET]]194 195define <8 x i16> @v8ui16_cmp_le(<8 x i16> %x, <8 x i16> %y) nounwind readnone {196entry:197 %cmp = icmp ule <8 x i16> %x, %y198 %sext = sext <8 x i1> %cmp to <8 x i16>199 ret <8 x i16> %sext200}201; CHECK-LABEL: v8ui16_cmp_le:202; CHECK: vcmpgtuh [[RET:[0-9]+]], 2, 3203; CHECK-NEXT: vnot 2, [[RET]]204 205define <8 x i16> @v8si16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {206entry:207 %cmp = icmp slt <8 x i16> %x, %y208 %sext = sext <8 x i1> %cmp to <8 x i16>209 ret <8 x i16> %sext210}211; CHECK-LABEL: v8si16_cmp_lt:212; CHECK: vcmpgtsh 2, 3, 2213 214define <8 x i16> @v8ui16_cmp_lt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {215entry:216 %cmp = icmp ult <8 x i16> %x, %y217 %sext = sext <8 x i1> %cmp to <8 x i16>218 ret <8 x i16> %sext219}220; CHECK-LABEL: v8ui16_cmp_lt:221; CHECK: vcmpgtuh 2, 3, 2222 223define <8 x i16> @v8si16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {224entry:225 %cmp = icmp sgt <8 x i16> %x, %y226 %sext = sext <8 x i1> %cmp to <8 x i16>227 ret <8 x i16> %sext228}229; CHECK-LABEL: v8si16_cmp_gt:230; CHECK: vcmpgtsh 2, 2, 3231 232define <8 x i16> @v8ui16_cmp_gt(<8 x i16> %x, <8 x i16> %y) nounwind readnone {233entry:234 %cmp = icmp ugt <8 x i16> %x, %y235 %sext = sext <8 x i1> %cmp to <8 x i16>236 ret <8 x i16> %sext237}238; CHECK-LABEL: v8ui16_cmp_gt:239; CHECK: vcmpgtuh 2, 2, 3240 241define <8 x i16> @v8si16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {242entry:243 %cmp = icmp sge <8 x i16> %x, %y244 %sext = sext <8 x i1> %cmp to <8 x i16>245 ret <8 x i16> %sext246}247; CHECK-LABEL: v8si16_cmp_ge:248; CHECK: vcmpgtsh [[RET:[0-9]+]], 3, 2249; CHECK-NEXT: vnot 2, [[RET]]250 251define <8 x i16> @v8ui16_cmp_ge(<8 x i16> %x, <8 x i16> %y) nounwind readnone {252entry:253 %cmp = icmp uge <8 x i16> %x, %y254 %sext = sext <8 x i1> %cmp to <8 x i16>255 ret <8 x i16> %sext256}257; CHECK-LABEL: v8ui16_cmp_ge:258; CHECK: vcmpgtuh [[RET:[0-9]+]], 3, 2259; CHECK-NEXT: vnot 2, [[RET]]260 261 262define <16 x i16> @v16si16_cmp(<16 x i16> %x, <16 x i16> %y) nounwind readnone {263 %cmp = icmp eq <16 x i16> %x, %y264 %sext = sext <16 x i1> %cmp to <16 x i16>265 ret <16 x i16> %sext266}267; CHECK-LABEL: v16si16_cmp:268; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}269; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}270 271 272define <32 x i16> @v32si16_cmp(<32 x i16> %x, <32 x i16> %y) nounwind readnone {273 %cmp = icmp eq <32 x i16> %x, %y274 %sext = sext <32 x i1> %cmp to <32 x i16>275 ret <32 x i16> %sext276}277; CHECK-LABEL: v32si16_cmp:278; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}279; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}280; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}281; CHECK: vcmpequh {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}282 283 284define <2 x i32> @v2si32_cmp(<2 x i32> %x, <2 x i32> %y) nounwind readnone {285 %cmp = icmp eq <2 x i32> %x, %y286 %sext = sext <2 x i1> %cmp to <2 x i32>287 ret <2 x i32> %sext288}289; CHECK-LABEL: v2si32_cmp:290; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}291 292 293; Additional tests for v4si32 since it is an altivec native type294 295define <4 x i32> @v4si32_cmp_eq(<4 x i32> %x, <4 x i32> %y) nounwind readnone {296entry:297 %cmp = icmp eq <4 x i32> %x, %y298 %sext = sext <4 x i1> %cmp to <4 x i32>299 ret <4 x i32> %sext300}301; CHECK-LABEL: v4si32_cmp_eq:302; CHECK: vcmpequw 2, 2, 3303 304define <4 x i32> @v4si32_cmp_ne(<4 x i32> %x, <4 x i32> %y) nounwind readnone {305entry:306 %cmp = icmp ne <4 x i32> %x, %y307 %sext = sext <4 x i1> %cmp to <4 x i32>308 ret <4 x i32> %sext309}310; CHECK-LABEL: v4si32_cmp_ne:311; CHECK: vcmpequw [[RCMP:[0-9]+]], 2, 3312; CHECK-NEXT: vnot 2, [[RCMP]]313 314define <4 x i32> @v4si32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {315entry:316 %cmp = icmp sle <4 x i32> %x, %y317 %sext = sext <4 x i1> %cmp to <4 x i32>318 ret <4 x i32> %sext319}320; CHECK-LABEL: v4si32_cmp_le:321; CHECK: vcmpgtsw [[RET:[0-9]+]], 2, 3322; CHECK-NEXT: vnot 2, [[RET]]323 324define <4 x i32> @v4ui32_cmp_le(<4 x i32> %x, <4 x i32> %y) nounwind readnone {325entry:326 %cmp = icmp ule <4 x i32> %x, %y327 %sext = sext <4 x i1> %cmp to <4 x i32>328 ret <4 x i32> %sext329}330; CHECK-LABEL: v4ui32_cmp_le:331; CHECK: vcmpgtuw [[RET:[0-9]+]], 2, 3332; CHECK-NEXT: vnot 2, [[RET]]333 334define <4 x i32> @v4si32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {335entry:336 %cmp = icmp slt <4 x i32> %x, %y337 %sext = sext <4 x i1> %cmp to <4 x i32>338 ret <4 x i32> %sext339}340; CHECK-LABEL: v4si32_cmp_lt:341; CHECK: vcmpgtsw 2, 3, 2342 343define <4 x i32> @v4ui32_cmp_lt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {344entry:345 %cmp = icmp ult <4 x i32> %x, %y346 %sext = sext <4 x i1> %cmp to <4 x i32>347 ret <4 x i32> %sext348}349; CHECK-LABEL: v4ui32_cmp_lt:350; CHECK: vcmpgtuw 2, 3, 2351 352define <4 x i32> @v4si32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {353entry:354 %cmp = icmp sgt <4 x i32> %x, %y355 %sext = sext <4 x i1> %cmp to <4 x i32>356 ret <4 x i32> %sext357}358; CHECK-LABEL: v4si32_cmp_gt:359; CHECK: vcmpgtsw 2, 2, 3360 361define <4 x i32> @v4ui32_cmp_gt(<4 x i32> %x, <4 x i32> %y) nounwind readnone {362entry:363 %cmp = icmp ugt <4 x i32> %x, %y364 %sext = sext <4 x i1> %cmp to <4 x i32>365 ret <4 x i32> %sext366}367; CHECK-LABEL: v4ui32_cmp_gt:368; CHECK: vcmpgtuw 2, 2, 3369 370define <4 x i32> @v4si32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {371entry:372 %cmp = icmp sge <4 x i32> %x, %y373 %sext = sext <4 x i1> %cmp to <4 x i32>374 ret <4 x i32> %sext375}376; CHECK-LABEL: v4si32_cmp_ge:377; CHECK: vcmpgtsw [[RET:[0-9]+]], 3, 2378; CHECK-NEXT: vnot 2, [[RET]]379 380define <4 x i32> @v4ui32_cmp_ge(<4 x i32> %x, <4 x i32> %y) nounwind readnone {381entry:382 %cmp = icmp uge <4 x i32> %x, %y383 %sext = sext <4 x i1> %cmp to <4 x i32>384 ret <4 x i32> %sext385}386; CHECK-LABEL: v4ui32_cmp_ge:387; CHECK: vcmpgtuw [[RET:[0-9]+]], 3, 2388; CHECK-NEXT: vnot 2, [[RET]]389 390 391define <8 x i32> @v8si32_cmp(<8 x i32> %x, <8 x i32> %y) nounwind readnone {392 %cmp = icmp eq <8 x i32> %x, %y393 %sext = sext <8 x i1> %cmp to <8 x i32>394 ret <8 x i32> %sext395}396; CHECK-LABEL: v8si32_cmp:397; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}398; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}399 400 401define <16 x i32> @v16si32_cmp(<16 x i32> %x, <16 x i32> %y) nounwind readnone {402 %cmp = icmp eq <16 x i32> %x, %y403 %sext = sext <16 x i1> %cmp to <16 x i32>404 ret <16 x i32> %sext405}406; CHECK-LABEL: v16si32_cmp:407; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}408; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}409; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}410; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}411 412 413define <32 x i32> @v32si32_cmp(<32 x i32> %x, <32 x i32> %y) nounwind readnone {414 %cmp = icmp eq <32 x i32> %x, %y415 %sext = sext <32 x i1> %cmp to <32 x i32>416 ret <32 x i32> %sext417}418; CHECK-LABEL: v32si32_cmp:419; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}420; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}421; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}422; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}423; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}424; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}425; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}426; CHECK: vcmpequw {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}427 428 429define <2 x float> @v2f32_cmp(<2 x float> %x, <2 x float> %y) nounwind readnone {430entry:431 %cmp = fcmp oeq <2 x float> %x, %y432 %sext = sext <2 x i1> %cmp to <2 x i32>433 %0 = bitcast <2 x i32> %sext to <2 x float>434 ret <2 x float> %0435}436; CHECK-LABEL: v2f32_cmp:437; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}438 439 440; Additional tests for v4f32 since it is a altivec native type441 442define <4 x float> @v4f32_cmp_eq(<4 x float> %x, <4 x float> %y) nounwind readnone {443entry:444 %cmp = fcmp oeq <4 x float> %x, %y445 %sext = sext <4 x i1> %cmp to <4 x i32>446 %0 = bitcast <4 x i32> %sext to <4 x float>447 ret <4 x float> %0448}449; CHECK-LABEL: v4f32_cmp_eq:450; CHECK: vcmpeqfp 2, 2, 3451 452define <4 x float> @v4f32_cmp_ne(<4 x float> %x, <4 x float> %y) nounwind readnone {453entry:454 %cmp = fcmp une <4 x float> %x, %y455 %sext = sext <4 x i1> %cmp to <4 x i32>456 %0 = bitcast <4 x i32> %sext to <4 x float>457 ret <4 x float> %0458}459; CHECK-LABEL: v4f32_cmp_ne:460; CHECK: vcmpeqfp [[RET:[0-9]+]], 2, 3461; CHECK-NEXT: vnot 2, [[RET]]462 463define <4 x float> @v4f32_cmp_le(<4 x float> %x, <4 x float> %y) nounwind readnone {464entry:465 %cmp = fcmp ole <4 x float> %x, %y466 %sext = sext <4 x i1> %cmp to <4 x i32>467 %0 = bitcast <4 x i32> %sext to <4 x float>468 ret <4 x float> %0469}470; CHECK-LABEL: v4f32_cmp_le:471; CHECK: vcmpgefp 2, 3, 2472 473define <4 x float> @v4f32_cmp_lt(<4 x float> %x, <4 x float> %y) nounwind readnone {474entry:475 %cmp = fcmp olt <4 x float> %x, %y476 %sext = sext <4 x i1> %cmp to <4 x i32>477 %0 = bitcast <4 x i32> %sext to <4 x float>478 ret <4 x float> %0479}480; CHECK-LABEL: v4f32_cmp_lt:481; CHECK: vcmpgtfp 2, 3, 2482 483define <4 x float> @v4f32_cmp_ge(<4 x float> %x, <4 x float> %y) nounwind readnone {484entry:485 %cmp = fcmp oge <4 x float> %x, %y486 %sext = sext <4 x i1> %cmp to <4 x i32>487 %0 = bitcast <4 x i32> %sext to <4 x float>488 ret <4 x float> %0489}490; CHECK-LABEL: v4f32_cmp_ge:491; CHECK: vcmpgefp 2, 2, 3492 493define <4 x float> @v4f32_cmp_gt(<4 x float> %x, <4 x float> %y) nounwind readnone {494entry:495 %cmp = fcmp ogt <4 x float> %x, %y496 %sext = sext <4 x i1> %cmp to <4 x i32>497 %0 = bitcast <4 x i32> %sext to <4 x float>498 ret <4 x float> %0499}500; CHECK-LABEL: v4f32_cmp_gt:501; CHECK: vcmpgtfp 2, 2, 3502 503define <4 x float> @v4f32_cmp_ule(<4 x float> %x, <4 x float> %y) nounwind readnone {504entry:505 %cmp = fcmp ule <4 x float> %x, %y506 %sext = sext <4 x i1> %cmp to <4 x i32>507 %0 = bitcast <4 x i32> %sext to <4 x float>508 ret <4 x float> %0509}510; CHECK-LABEL: v4f32_cmp_ule:511; CHECK: vcmpgtfp [[RET:[0-9]+]], 2, 3512; CHECK-NEXT: vnot 2, [[RET]]513 514define <4 x float> @v4f32_cmp_ult(<4 x float> %x, <4 x float> %y) nounwind readnone {515entry:516 %cmp = fcmp ult <4 x float> %x, %y517 %sext = sext <4 x i1> %cmp to <4 x i32>518 %0 = bitcast <4 x i32> %sext to <4 x float>519 ret <4 x float> %0520}521; CHECK-LABEL: v4f32_cmp_ult:522; CHECK: vcmpgefp [[RET:[0-9]+]], 2, 3523; CHECK-NEXT: vnot 2, [[RET]]524 525define <4 x float> @v4f32_cmp_uge(<4 x float> %x, <4 x float> %y) nounwind readnone {526entry:527 %cmp = fcmp uge <4 x float> %x, %y528 %sext = sext <4 x i1> %cmp to <4 x i32>529 %0 = bitcast <4 x i32> %sext to <4 x float>530 ret <4 x float> %0531}532; CHECK-LABEL: v4f32_cmp_uge:533; CHECK: vcmpgtfp [[RET:[0-9]+]], 3, 2534; CHECK-NEXT: vnot 2, [[RET]]535 536define <4 x float> @v4f32_cmp_ugt(<4 x float> %x, <4 x float> %y) nounwind readnone {537entry:538 %cmp = fcmp ugt <4 x float> %x, %y539 %sext = sext <4 x i1> %cmp to <4 x i32>540 %0 = bitcast <4 x i32> %sext to <4 x float>541 ret <4 x float> %0542}543; CHECK-LABEL: v4f32_cmp_ugt:544; CHECK: vcmpgefp [[RET:[0-9]+]], 3, 2545; CHECK-NEXT: vnot 2, [[RET]]546 547 548define <8 x float> @v8f32_cmp(<8 x float> %x, <8 x float> %y) nounwind readnone {549entry:550 %cmp = fcmp oeq <8 x float> %x, %y551 %sext = sext <8 x i1> %cmp to <8 x i32>552 %0 = bitcast <8 x i32> %sext to <8 x float>553 ret <8 x float> %0554}555; CHECK-LABEL: v8f32_cmp:556; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}557; CHECK: vcmpeqfp {{[0-9]+}}, {{[0-9]+}}, {{[0-9]+}}558