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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-P85; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-P98; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-BE11 12define i64 @test2elt(<2 x double> %a) local_unnamed_addr #0 {13; CHECK-P8-LABEL: test2elt:14; CHECK-P8: # %bb.0: # %entry15; CHECK-P8-NEXT: xxswapd vs0, v216; CHECK-P8-NEXT: xscvdpuxws f1, v217; CHECK-P8-NEXT: xscvdpuxws f0, f018; CHECK-P8-NEXT: xxmrghw vs0, vs1, vs019; CHECK-P8-NEXT: xxswapd vs0, vs020; CHECK-P8-NEXT: mffprd r3, f021; CHECK-P8-NEXT: blr22;23; CHECK-P9-LABEL: test2elt:24; CHECK-P9: # %bb.0: # %entry25; CHECK-P9-NEXT: xxswapd vs1, v226; CHECK-P9-NEXT: xscvdpuxws f0, v227; CHECK-P9-NEXT: xscvdpuxws f1, f128; CHECK-P9-NEXT: xxmrghw vs0, vs0, vs129; CHECK-P9-NEXT: mfvsrld r3, vs030; CHECK-P9-NEXT: blr31;32; CHECK-BE-LABEL: test2elt:33; CHECK-BE: # %bb.0: # %entry34; CHECK-BE-NEXT: xxswapd vs0, v235; CHECK-BE-NEXT: xscvdpuxws v3, v236; CHECK-BE-NEXT: xscvdpuxws v2, f037; CHECK-BE-NEXT: vmrgow v2, v3, v238; CHECK-BE-NEXT: mfvsrd r3, v239; CHECK-BE-NEXT: blr40entry:41 %0 = fptoui <2 x double> %a to <2 x i32>42 %1 = bitcast <2 x i32> %0 to i6443 ret i64 %144}45 46define <4 x i32> @test4elt(ptr nocapture readonly) local_unnamed_addr #1 {47; CHECK-P8-LABEL: test4elt:48; CHECK-P8: # %bb.0: # %entry49; CHECK-P8-NEXT: li r4, 1650; CHECK-P8-NEXT: lxvd2x vs1, 0, r351; CHECK-P8-NEXT: lxvd2x vs0, r3, r452; CHECK-P8-NEXT: xxswapd vs1, vs153; CHECK-P8-NEXT: xxswapd vs0, vs054; CHECK-P8-NEXT: xxmrgld vs2, vs0, vs155; CHECK-P8-NEXT: xxmrghd vs0, vs0, vs156; CHECK-P8-NEXT: xvcvdpuxws v2, vs257; CHECK-P8-NEXT: xvcvdpuxws v3, vs058; CHECK-P8-NEXT: vmrgew v2, v3, v259; CHECK-P8-NEXT: blr60;61; CHECK-P9-LABEL: test4elt:62; CHECK-P9: # %bb.0: # %entry63; CHECK-P9-NEXT: lxv vs0, 0(r3)64; CHECK-P9-NEXT: lxv vs1, 16(r3)65; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs066; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs067; CHECK-P9-NEXT: xvcvdpuxws v2, vs268; CHECK-P9-NEXT: xvcvdpuxws v3, vs069; CHECK-P9-NEXT: vmrgew v2, v3, v270; CHECK-P9-NEXT: blr71;72; CHECK-BE-LABEL: test4elt:73; CHECK-BE: # %bb.0: # %entry74; CHECK-BE-NEXT: lxv vs0, 16(r3)75; CHECK-BE-NEXT: lxv vs1, 0(r3)76; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs077; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs078; CHECK-BE-NEXT: xvcvdpuxws v2, vs279; CHECK-BE-NEXT: xvcvdpuxws v3, vs080; CHECK-BE-NEXT: vmrgew v2, v3, v281; CHECK-BE-NEXT: blr82entry:83 %a = load <4 x double>, ptr %0, align 3284 %1 = fptoui <4 x double> %a to <4 x i32>85 ret <4 x i32> %186}87 88define void @test8elt(ptr noalias nocapture sret(<8 x i32>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {89; CHECK-P8-LABEL: test8elt:90; CHECK-P8: # %bb.0: # %entry91; CHECK-P8-NEXT: li r6, 3292; CHECK-P8-NEXT: li r5, 1693; CHECK-P8-NEXT: lxvd2x vs3, 0, r494; CHECK-P8-NEXT: lxvd2x vs1, r4, r695; CHECK-P8-NEXT: li r6, 4896; CHECK-P8-NEXT: lxvd2x vs0, r4, r597; CHECK-P8-NEXT: lxvd2x vs2, r4, r698; CHECK-P8-NEXT: xxmrghd vs4, vs1, vs299; CHECK-P8-NEXT: xxmrgld vs1, vs1, vs2100; CHECK-P8-NEXT: xxmrghd vs2, vs3, vs0101; CHECK-P8-NEXT: xxmrgld vs0, vs3, vs0102; CHECK-P8-NEXT: xvcvdpuxws v2, vs4103; CHECK-P8-NEXT: xvcvdpuxws v3, vs1104; CHECK-P8-NEXT: xvcvdpuxws v4, vs0105; CHECK-P8-NEXT: vmrgew v2, v3, v2106; CHECK-P8-NEXT: xvcvdpuxws v3, vs2107; CHECK-P8-NEXT: stxvd2x v2, r3, r5108; CHECK-P8-NEXT: vmrgew v3, v4, v3109; CHECK-P8-NEXT: stxvd2x v3, 0, r3110; CHECK-P8-NEXT: blr111;112; CHECK-P9-LABEL: test8elt:113; CHECK-P9: # %bb.0: # %entry114; CHECK-P9-NEXT: lxv vs2, 0(r4)115; CHECK-P9-NEXT: lxv vs3, 16(r4)116; CHECK-P9-NEXT: lxv vs0, 32(r4)117; CHECK-P9-NEXT: lxv vs1, 48(r4)118; CHECK-P9-NEXT: xxmrgld vs4, vs3, vs2119; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2120; CHECK-P9-NEXT: xvcvdpuxws v2, vs4121; CHECK-P9-NEXT: xvcvdpuxws v3, vs2122; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs0123; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0124; CHECK-P9-NEXT: xvcvdpuxws v4, vs0125; CHECK-P9-NEXT: vmrgew v2, v3, v2126; CHECK-P9-NEXT: xvcvdpuxws v3, vs2127; CHECK-P9-NEXT: stxv v2, 0(r3)128; CHECK-P9-NEXT: vmrgew v3, v4, v3129; CHECK-P9-NEXT: stxv v3, 16(r3)130; CHECK-P9-NEXT: blr131;132; CHECK-BE-LABEL: test8elt:133; CHECK-BE: # %bb.0: # %entry134; CHECK-BE-NEXT: lxv vs2, 16(r4)135; CHECK-BE-NEXT: lxv vs3, 0(r4)136; CHECK-BE-NEXT: lxv vs0, 48(r4)137; CHECK-BE-NEXT: lxv vs1, 32(r4)138; CHECK-BE-NEXT: xxmrgld vs4, vs3, vs2139; CHECK-BE-NEXT: xxmrghd vs2, vs3, vs2140; CHECK-BE-NEXT: xvcvdpuxws v2, vs4141; CHECK-BE-NEXT: xvcvdpuxws v3, vs2142; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs0143; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0144; CHECK-BE-NEXT: xvcvdpuxws v4, vs0145; CHECK-BE-NEXT: vmrgew v2, v3, v2146; CHECK-BE-NEXT: xvcvdpuxws v3, vs2147; CHECK-BE-NEXT: stxv v2, 0(r3)148; CHECK-BE-NEXT: vmrgew v3, v4, v3149; CHECK-BE-NEXT: stxv v3, 16(r3)150; CHECK-BE-NEXT: blr151entry:152 %a = load <8 x double>, ptr %0, align 64153 %1 = fptoui <8 x double> %a to <8 x i32>154 store <8 x i32> %1, ptr %agg.result, align 32155 ret void156}157 158define void @test16elt(ptr noalias nocapture sret(<16 x i32>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {159; CHECK-P8-LABEL: test16elt:160; CHECK-P8: # %bb.0: # %entry161; CHECK-P8-NEXT: li r6, 96162; CHECK-P8-NEXT: li r7, 112163; CHECK-P8-NEXT: li r5, 16164; CHECK-P8-NEXT: lxvd2x vs7, 0, r4165; CHECK-P8-NEXT: lxvd2x vs0, r4, r6166; CHECK-P8-NEXT: li r6, 64167; CHECK-P8-NEXT: lxvd2x vs1, r4, r7168; CHECK-P8-NEXT: li r7, 80169; CHECK-P8-NEXT: lxvd2x vs4, r4, r5170; CHECK-P8-NEXT: lxvd2x vs2, r4, r6171; CHECK-P8-NEXT: li r6, 32172; CHECK-P8-NEXT: lxvd2x vs3, r4, r7173; CHECK-P8-NEXT: li r7, 48174; CHECK-P8-NEXT: lxvd2x vs5, r4, r6175; CHECK-P8-NEXT: lxvd2x vs6, r4, r7176; CHECK-P8-NEXT: xxmrghd vs8, vs5, vs6177; CHECK-P8-NEXT: xxmrgld vs5, vs5, vs6178; CHECK-P8-NEXT: xxmrghd vs6, vs2, vs3179; CHECK-P8-NEXT: xxmrgld vs2, vs2, vs3180; CHECK-P8-NEXT: xxmrghd vs3, vs0, vs1181; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1182; CHECK-P8-NEXT: xxmrghd vs1, vs7, vs4183; CHECK-P8-NEXT: xxmrgld vs4, vs7, vs4184; CHECK-P8-NEXT: xvcvdpuxws v2, vs8185; CHECK-P8-NEXT: xvcvdpuxws v3, vs5186; CHECK-P8-NEXT: xvcvdpuxws v4, vs6187; CHECK-P8-NEXT: xvcvdpuxws v5, vs2188; CHECK-P8-NEXT: xvcvdpuxws v0, vs3189; CHECK-P8-NEXT: vmrgew v2, v3, v2190; CHECK-P8-NEXT: xvcvdpuxws v3, vs0191; CHECK-P8-NEXT: vmrgew v4, v5, v4192; CHECK-P8-NEXT: xvcvdpuxws v5, vs1193; CHECK-P8-NEXT: stxvd2x v4, r3, r6194; CHECK-P8-NEXT: stxvd2x v2, r3, r5195; CHECK-P8-NEXT: vmrgew v3, v3, v0196; CHECK-P8-NEXT: xvcvdpuxws v0, vs4197; CHECK-P8-NEXT: stxvd2x v3, r3, r7198; CHECK-P8-NEXT: vmrgew v5, v0, v5199; CHECK-P8-NEXT: stxvd2x v5, 0, r3200; CHECK-P8-NEXT: blr201;202; CHECK-P9-LABEL: test16elt:203; CHECK-P9: # %bb.0: # %entry204; CHECK-P9-NEXT: lxv vs6, 0(r4)205; CHECK-P9-NEXT: lxv vs7, 16(r4)206; CHECK-P9-NEXT: lxv vs4, 32(r4)207; CHECK-P9-NEXT: lxv vs5, 48(r4)208; CHECK-P9-NEXT: xxmrgld vs8, vs7, vs6209; CHECK-P9-NEXT: xxmrghd vs6, vs7, vs6210; CHECK-P9-NEXT: xxmrgld vs7, vs5, vs4211; CHECK-P9-NEXT: xxmrghd vs4, vs5, vs4212; CHECK-P9-NEXT: lxv vs2, 64(r4)213; CHECK-P9-NEXT: lxv vs3, 80(r4)214; CHECK-P9-NEXT: lxv vs0, 96(r4)215; CHECK-P9-NEXT: lxv vs1, 112(r4)216; CHECK-P9-NEXT: xvcvdpuxws v2, vs8217; CHECK-P9-NEXT: xvcvdpuxws v3, vs6218; CHECK-P9-NEXT: xvcvdpuxws v4, vs7219; CHECK-P9-NEXT: vmrgew v2, v3, v2220; CHECK-P9-NEXT: xvcvdpuxws v3, vs4221; CHECK-P9-NEXT: xxmrgld vs4, vs3, vs2222; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2223; CHECK-P9-NEXT: stxv v2, 0(r3)224; CHECK-P9-NEXT: xvcvdpuxws v5, vs2225; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs0226; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0227; CHECK-P9-NEXT: xvcvdpuxws v0, vs0228; CHECK-P9-NEXT: vmrgew v3, v3, v4229; CHECK-P9-NEXT: xvcvdpuxws v4, vs4230; CHECK-P9-NEXT: stxv v3, 16(r3)231; CHECK-P9-NEXT: vmrgew v4, v5, v4232; CHECK-P9-NEXT: stxv v4, 32(r3)233; CHECK-P9-NEXT: xvcvdpuxws v5, vs2234; CHECK-P9-NEXT: vmrgew v5, v0, v5235; CHECK-P9-NEXT: stxv v5, 48(r3)236; CHECK-P9-NEXT: blr237;238; CHECK-BE-LABEL: test16elt:239; CHECK-BE: # %bb.0: # %entry240; CHECK-BE-NEXT: lxv vs6, 16(r4)241; CHECK-BE-NEXT: lxv vs7, 0(r4)242; CHECK-BE-NEXT: lxv vs4, 48(r4)243; CHECK-BE-NEXT: lxv vs5, 32(r4)244; CHECK-BE-NEXT: xxmrgld vs8, vs7, vs6245; CHECK-BE-NEXT: xxmrghd vs6, vs7, vs6246; CHECK-BE-NEXT: xxmrgld vs7, vs5, vs4247; CHECK-BE-NEXT: xxmrghd vs4, vs5, vs4248; CHECK-BE-NEXT: lxv vs2, 80(r4)249; CHECK-BE-NEXT: lxv vs3, 64(r4)250; CHECK-BE-NEXT: lxv vs0, 112(r4)251; CHECK-BE-NEXT: lxv vs1, 96(r4)252; CHECK-BE-NEXT: xvcvdpuxws v2, vs8253; CHECK-BE-NEXT: xvcvdpuxws v3, vs6254; CHECK-BE-NEXT: xvcvdpuxws v4, vs7255; CHECK-BE-NEXT: vmrgew v2, v3, v2256; CHECK-BE-NEXT: xvcvdpuxws v3, vs4257; CHECK-BE-NEXT: xxmrgld vs4, vs3, vs2258; CHECK-BE-NEXT: xxmrghd vs2, vs3, vs2259; CHECK-BE-NEXT: stxv v2, 0(r3)260; CHECK-BE-NEXT: xvcvdpuxws v5, vs2261; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs0262; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0263; CHECK-BE-NEXT: xvcvdpuxws v0, vs0264; CHECK-BE-NEXT: vmrgew v3, v3, v4265; CHECK-BE-NEXT: xvcvdpuxws v4, vs4266; CHECK-BE-NEXT: stxv v3, 16(r3)267; CHECK-BE-NEXT: vmrgew v4, v5, v4268; CHECK-BE-NEXT: stxv v4, 32(r3)269; CHECK-BE-NEXT: xvcvdpuxws v5, vs2270; CHECK-BE-NEXT: vmrgew v5, v0, v5271; CHECK-BE-NEXT: stxv v5, 48(r3)272; CHECK-BE-NEXT: blr273entry:274 %a = load <16 x double>, ptr %0, align 128275 %1 = fptoui <16 x double> %a to <16 x i32>276 store <16 x i32> %1, ptr %agg.result, align 64277 ret void278}279 280define i64 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {281; CHECK-P8-LABEL: test2elt_signed:282; CHECK-P8: # %bb.0: # %entry283; CHECK-P8-NEXT: xxswapd vs0, v2284; CHECK-P8-NEXT: xscvdpsxws f1, v2285; CHECK-P8-NEXT: xscvdpsxws f0, f0286; CHECK-P8-NEXT: xxmrghw vs0, vs1, vs0287; CHECK-P8-NEXT: xxswapd vs0, vs0288; CHECK-P8-NEXT: mffprd r3, f0289; CHECK-P8-NEXT: blr290;291; CHECK-P9-LABEL: test2elt_signed:292; CHECK-P9: # %bb.0: # %entry293; CHECK-P9-NEXT: xxswapd vs1, v2294; CHECK-P9-NEXT: xscvdpsxws f0, v2295; CHECK-P9-NEXT: xscvdpsxws f1, f1296; CHECK-P9-NEXT: xxmrghw vs0, vs0, vs1297; CHECK-P9-NEXT: mfvsrld r3, vs0298; CHECK-P9-NEXT: blr299;300; CHECK-BE-LABEL: test2elt_signed:301; CHECK-BE: # %bb.0: # %entry302; CHECK-BE-NEXT: xxswapd vs0, v2303; CHECK-BE-NEXT: xscvdpsxws v3, v2304; CHECK-BE-NEXT: xscvdpsxws v2, f0305; CHECK-BE-NEXT: vmrgow v2, v3, v2306; CHECK-BE-NEXT: mfvsrd r3, v2307; CHECK-BE-NEXT: blr308entry:309 %0 = fptosi <2 x double> %a to <2 x i32>310 %1 = bitcast <2 x i32> %0 to i64311 ret i64 %1312}313 314define <4 x i32> @test4elt_signed(ptr nocapture readonly) local_unnamed_addr #1 {315; CHECK-P8-LABEL: test4elt_signed:316; CHECK-P8: # %bb.0: # %entry317; CHECK-P8-NEXT: li r4, 16318; CHECK-P8-NEXT: lxvd2x vs1, 0, r3319; CHECK-P8-NEXT: lxvd2x vs0, r3, r4320; CHECK-P8-NEXT: xxswapd vs1, vs1321; CHECK-P8-NEXT: xxswapd vs0, vs0322; CHECK-P8-NEXT: xxmrgld vs2, vs0, vs1323; CHECK-P8-NEXT: xxmrghd vs0, vs0, vs1324; CHECK-P8-NEXT: xvcvdpsxws v2, vs2325; CHECK-P8-NEXT: xvcvdpsxws v3, vs0326; CHECK-P8-NEXT: vmrgew v2, v3, v2327; CHECK-P8-NEXT: blr328;329; CHECK-P9-LABEL: test4elt_signed:330; CHECK-P9: # %bb.0: # %entry331; CHECK-P9-NEXT: lxv vs0, 0(r3)332; CHECK-P9-NEXT: lxv vs1, 16(r3)333; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs0334; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0335; CHECK-P9-NEXT: xvcvdpsxws v2, vs2336; CHECK-P9-NEXT: xvcvdpsxws v3, vs0337; CHECK-P9-NEXT: vmrgew v2, v3, v2338; CHECK-P9-NEXT: blr339;340; CHECK-BE-LABEL: test4elt_signed:341; CHECK-BE: # %bb.0: # %entry342; CHECK-BE-NEXT: lxv vs0, 16(r3)343; CHECK-BE-NEXT: lxv vs1, 0(r3)344; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs0345; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0346; CHECK-BE-NEXT: xvcvdpsxws v2, vs2347; CHECK-BE-NEXT: xvcvdpsxws v3, vs0348; CHECK-BE-NEXT: vmrgew v2, v3, v2349; CHECK-BE-NEXT: blr350entry:351 %a = load <4 x double>, ptr %0, align 32352 %1 = fptosi <4 x double> %a to <4 x i32>353 ret <4 x i32> %1354}355 356define void @test8elt_signed(ptr noalias nocapture sret(<8 x i32>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {357; CHECK-P8-LABEL: test8elt_signed:358; CHECK-P8: # %bb.0: # %entry359; CHECK-P8-NEXT: li r6, 32360; CHECK-P8-NEXT: li r5, 16361; CHECK-P8-NEXT: lxvd2x vs3, 0, r4362; CHECK-P8-NEXT: lxvd2x vs1, r4, r6363; CHECK-P8-NEXT: li r6, 48364; CHECK-P8-NEXT: lxvd2x vs0, r4, r5365; CHECK-P8-NEXT: lxvd2x vs2, r4, r6366; CHECK-P8-NEXT: xxmrghd vs4, vs1, vs2367; CHECK-P8-NEXT: xxmrgld vs1, vs1, vs2368; CHECK-P8-NEXT: xxmrghd vs2, vs3, vs0369; CHECK-P8-NEXT: xxmrgld vs0, vs3, vs0370; CHECK-P8-NEXT: xvcvdpsxws v2, vs4371; CHECK-P8-NEXT: xvcvdpsxws v3, vs1372; CHECK-P8-NEXT: xvcvdpsxws v4, vs0373; CHECK-P8-NEXT: vmrgew v2, v3, v2374; CHECK-P8-NEXT: xvcvdpsxws v3, vs2375; CHECK-P8-NEXT: stxvd2x v2, r3, r5376; CHECK-P8-NEXT: vmrgew v3, v4, v3377; CHECK-P8-NEXT: stxvd2x v3, 0, r3378; CHECK-P8-NEXT: blr379;380; CHECK-P9-LABEL: test8elt_signed:381; CHECK-P9: # %bb.0: # %entry382; CHECK-P9-NEXT: lxv vs2, 0(r4)383; CHECK-P9-NEXT: lxv vs3, 16(r4)384; CHECK-P9-NEXT: lxv vs0, 32(r4)385; CHECK-P9-NEXT: lxv vs1, 48(r4)386; CHECK-P9-NEXT: xxmrgld vs4, vs3, vs2387; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2388; CHECK-P9-NEXT: xvcvdpsxws v2, vs4389; CHECK-P9-NEXT: xvcvdpsxws v3, vs2390; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs0391; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0392; CHECK-P9-NEXT: xvcvdpsxws v4, vs0393; CHECK-P9-NEXT: vmrgew v2, v3, v2394; CHECK-P9-NEXT: xvcvdpsxws v3, vs2395; CHECK-P9-NEXT: stxv v2, 0(r3)396; CHECK-P9-NEXT: vmrgew v3, v4, v3397; CHECK-P9-NEXT: stxv v3, 16(r3)398; CHECK-P9-NEXT: blr399;400; CHECK-BE-LABEL: test8elt_signed:401; CHECK-BE: # %bb.0: # %entry402; CHECK-BE-NEXT: lxv vs2, 16(r4)403; CHECK-BE-NEXT: lxv vs3, 0(r4)404; CHECK-BE-NEXT: lxv vs0, 48(r4)405; CHECK-BE-NEXT: lxv vs1, 32(r4)406; CHECK-BE-NEXT: xxmrgld vs4, vs3, vs2407; CHECK-BE-NEXT: xxmrghd vs2, vs3, vs2408; CHECK-BE-NEXT: xvcvdpsxws v2, vs4409; CHECK-BE-NEXT: xvcvdpsxws v3, vs2410; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs0411; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0412; CHECK-BE-NEXT: xvcvdpsxws v4, vs0413; CHECK-BE-NEXT: vmrgew v2, v3, v2414; CHECK-BE-NEXT: xvcvdpsxws v3, vs2415; CHECK-BE-NEXT: stxv v2, 0(r3)416; CHECK-BE-NEXT: vmrgew v3, v4, v3417; CHECK-BE-NEXT: stxv v3, 16(r3)418; CHECK-BE-NEXT: blr419entry:420 %a = load <8 x double>, ptr %0, align 64421 %1 = fptosi <8 x double> %a to <8 x i32>422 store <8 x i32> %1, ptr %agg.result, align 32423 ret void424}425 426define void @test16elt_signed(ptr noalias nocapture sret(<16 x i32>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {427; CHECK-P8-LABEL: test16elt_signed:428; CHECK-P8: # %bb.0: # %entry429; CHECK-P8-NEXT: li r6, 96430; CHECK-P8-NEXT: li r7, 112431; CHECK-P8-NEXT: li r5, 16432; CHECK-P8-NEXT: lxvd2x vs7, 0, r4433; CHECK-P8-NEXT: lxvd2x vs0, r4, r6434; CHECK-P8-NEXT: li r6, 64435; CHECK-P8-NEXT: lxvd2x vs1, r4, r7436; CHECK-P8-NEXT: li r7, 80437; CHECK-P8-NEXT: lxvd2x vs4, r4, r5438; CHECK-P8-NEXT: lxvd2x vs2, r4, r6439; CHECK-P8-NEXT: li r6, 32440; CHECK-P8-NEXT: lxvd2x vs3, r4, r7441; CHECK-P8-NEXT: li r7, 48442; CHECK-P8-NEXT: lxvd2x vs5, r4, r6443; CHECK-P8-NEXT: lxvd2x vs6, r4, r7444; CHECK-P8-NEXT: xxmrghd vs8, vs5, vs6445; CHECK-P8-NEXT: xxmrgld vs5, vs5, vs6446; CHECK-P8-NEXT: xxmrghd vs6, vs2, vs3447; CHECK-P8-NEXT: xxmrgld vs2, vs2, vs3448; CHECK-P8-NEXT: xxmrghd vs3, vs0, vs1449; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1450; CHECK-P8-NEXT: xxmrghd vs1, vs7, vs4451; CHECK-P8-NEXT: xxmrgld vs4, vs7, vs4452; CHECK-P8-NEXT: xvcvdpsxws v2, vs8453; CHECK-P8-NEXT: xvcvdpsxws v3, vs5454; CHECK-P8-NEXT: xvcvdpsxws v4, vs6455; CHECK-P8-NEXT: xvcvdpsxws v5, vs2456; CHECK-P8-NEXT: xvcvdpsxws v0, vs3457; CHECK-P8-NEXT: vmrgew v2, v3, v2458; CHECK-P8-NEXT: xvcvdpsxws v3, vs0459; CHECK-P8-NEXT: vmrgew v4, v5, v4460; CHECK-P8-NEXT: xvcvdpsxws v5, vs1461; CHECK-P8-NEXT: stxvd2x v4, r3, r6462; CHECK-P8-NEXT: stxvd2x v2, r3, r5463; CHECK-P8-NEXT: vmrgew v3, v3, v0464; CHECK-P8-NEXT: xvcvdpsxws v0, vs4465; CHECK-P8-NEXT: stxvd2x v3, r3, r7466; CHECK-P8-NEXT: vmrgew v5, v0, v5467; CHECK-P8-NEXT: stxvd2x v5, 0, r3468; CHECK-P8-NEXT: blr469;470; CHECK-P9-LABEL: test16elt_signed:471; CHECK-P9: # %bb.0: # %entry472; CHECK-P9-NEXT: lxv vs6, 0(r4)473; CHECK-P9-NEXT: lxv vs7, 16(r4)474; CHECK-P9-NEXT: lxv vs4, 32(r4)475; CHECK-P9-NEXT: lxv vs5, 48(r4)476; CHECK-P9-NEXT: xxmrgld vs8, vs7, vs6477; CHECK-P9-NEXT: xxmrghd vs6, vs7, vs6478; CHECK-P9-NEXT: xxmrgld vs7, vs5, vs4479; CHECK-P9-NEXT: xxmrghd vs4, vs5, vs4480; CHECK-P9-NEXT: lxv vs2, 64(r4)481; CHECK-P9-NEXT: lxv vs3, 80(r4)482; CHECK-P9-NEXT: lxv vs0, 96(r4)483; CHECK-P9-NEXT: lxv vs1, 112(r4)484; CHECK-P9-NEXT: xvcvdpsxws v2, vs8485; CHECK-P9-NEXT: xvcvdpsxws v3, vs6486; CHECK-P9-NEXT: xvcvdpsxws v4, vs7487; CHECK-P9-NEXT: vmrgew v2, v3, v2488; CHECK-P9-NEXT: xvcvdpsxws v3, vs4489; CHECK-P9-NEXT: xxmrgld vs4, vs3, vs2490; CHECK-P9-NEXT: xxmrghd vs2, vs3, vs2491; CHECK-P9-NEXT: stxv v2, 0(r3)492; CHECK-P9-NEXT: xvcvdpsxws v5, vs2493; CHECK-P9-NEXT: xxmrgld vs2, vs1, vs0494; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0495; CHECK-P9-NEXT: xvcvdpsxws v0, vs0496; CHECK-P9-NEXT: vmrgew v3, v3, v4497; CHECK-P9-NEXT: xvcvdpsxws v4, vs4498; CHECK-P9-NEXT: stxv v3, 16(r3)499; CHECK-P9-NEXT: vmrgew v4, v5, v4500; CHECK-P9-NEXT: stxv v4, 32(r3)501; CHECK-P9-NEXT: xvcvdpsxws v5, vs2502; CHECK-P9-NEXT: vmrgew v5, v0, v5503; CHECK-P9-NEXT: stxv v5, 48(r3)504; CHECK-P9-NEXT: blr505;506; CHECK-BE-LABEL: test16elt_signed:507; CHECK-BE: # %bb.0: # %entry508; CHECK-BE-NEXT: lxv vs6, 16(r4)509; CHECK-BE-NEXT: lxv vs7, 0(r4)510; CHECK-BE-NEXT: lxv vs4, 48(r4)511; CHECK-BE-NEXT: lxv vs5, 32(r4)512; CHECK-BE-NEXT: xxmrgld vs8, vs7, vs6513; CHECK-BE-NEXT: xxmrghd vs6, vs7, vs6514; CHECK-BE-NEXT: xxmrgld vs7, vs5, vs4515; CHECK-BE-NEXT: xxmrghd vs4, vs5, vs4516; CHECK-BE-NEXT: lxv vs2, 80(r4)517; CHECK-BE-NEXT: lxv vs3, 64(r4)518; CHECK-BE-NEXT: lxv vs0, 112(r4)519; CHECK-BE-NEXT: lxv vs1, 96(r4)520; CHECK-BE-NEXT: xvcvdpsxws v2, vs8521; CHECK-BE-NEXT: xvcvdpsxws v3, vs6522; CHECK-BE-NEXT: xvcvdpsxws v4, vs7523; CHECK-BE-NEXT: vmrgew v2, v3, v2524; CHECK-BE-NEXT: xvcvdpsxws v3, vs4525; CHECK-BE-NEXT: xxmrgld vs4, vs3, vs2526; CHECK-BE-NEXT: xxmrghd vs2, vs3, vs2527; CHECK-BE-NEXT: stxv v2, 0(r3)528; CHECK-BE-NEXT: xvcvdpsxws v5, vs2529; CHECK-BE-NEXT: xxmrgld vs2, vs1, vs0530; CHECK-BE-NEXT: xxmrghd vs0, vs1, vs0531; CHECK-BE-NEXT: xvcvdpsxws v0, vs0532; CHECK-BE-NEXT: vmrgew v3, v3, v4533; CHECK-BE-NEXT: xvcvdpsxws v4, vs4534; CHECK-BE-NEXT: stxv v3, 16(r3)535; CHECK-BE-NEXT: vmrgew v4, v5, v4536; CHECK-BE-NEXT: stxv v4, 32(r3)537; CHECK-BE-NEXT: xvcvdpsxws v5, vs2538; CHECK-BE-NEXT: vmrgew v5, v0, v5539; CHECK-BE-NEXT: stxv v5, 48(r3)540; CHECK-BE-NEXT: blr541entry:542 %a = load <16 x double>, ptr %0, align 128543 %1 = fptosi <16 x double> %a to <16 x i32>544 store <16 x i32> %1, ptr %agg.result, align 64545 ret void546}547