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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-P85; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-P98; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-BE11 12define <2 x double> @test2elt(i32 %a.coerce) local_unnamed_addr #0 {13; CHECK-P8-LABEL: test2elt:14; CHECK-P8: # %bb.0: # %entry15; CHECK-P8-NEXT: addis r4, r2, .LCPI0_0@toc@ha16; CHECK-P8-NEXT: mtvsrwz v3, r317; CHECK-P8-NEXT: xxlxor v4, v4, v418; CHECK-P8-NEXT: addi r4, r4, .LCPI0_0@toc@l19; CHECK-P8-NEXT: lxvd2x vs0, 0, r420; CHECK-P8-NEXT: xxswapd v2, vs021; CHECK-P8-NEXT: vperm v2, v4, v3, v222; CHECK-P8-NEXT: xvcvuxddp v2, v223; CHECK-P8-NEXT: blr24;25; CHECK-P9-LABEL: test2elt:26; CHECK-P9: # %bb.0: # %entry27; CHECK-P9-NEXT: mtfprwz f0, r328; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha29; CHECK-P9-NEXT: xxlxor vs2, vs2, vs230; CHECK-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l31; CHECK-P9-NEXT: lxv vs1, 0(r3)32; CHECK-P9-NEXT: xxperm vs0, vs2, vs133; CHECK-P9-NEXT: xvcvuxddp v2, vs034; CHECK-P9-NEXT: blr35;36; CHECK-BE-LABEL: test2elt:37; CHECK-BE: # %bb.0: # %entry38; CHECK-BE-NEXT: mtfprwz f0, r339; CHECK-BE-NEXT: addis r3, r2, .LCPI0_0@toc@ha40; CHECK-BE-NEXT: xxlxor vs2, vs2, vs241; CHECK-BE-NEXT: addi r3, r3, .LCPI0_0@toc@l42; CHECK-BE-NEXT: lxv vs1, 0(r3)43; CHECK-BE-NEXT: xxperm vs0, vs2, vs144; CHECK-BE-NEXT: xvcvuxddp v2, vs045; CHECK-BE-NEXT: blr46entry:47 %0 = bitcast i32 %a.coerce to <2 x i16>48 %1 = uitofp <2 x i16> %0 to <2 x double>49 ret <2 x double> %150}51 52define void @test4elt(ptr noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {53; CHECK-P8-LABEL: test4elt:54; CHECK-P8: # %bb.0: # %entry55; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha56; CHECK-P8-NEXT: mtvsrd v4, r457; CHECK-P8-NEXT: xxlxor v5, v5, v558; CHECK-P8-NEXT: li r4, 1659; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l60; CHECK-P8-NEXT: lxvd2x vs0, 0, r561; CHECK-P8-NEXT: addis r5, r2, .LCPI1_1@toc@ha62; CHECK-P8-NEXT: addi r5, r5, .LCPI1_1@toc@l63; CHECK-P8-NEXT: lxvd2x vs1, 0, r564; CHECK-P8-NEXT: xxswapd v2, vs065; CHECK-P8-NEXT: vperm v2, v5, v4, v266; CHECK-P8-NEXT: xvcvuxddp vs0, v267; CHECK-P8-NEXT: xxswapd v3, vs168; CHECK-P8-NEXT: vperm v3, v5, v4, v369; CHECK-P8-NEXT: xvcvuxddp vs1, v370; CHECK-P8-NEXT: xxswapd vs0, vs071; CHECK-P8-NEXT: stxvd2x vs0, 0, r372; CHECK-P8-NEXT: xxswapd vs1, vs173; CHECK-P8-NEXT: stxvd2x vs1, r3, r474; CHECK-P8-NEXT: blr75;76; CHECK-P9-LABEL: test4elt:77; CHECK-P9: # %bb.0: # %entry78; CHECK-P9-NEXT: mtvsrd v2, r479; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0@toc@ha80; CHECK-P9-NEXT: xxlxor v4, v4, v481; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0@toc@l82; CHECK-P9-NEXT: lxv v3, 0(r4)83; CHECK-P9-NEXT: addis r4, r2, .LCPI1_1@toc@ha84; CHECK-P9-NEXT: addi r4, r4, .LCPI1_1@toc@l85; CHECK-P9-NEXT: vperm v3, v4, v2, v386; CHECK-P9-NEXT: xvcvuxddp vs0, v387; CHECK-P9-NEXT: lxv v3, 0(r4)88; CHECK-P9-NEXT: vperm v2, v4, v2, v389; CHECK-P9-NEXT: stxv vs0, 0(r3)90; CHECK-P9-NEXT: xvcvuxddp vs1, v291; CHECK-P9-NEXT: stxv vs1, 16(r3)92; CHECK-P9-NEXT: blr93;94; CHECK-BE-LABEL: test4elt:95; CHECK-BE: # %bb.0: # %entry96; CHECK-BE-NEXT: mtvsrd v2, r497; CHECK-BE-NEXT: addis r4, r2, .LCPI1_0@toc@ha98; CHECK-BE-NEXT: xxlxor v4, v4, v499; CHECK-BE-NEXT: addi r4, r4, .LCPI1_0@toc@l100; CHECK-BE-NEXT: lxv v3, 0(r4)101; CHECK-BE-NEXT: addis r4, r2, .LCPI1_1@toc@ha102; CHECK-BE-NEXT: addi r4, r4, .LCPI1_1@toc@l103; CHECK-BE-NEXT: vperm v3, v4, v2, v3104; CHECK-BE-NEXT: xvcvuxddp vs0, v3105; CHECK-BE-NEXT: lxv v3, 0(r4)106; CHECK-BE-NEXT: vperm v2, v4, v2, v3107; CHECK-BE-NEXT: stxv vs0, 0(r3)108; CHECK-BE-NEXT: xvcvuxddp vs1, v2109; CHECK-BE-NEXT: stxv vs1, 16(r3)110; CHECK-BE-NEXT: blr111entry:112 %0 = bitcast i64 %a.coerce to <4 x i16>113 %1 = uitofp <4 x i16> %0 to <4 x double>114 store <4 x double> %1, ptr %agg.result, align 32115 ret void116}117 118define void @test8elt(ptr noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {119; CHECK-P8-LABEL: test8elt:120; CHECK-P8: # %bb.0: # %entry121; CHECK-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha122; CHECK-P8-NEXT: xxlxor v1, v1, v1123; CHECK-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l124; CHECK-P8-NEXT: lxvd2x vs0, 0, r4125; CHECK-P8-NEXT: addis r4, r2, .LCPI2_1@toc@ha126; CHECK-P8-NEXT: addi r4, r4, .LCPI2_1@toc@l127; CHECK-P8-NEXT: lxvd2x vs1, 0, r4128; CHECK-P8-NEXT: addis r4, r2, .LCPI2_3@toc@ha129; CHECK-P8-NEXT: addi r4, r4, .LCPI2_3@toc@l130; CHECK-P8-NEXT: lxvd2x vs2, 0, r4131; CHECK-P8-NEXT: addis r4, r2, .LCPI2_2@toc@ha132; CHECK-P8-NEXT: addi r4, r4, .LCPI2_2@toc@l133; CHECK-P8-NEXT: xxswapd v4, vs0134; CHECK-P8-NEXT: vperm v4, v1, v2, v4135; CHECK-P8-NEXT: xvcvuxddp vs0, v4136; CHECK-P8-NEXT: xxswapd v5, vs1137; CHECK-P8-NEXT: vperm v5, v1, v2, v5138; CHECK-P8-NEXT: xvcvuxddp vs1, v5139; CHECK-P8-NEXT: xxswapd v3, vs2140; CHECK-P8-NEXT: lxvd2x vs2, 0, r4141; CHECK-P8-NEXT: li r4, 48142; CHECK-P8-NEXT: vperm v3, v1, v2, v3143; CHECK-P8-NEXT: xxswapd vs0, vs0144; CHECK-P8-NEXT: stxvd2x vs0, 0, r3145; CHECK-P8-NEXT: xxswapd v0, vs2146; CHECK-P8-NEXT: xvcvuxddp vs2, v3147; CHECK-P8-NEXT: xxswapd vs1, vs1148; CHECK-P8-NEXT: vperm v2, v1, v2, v0149; CHECK-P8-NEXT: xvcvuxddp vs3, v2150; CHECK-P8-NEXT: xxswapd vs2, vs2151; CHECK-P8-NEXT: stxvd2x vs2, r3, r4152; CHECK-P8-NEXT: li r4, 32153; CHECK-P8-NEXT: xxswapd vs3, vs3154; CHECK-P8-NEXT: stxvd2x vs3, r3, r4155; CHECK-P8-NEXT: li r4, 16156; CHECK-P8-NEXT: stxvd2x vs1, r3, r4157; CHECK-P8-NEXT: blr158;159; CHECK-P9-LABEL: test8elt:160; CHECK-P9: # %bb.0: # %entry161; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha162; CHECK-P9-NEXT: xxlxor v4, v4, v4163; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l164; CHECK-P9-NEXT: lxv v3, 0(r4)165; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1@toc@ha166; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1@toc@l167; CHECK-P9-NEXT: vperm v3, v4, v2, v3168; CHECK-P9-NEXT: xvcvuxddp vs0, v3169; CHECK-P9-NEXT: lxv v3, 0(r4)170; CHECK-P9-NEXT: addis r4, r2, .LCPI2_2@toc@ha171; CHECK-P9-NEXT: addi r4, r4, .LCPI2_2@toc@l172; CHECK-P9-NEXT: vperm v3, v4, v2, v3173; CHECK-P9-NEXT: stxv vs0, 0(r3)174; CHECK-P9-NEXT: xvcvuxddp vs1, v3175; CHECK-P9-NEXT: lxv v3, 0(r4)176; CHECK-P9-NEXT: addis r4, r2, .LCPI2_3@toc@ha177; CHECK-P9-NEXT: addi r4, r4, .LCPI2_3@toc@l178; CHECK-P9-NEXT: vperm v3, v4, v2, v3179; CHECK-P9-NEXT: stxv vs1, 16(r3)180; CHECK-P9-NEXT: xvcvuxddp vs2, v3181; CHECK-P9-NEXT: lxv v3, 0(r4)182; CHECK-P9-NEXT: vperm v2, v4, v2, v3183; CHECK-P9-NEXT: stxv vs2, 32(r3)184; CHECK-P9-NEXT: xvcvuxddp vs3, v2185; CHECK-P9-NEXT: stxv vs3, 48(r3)186; CHECK-P9-NEXT: blr187;188; CHECK-BE-LABEL: test8elt:189; CHECK-BE: # %bb.0: # %entry190; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha191; CHECK-BE-NEXT: xxlxor v4, v4, v4192; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l193; CHECK-BE-NEXT: lxv v3, 0(r4)194; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1@toc@ha195; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1@toc@l196; CHECK-BE-NEXT: vperm v3, v4, v2, v3197; CHECK-BE-NEXT: xvcvuxddp vs0, v3198; CHECK-BE-NEXT: lxv v3, 0(r4)199; CHECK-BE-NEXT: addis r4, r2, .LCPI2_2@toc@ha200; CHECK-BE-NEXT: addi r4, r4, .LCPI2_2@toc@l201; CHECK-BE-NEXT: vperm v3, v4, v2, v3202; CHECK-BE-NEXT: stxv vs0, 0(r3)203; CHECK-BE-NEXT: xvcvuxddp vs1, v3204; CHECK-BE-NEXT: lxv v3, 0(r4)205; CHECK-BE-NEXT: addis r4, r2, .LCPI2_3@toc@ha206; CHECK-BE-NEXT: addi r4, r4, .LCPI2_3@toc@l207; CHECK-BE-NEXT: vperm v3, v4, v2, v3208; CHECK-BE-NEXT: stxv vs1, 16(r3)209; CHECK-BE-NEXT: xvcvuxddp vs2, v3210; CHECK-BE-NEXT: lxv v3, 0(r4)211; CHECK-BE-NEXT: vperm v2, v4, v2, v3212; CHECK-BE-NEXT: stxv vs2, 32(r3)213; CHECK-BE-NEXT: xvcvuxddp vs3, v2214; CHECK-BE-NEXT: stxv vs3, 48(r3)215; CHECK-BE-NEXT: blr216entry:217 %0 = uitofp <8 x i16> %a to <8 x double>218 store <8 x double> %0, ptr %agg.result, align 64219 ret void220}221 222define void @test16elt(ptr noalias nocapture sret(<16 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #3 {223; CHECK-P8-LABEL: test16elt:224; CHECK-P8: # %bb.0: # %entry225; CHECK-P8-NEXT: li r5, 16226; CHECK-P8-NEXT: lxvd2x vs1, 0, r4227; CHECK-P8-NEXT: xxlxor v5, v5, v5228; CHECK-P8-NEXT: lxvd2x vs0, r4, r5229; CHECK-P8-NEXT: addis r4, r2, .LCPI3_1@toc@ha230; CHECK-P8-NEXT: addi r4, r4, .LCPI3_1@toc@l231; CHECK-P8-NEXT: lxvd2x vs2, 0, r4232; CHECK-P8-NEXT: addis r4, r2, .LCPI3_3@toc@ha233; CHECK-P8-NEXT: addi r4, r4, .LCPI3_3@toc@l234; CHECK-P8-NEXT: lxvd2x vs3, 0, r4235; CHECK-P8-NEXT: addis r4, r2, .LCPI3_2@toc@ha236; CHECK-P8-NEXT: addi r4, r4, .LCPI3_2@toc@l237; CHECK-P8-NEXT: xxswapd v6, vs1238; CHECK-P8-NEXT: xxswapd v2, vs0239; CHECK-P8-NEXT: lxvd2x vs0, 0, r4240; CHECK-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha241; CHECK-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l242; CHECK-P8-NEXT: xxswapd v0, vs2243; CHECK-P8-NEXT: vperm v9, v5, v2, v0244; CHECK-P8-NEXT: xvcvuxddp vs6, v9245; CHECK-P8-NEXT: vperm v0, v5, v6, v0246; CHECK-P8-NEXT: xvcvuxddp vs1, v0247; CHECK-P8-NEXT: xxswapd v3, vs3248; CHECK-P8-NEXT: vperm v1, v5, v2, v3249; CHECK-P8-NEXT: vperm v3, v5, v6, v3250; CHECK-P8-NEXT: xvcvuxddp vs4, v1251; CHECK-P8-NEXT: xvcvuxddp vs3, v3252; CHECK-P8-NEXT: xxswapd v4, vs0253; CHECK-P8-NEXT: lxvd2x vs0, 0, r4254; CHECK-P8-NEXT: li r4, 112255; CHECK-P8-NEXT: vperm v8, v5, v2, v4256; CHECK-P8-NEXT: vperm v4, v5, v6, v4257; CHECK-P8-NEXT: xxswapd vs1, vs1258; CHECK-P8-NEXT: xvcvuxddp vs7, v8259; CHECK-P8-NEXT: xvcvuxddp vs2, v4260; CHECK-P8-NEXT: stxvd2x vs1, r3, r5261; CHECK-P8-NEXT: xxswapd v7, vs0262; CHECK-P8-NEXT: xxswapd vs4, vs4263; CHECK-P8-NEXT: xxswapd vs3, vs3264; CHECK-P8-NEXT: stxvd2x vs4, r3, r4265; CHECK-P8-NEXT: li r4, 96266; CHECK-P8-NEXT: vperm v2, v5, v2, v7267; CHECK-P8-NEXT: vperm v7, v5, v6, v7268; CHECK-P8-NEXT: xvcvuxddp vs5, v2269; CHECK-P8-NEXT: xvcvuxddp vs0, v7270; CHECK-P8-NEXT: xxswapd vs4, vs6271; CHECK-P8-NEXT: xxswapd vs7, vs7272; CHECK-P8-NEXT: xxswapd vs2, vs2273; CHECK-P8-NEXT: stxvd2x vs7, r3, r4274; CHECK-P8-NEXT: li r4, 80275; CHECK-P8-NEXT: stxvd2x vs4, r3, r4276; CHECK-P8-NEXT: li r4, 64277; CHECK-P8-NEXT: xxswapd vs5, vs5278; CHECK-P8-NEXT: xxswapd vs0, vs0279; CHECK-P8-NEXT: stxvd2x vs5, r3, r4280; CHECK-P8-NEXT: li r4, 48281; CHECK-P8-NEXT: stxvd2x vs0, 0, r3282; CHECK-P8-NEXT: stxvd2x vs3, r3, r4283; CHECK-P8-NEXT: li r4, 32284; CHECK-P8-NEXT: stxvd2x vs2, r3, r4285; CHECK-P8-NEXT: blr286;287; CHECK-P9-LABEL: test16elt:288; CHECK-P9: # %bb.0: # %entry289; CHECK-P9-NEXT: lxv v2, 16(r4)290; CHECK-P9-NEXT: lxv v3, 0(r4)291; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha292; CHECK-P9-NEXT: xxlxor v5, v5, v5293; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l294; CHECK-P9-NEXT: lxv v4, 0(r4)295; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha296; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l297; CHECK-P9-NEXT: vperm v0, v5, v3, v4298; CHECK-P9-NEXT: xvcvuxddp vs0, v0299; CHECK-P9-NEXT: lxv v0, 0(r4)300; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha301; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l302; CHECK-P9-NEXT: vperm v1, v5, v3, v0303; CHECK-P9-NEXT: stxv vs0, 0(r3)304; CHECK-P9-NEXT: xvcvuxddp vs1, v1305; CHECK-P9-NEXT: lxv v1, 0(r4)306; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha307; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l308; CHECK-P9-NEXT: vperm v6, v5, v3, v1309; CHECK-P9-NEXT: stxv vs1, 16(r3)310; CHECK-P9-NEXT: xvcvuxddp vs2, v6311; CHECK-P9-NEXT: lxv v6, 0(r4)312; CHECK-P9-NEXT: vperm v3, v5, v3, v6313; CHECK-P9-NEXT: stxv vs2, 32(r3)314; CHECK-P9-NEXT: xvcvuxddp vs3, v3315; CHECK-P9-NEXT: vperm v3, v5, v2, v4316; CHECK-P9-NEXT: xvcvuxddp vs4, v3317; CHECK-P9-NEXT: vperm v3, v5, v2, v0318; CHECK-P9-NEXT: xvcvuxddp vs5, v3319; CHECK-P9-NEXT: vperm v3, v5, v2, v1320; CHECK-P9-NEXT: vperm v2, v5, v2, v6321; CHECK-P9-NEXT: stxv vs3, 48(r3)322; CHECK-P9-NEXT: xvcvuxddp vs6, v3323; CHECK-P9-NEXT: xvcvuxddp vs7, v2324; CHECK-P9-NEXT: stxv vs4, 64(r3)325; CHECK-P9-NEXT: stxv vs5, 80(r3)326; CHECK-P9-NEXT: stxv vs7, 112(r3)327; CHECK-P9-NEXT: stxv vs6, 96(r3)328; CHECK-P9-NEXT: blr329;330; CHECK-BE-LABEL: test16elt:331; CHECK-BE: # %bb.0: # %entry332; CHECK-BE-NEXT: lxv v2, 16(r4)333; CHECK-BE-NEXT: lxv v3, 0(r4)334; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha335; CHECK-BE-NEXT: xxlxor v5, v5, v5336; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l337; CHECK-BE-NEXT: lxv v4, 0(r4)338; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha339; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l340; CHECK-BE-NEXT: vperm v0, v5, v3, v4341; CHECK-BE-NEXT: xvcvuxddp vs0, v0342; CHECK-BE-NEXT: lxv v0, 0(r4)343; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha344; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l345; CHECK-BE-NEXT: vperm v1, v5, v3, v0346; CHECK-BE-NEXT: stxv vs0, 0(r3)347; CHECK-BE-NEXT: xvcvuxddp vs1, v1348; CHECK-BE-NEXT: lxv v1, 0(r4)349; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha350; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l351; CHECK-BE-NEXT: vperm v6, v5, v3, v1352; CHECK-BE-NEXT: stxv vs1, 16(r3)353; CHECK-BE-NEXT: xvcvuxddp vs2, v6354; CHECK-BE-NEXT: lxv v6, 0(r4)355; CHECK-BE-NEXT: vperm v3, v5, v3, v6356; CHECK-BE-NEXT: stxv vs2, 32(r3)357; CHECK-BE-NEXT: xvcvuxddp vs3, v3358; CHECK-BE-NEXT: vperm v3, v5, v2, v4359; CHECK-BE-NEXT: xvcvuxddp vs4, v3360; CHECK-BE-NEXT: vperm v3, v5, v2, v0361; CHECK-BE-NEXT: xvcvuxddp vs5, v3362; CHECK-BE-NEXT: vperm v3, v5, v2, v1363; CHECK-BE-NEXT: vperm v2, v5, v2, v6364; CHECK-BE-NEXT: stxv vs3, 48(r3)365; CHECK-BE-NEXT: xvcvuxddp vs6, v3366; CHECK-BE-NEXT: xvcvuxddp vs7, v2367; CHECK-BE-NEXT: stxv vs4, 64(r3)368; CHECK-BE-NEXT: stxv vs5, 80(r3)369; CHECK-BE-NEXT: stxv vs7, 112(r3)370; CHECK-BE-NEXT: stxv vs6, 96(r3)371; CHECK-BE-NEXT: blr372entry:373 %a = load <16 x i16>, ptr %0, align 32374 %1 = uitofp <16 x i16> %a to <16 x double>375 store <16 x double> %1, ptr %agg.result, align 128376 ret void377}378 379define <2 x double> @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {380; CHECK-P8-LABEL: test2elt_signed:381; CHECK-P8: # %bb.0: # %entry382; CHECK-P8-NEXT: addis r4, r2, .LCPI4_0@toc@ha383; CHECK-P8-NEXT: mtvsrwz v3, r3384; CHECK-P8-NEXT: addis r3, r2, .LCPI4_1@toc@ha385; CHECK-P8-NEXT: addi r4, r4, .LCPI4_0@toc@l386; CHECK-P8-NEXT: addi r3, r3, .LCPI4_1@toc@l387; CHECK-P8-NEXT: lxvd2x vs0, 0, r4388; CHECK-P8-NEXT: xxswapd v2, vs0389; CHECK-P8-NEXT: vperm v2, v3, v3, v2390; CHECK-P8-NEXT: lxvd2x v3, 0, r3391; CHECK-P8-NEXT: vsld v2, v2, v3392; CHECK-P8-NEXT: vsrad v2, v2, v3393; CHECK-P8-NEXT: xvcvsxddp v2, v2394; CHECK-P8-NEXT: blr395;396; CHECK-P9-LABEL: test2elt_signed:397; CHECK-P9: # %bb.0: # %entry398; CHECK-P9-NEXT: mtvsrwz v2, r3399; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha400; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l401; CHECK-P9-NEXT: lxv vs0, 0(r3)402; CHECK-P9-NEXT: xxperm v2, v2, vs0403; CHECK-P9-NEXT: vextsh2d v2, v2404; CHECK-P9-NEXT: xvcvsxddp v2, v2405; CHECK-P9-NEXT: blr406;407; CHECK-BE-LABEL: test2elt_signed:408; CHECK-BE: # %bb.0: # %entry409; CHECK-BE-NEXT: mtvsrwz v2, r3410; CHECK-BE-NEXT: addis r3, r2, .LCPI4_0@toc@ha411; CHECK-BE-NEXT: addi r3, r3, .LCPI4_0@toc@l412; CHECK-BE-NEXT: lxv vs0, 0(r3)413; CHECK-BE-NEXT: xxperm v2, v2, vs0414; CHECK-BE-NEXT: vextsh2d v2, v2415; CHECK-BE-NEXT: xvcvsxddp v2, v2416; CHECK-BE-NEXT: blr417entry:418 %0 = bitcast i32 %a.coerce to <2 x i16>419 %1 = sitofp <2 x i16> %0 to <2 x double>420 ret <2 x double> %1421}422 423define void @test4elt_signed(ptr noalias nocapture sret(<4 x double>) %agg.result, i64 %a.coerce) local_unnamed_addr #1 {424; CHECK-P8-LABEL: test4elt_signed:425; CHECK-P8: # %bb.0: # %entry426; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha427; CHECK-P8-NEXT: mtvsrd v4, r4428; CHECK-P8-NEXT: addis r4, r2, .LCPI5_1@toc@ha429; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l430; CHECK-P8-NEXT: addi r4, r4, .LCPI5_1@toc@l431; CHECK-P8-NEXT: lxvd2x vs0, 0, r5432; CHECK-P8-NEXT: addis r5, r2, .LCPI5_2@toc@ha433; CHECK-P8-NEXT: addi r5, r5, .LCPI5_2@toc@l434; CHECK-P8-NEXT: lxvd2x vs1, 0, r5435; CHECK-P8-NEXT: xxswapd v2, vs0436; CHECK-P8-NEXT: vperm v2, v4, v4, v2437; CHECK-P8-NEXT: xxswapd v3, vs1438; CHECK-P8-NEXT: vperm v3, v4, v4, v3439; CHECK-P8-NEXT: lxvd2x v4, 0, r4440; CHECK-P8-NEXT: li r4, 16441; CHECK-P8-NEXT: vsld v2, v2, v4442; CHECK-P8-NEXT: vsrad v2, v2, v4443; CHECK-P8-NEXT: xvcvsxddp vs0, v2444; CHECK-P8-NEXT: vsld v2, v3, v4445; CHECK-P8-NEXT: vsrad v2, v2, v4446; CHECK-P8-NEXT: xvcvsxddp vs1, v2447; CHECK-P8-NEXT: xxswapd vs0, vs0448; CHECK-P8-NEXT: stxvd2x vs0, 0, r3449; CHECK-P8-NEXT: xxswapd vs1, vs1450; CHECK-P8-NEXT: stxvd2x vs1, r3, r4451; CHECK-P8-NEXT: blr452;453; CHECK-P9-LABEL: test4elt_signed:454; CHECK-P9: # %bb.0: # %entry455; CHECK-P9-NEXT: mtvsrd v2, r4456; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0@toc@ha457; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0@toc@l458; CHECK-P9-NEXT: lxv v3, 0(r4)459; CHECK-P9-NEXT: addis r4, r2, .LCPI5_1@toc@ha460; CHECK-P9-NEXT: addi r4, r4, .LCPI5_1@toc@l461; CHECK-P9-NEXT: vperm v3, v2, v2, v3462; CHECK-P9-NEXT: vextsh2d v3, v3463; CHECK-P9-NEXT: xvcvsxddp vs0, v3464; CHECK-P9-NEXT: lxv v3, 0(r4)465; CHECK-P9-NEXT: vperm v2, v2, v2, v3466; CHECK-P9-NEXT: stxv vs0, 0(r3)467; CHECK-P9-NEXT: vextsh2d v2, v2468; CHECK-P9-NEXT: xvcvsxddp vs1, v2469; CHECK-P9-NEXT: stxv vs1, 16(r3)470; CHECK-P9-NEXT: blr471;472; CHECK-BE-LABEL: test4elt_signed:473; CHECK-BE: # %bb.0: # %entry474; CHECK-BE-NEXT: mtvsrd v2, r4475; CHECK-BE-NEXT: addis r4, r2, .LCPI5_0@toc@ha476; CHECK-BE-NEXT: addi r4, r4, .LCPI5_0@toc@l477; CHECK-BE-NEXT: lxv v3, 0(r4)478; CHECK-BE-NEXT: addis r4, r2, .LCPI5_1@toc@ha479; CHECK-BE-NEXT: addi r4, r4, .LCPI5_1@toc@l480; CHECK-BE-NEXT: vperm v3, v2, v2, v3481; CHECK-BE-NEXT: vextsh2d v3, v3482; CHECK-BE-NEXT: xvcvsxddp vs0, v3483; CHECK-BE-NEXT: lxv v3, 0(r4)484; CHECK-BE-NEXT: vperm v2, v2, v2, v3485; CHECK-BE-NEXT: stxv vs0, 0(r3)486; CHECK-BE-NEXT: vextsh2d v2, v2487; CHECK-BE-NEXT: xvcvsxddp vs1, v2488; CHECK-BE-NEXT: stxv vs1, 16(r3)489; CHECK-BE-NEXT: blr490entry:491 %0 = bitcast i64 %a.coerce to <4 x i16>492 %1 = sitofp <4 x i16> %0 to <4 x double>493 store <4 x double> %1, ptr %agg.result, align 32494 ret void495}496 497define void @test8elt_signed(ptr noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {498; CHECK-P8-LABEL: test8elt_signed:499; CHECK-P8: # %bb.0: # %entry500; CHECK-P8-NEXT: addis r4, r2, .LCPI6_0@toc@ha501; CHECK-P8-NEXT: addi r4, r4, .LCPI6_0@toc@l502; CHECK-P8-NEXT: lxvd2x vs0, 0, r4503; CHECK-P8-NEXT: addis r4, r2, .LCPI6_2@toc@ha504; CHECK-P8-NEXT: addi r4, r4, .LCPI6_2@toc@l505; CHECK-P8-NEXT: lxvd2x vs1, 0, r4506; CHECK-P8-NEXT: addis r4, r2, .LCPI6_4@toc@ha507; CHECK-P8-NEXT: addi r4, r4, .LCPI6_4@toc@l508; CHECK-P8-NEXT: lxvd2x vs2, 0, r4509; CHECK-P8-NEXT: addis r4, r2, .LCPI6_3@toc@ha510; CHECK-P8-NEXT: addi r4, r4, .LCPI6_3@toc@l511; CHECK-P8-NEXT: xxswapd v4, vs0512; CHECK-P8-NEXT: vperm v4, v2, v2, v4513; CHECK-P8-NEXT: xxswapd v5, vs1514; CHECK-P8-NEXT: vperm v5, v2, v2, v5515; CHECK-P8-NEXT: xxswapd v3, vs2516; CHECK-P8-NEXT: lxvd2x vs2, 0, r4517; CHECK-P8-NEXT: addis r4, r2, .LCPI6_1@toc@ha518; CHECK-P8-NEXT: addi r4, r4, .LCPI6_1@toc@l519; CHECK-P8-NEXT: vperm v3, v2, v2, v3520; CHECK-P8-NEXT: xxswapd v0, vs2521; CHECK-P8-NEXT: vperm v2, v2, v2, v0522; CHECK-P8-NEXT: lxvd2x v0, 0, r4523; CHECK-P8-NEXT: li r4, 48524; CHECK-P8-NEXT: vsld v3, v3, v0525; CHECK-P8-NEXT: vsld v2, v2, v0526; CHECK-P8-NEXT: vsld v4, v4, v0527; CHECK-P8-NEXT: vsld v5, v5, v0528; CHECK-P8-NEXT: vsrad v3, v3, v0529; CHECK-P8-NEXT: vsrad v2, v2, v0530; CHECK-P8-NEXT: vsrad v4, v4, v0531; CHECK-P8-NEXT: vsrad v5, v5, v0532; CHECK-P8-NEXT: xvcvsxddp vs2, v3533; CHECK-P8-NEXT: xvcvsxddp vs3, v2534; CHECK-P8-NEXT: xvcvsxddp vs0, v4535; CHECK-P8-NEXT: xvcvsxddp vs1, v5536; CHECK-P8-NEXT: xxswapd vs2, vs2537; CHECK-P8-NEXT: xxswapd vs3, vs3538; CHECK-P8-NEXT: xxswapd vs1, vs1539; CHECK-P8-NEXT: xxswapd vs0, vs0540; CHECK-P8-NEXT: stxvd2x vs2, r3, r4541; CHECK-P8-NEXT: li r4, 32542; CHECK-P8-NEXT: stxvd2x vs0, 0, r3543; CHECK-P8-NEXT: stxvd2x vs3, r3, r4544; CHECK-P8-NEXT: li r4, 16545; CHECK-P8-NEXT: stxvd2x vs1, r3, r4546; CHECK-P8-NEXT: blr547;548; CHECK-P9-LABEL: test8elt_signed:549; CHECK-P9: # %bb.0: # %entry550; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha551; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l552; CHECK-P9-NEXT: lxv v3, 0(r4)553; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1@toc@ha554; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1@toc@l555; CHECK-P9-NEXT: vperm v3, v2, v2, v3556; CHECK-P9-NEXT: vextsh2d v3, v3557; CHECK-P9-NEXT: xvcvsxddp vs0, v3558; CHECK-P9-NEXT: lxv v3, 0(r4)559; CHECK-P9-NEXT: addis r4, r2, .LCPI6_2@toc@ha560; CHECK-P9-NEXT: addi r4, r4, .LCPI6_2@toc@l561; CHECK-P9-NEXT: vperm v3, v2, v2, v3562; CHECK-P9-NEXT: stxv vs0, 0(r3)563; CHECK-P9-NEXT: vextsh2d v3, v3564; CHECK-P9-NEXT: xvcvsxddp vs1, v3565; CHECK-P9-NEXT: lxv v3, 0(r4)566; CHECK-P9-NEXT: addis r4, r2, .LCPI6_3@toc@ha567; CHECK-P9-NEXT: addi r4, r4, .LCPI6_3@toc@l568; CHECK-P9-NEXT: vperm v3, v2, v2, v3569; CHECK-P9-NEXT: stxv vs1, 16(r3)570; CHECK-P9-NEXT: vextsh2d v3, v3571; CHECK-P9-NEXT: xvcvsxddp vs2, v3572; CHECK-P9-NEXT: lxv v3, 0(r4)573; CHECK-P9-NEXT: vperm v2, v2, v2, v3574; CHECK-P9-NEXT: stxv vs2, 32(r3)575; CHECK-P9-NEXT: vextsh2d v2, v2576; CHECK-P9-NEXT: xvcvsxddp vs3, v2577; CHECK-P9-NEXT: stxv vs3, 48(r3)578; CHECK-P9-NEXT: blr579;580; CHECK-BE-LABEL: test8elt_signed:581; CHECK-BE: # %bb.0: # %entry582; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha583; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l584; CHECK-BE-NEXT: lxv v3, 0(r4)585; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1@toc@ha586; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1@toc@l587; CHECK-BE-NEXT: vperm v3, v2, v2, v3588; CHECK-BE-NEXT: vextsh2d v3, v3589; CHECK-BE-NEXT: xvcvsxddp vs0, v3590; CHECK-BE-NEXT: lxv v3, 0(r4)591; CHECK-BE-NEXT: addis r4, r2, .LCPI6_2@toc@ha592; CHECK-BE-NEXT: addi r4, r4, .LCPI6_2@toc@l593; CHECK-BE-NEXT: vperm v3, v2, v2, v3594; CHECK-BE-NEXT: stxv vs0, 0(r3)595; CHECK-BE-NEXT: vextsh2d v3, v3596; CHECK-BE-NEXT: xvcvsxddp vs1, v3597; CHECK-BE-NEXT: lxv v3, 0(r4)598; CHECK-BE-NEXT: addis r4, r2, .LCPI6_3@toc@ha599; CHECK-BE-NEXT: addi r4, r4, .LCPI6_3@toc@l600; CHECK-BE-NEXT: vperm v3, v2, v2, v3601; CHECK-BE-NEXT: stxv vs1, 16(r3)602; CHECK-BE-NEXT: vextsh2d v3, v3603; CHECK-BE-NEXT: xvcvsxddp vs2, v3604; CHECK-BE-NEXT: lxv v3, 0(r4)605; CHECK-BE-NEXT: vperm v2, v2, v2, v3606; CHECK-BE-NEXT: stxv vs2, 32(r3)607; CHECK-BE-NEXT: vextsh2d v2, v2608; CHECK-BE-NEXT: xvcvsxddp vs3, v2609; CHECK-BE-NEXT: stxv vs3, 48(r3)610; CHECK-BE-NEXT: blr611entry:612 %0 = sitofp <8 x i16> %a to <8 x double>613 store <8 x double> %0, ptr %agg.result, align 64614 ret void615}616 617define void @test16elt_signed(ptr noalias nocapture sret(<16 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #3 {618; CHECK-P8-LABEL: test16elt_signed:619; CHECK-P8: # %bb.0: # %entry620; CHECK-P8-NEXT: li r5, 16621; CHECK-P8-NEXT: lxvd2x vs1, 0, r4622; CHECK-P8-NEXT: lxvd2x vs0, r4, r5623; CHECK-P8-NEXT: addis r4, r2, .LCPI7_2@toc@ha624; CHECK-P8-NEXT: addi r4, r4, .LCPI7_2@toc@l625; CHECK-P8-NEXT: lxvd2x vs2, 0, r4626; CHECK-P8-NEXT: addis r4, r2, .LCPI7_4@toc@ha627; CHECK-P8-NEXT: addi r4, r4, .LCPI7_4@toc@l628; CHECK-P8-NEXT: lxvd2x vs3, 0, r4629; CHECK-P8-NEXT: addis r4, r2, .LCPI7_3@toc@ha630; CHECK-P8-NEXT: addi r4, r4, .LCPI7_3@toc@l631; CHECK-P8-NEXT: xxswapd v1, vs1632; CHECK-P8-NEXT: xxswapd v2, vs0633; CHECK-P8-NEXT: lxvd2x vs0, 0, r4634; CHECK-P8-NEXT: addis r4, r2, .LCPI7_0@toc@ha635; CHECK-P8-NEXT: addi r4, r4, .LCPI7_0@toc@l636; CHECK-P8-NEXT: xxswapd v5, vs2637; CHECK-P8-NEXT: vperm v8, v2, v2, v5638; CHECK-P8-NEXT: vperm v5, v1, v1, v5639; CHECK-P8-NEXT: xxswapd v3, vs3640; CHECK-P8-NEXT: vperm v0, v2, v2, v3641; CHECK-P8-NEXT: vperm v3, v1, v1, v3642; CHECK-P8-NEXT: xxswapd v4, vs0643; CHECK-P8-NEXT: lxvd2x vs0, 0, r4644; CHECK-P8-NEXT: addis r4, r2, .LCPI7_1@toc@ha645; CHECK-P8-NEXT: addi r4, r4, .LCPI7_1@toc@l646; CHECK-P8-NEXT: vperm v7, v2, v2, v4647; CHECK-P8-NEXT: vperm v4, v1, v1, v4648; CHECK-P8-NEXT: xxswapd v6, vs0649; CHECK-P8-NEXT: vperm v2, v2, v2, v6650; CHECK-P8-NEXT: vperm v6, v1, v1, v6651; CHECK-P8-NEXT: lxvd2x v1, 0, r4652; CHECK-P8-NEXT: li r4, 112653; CHECK-P8-NEXT: vsld v0, v0, v1654; CHECK-P8-NEXT: vsld v7, v7, v1655; CHECK-P8-NEXT: vsld v8, v8, v1656; CHECK-P8-NEXT: vsld v2, v2, v1657; CHECK-P8-NEXT: vsld v3, v3, v1658; CHECK-P8-NEXT: vsld v6, v6, v1659; CHECK-P8-NEXT: vsld v5, v5, v1660; CHECK-P8-NEXT: vsld v4, v4, v1661; CHECK-P8-NEXT: vsrad v0, v0, v1662; CHECK-P8-NEXT: vsrad v7, v7, v1663; CHECK-P8-NEXT: vsrad v8, v8, v1664; CHECK-P8-NEXT: vsrad v2, v2, v1665; CHECK-P8-NEXT: vsrad v3, v3, v1666; CHECK-P8-NEXT: vsrad v6, v6, v1667; CHECK-P8-NEXT: vsrad v5, v5, v1668; CHECK-P8-NEXT: vsrad v4, v4, v1669; CHECK-P8-NEXT: xvcvsxddp vs4, v0670; CHECK-P8-NEXT: xvcvsxddp vs7, v7671; CHECK-P8-NEXT: xvcvsxddp vs6, v8672; CHECK-P8-NEXT: xvcvsxddp vs5, v2673; CHECK-P8-NEXT: xvcvsxddp vs3, v3674; CHECK-P8-NEXT: xvcvsxddp vs0, v6675; CHECK-P8-NEXT: xvcvsxddp vs1, v5676; CHECK-P8-NEXT: xvcvsxddp vs2, v4677; CHECK-P8-NEXT: xxswapd vs4, vs4678; CHECK-P8-NEXT: xxswapd vs7, vs7679; CHECK-P8-NEXT: xxswapd vs5, vs5680; CHECK-P8-NEXT: xxswapd vs3, vs3681; CHECK-P8-NEXT: xxswapd vs2, vs2682; CHECK-P8-NEXT: xxswapd vs1, vs1683; CHECK-P8-NEXT: xxswapd vs0, vs0684; CHECK-P8-NEXT: stxvd2x vs4, r3, r4685; CHECK-P8-NEXT: li r4, 96686; CHECK-P8-NEXT: xxswapd vs4, vs6687; CHECK-P8-NEXT: stxvd2x vs1, r3, r5688; CHECK-P8-NEXT: stxvd2x vs0, 0, r3689; CHECK-P8-NEXT: stxvd2x vs7, r3, r4690; CHECK-P8-NEXT: li r4, 80691; CHECK-P8-NEXT: stxvd2x vs4, r3, r4692; CHECK-P8-NEXT: li r4, 64693; CHECK-P8-NEXT: stxvd2x vs5, r3, r4694; CHECK-P8-NEXT: li r4, 48695; CHECK-P8-NEXT: stxvd2x vs3, r3, r4696; CHECK-P8-NEXT: li r4, 32697; CHECK-P8-NEXT: stxvd2x vs2, r3, r4698; CHECK-P8-NEXT: blr699;700; CHECK-P9-LABEL: test16elt_signed:701; CHECK-P9: # %bb.0: # %entry702; CHECK-P9-NEXT: addis r5, r2, .LCPI7_0@toc@ha703; CHECK-P9-NEXT: lxv v2, 0(r4)704; CHECK-P9-NEXT: addi r5, r5, .LCPI7_0@toc@l705; CHECK-P9-NEXT: lxv v3, 0(r5)706; CHECK-P9-NEXT: addis r5, r2, .LCPI7_1@toc@ha707; CHECK-P9-NEXT: addi r5, r5, .LCPI7_1@toc@l708; CHECK-P9-NEXT: lxv v5, 0(r5)709; CHECK-P9-NEXT: addis r5, r2, .LCPI7_2@toc@ha710; CHECK-P9-NEXT: vperm v4, v2, v2, v3711; CHECK-P9-NEXT: addi r5, r5, .LCPI7_2@toc@l712; CHECK-P9-NEXT: vextsh2d v4, v4713; CHECK-P9-NEXT: lxv v0, 0(r5)714; CHECK-P9-NEXT: addis r5, r2, .LCPI7_3@toc@ha715; CHECK-P9-NEXT: xvcvsxddp vs0, v4716; CHECK-P9-NEXT: vperm v4, v2, v2, v5717; CHECK-P9-NEXT: addi r5, r5, .LCPI7_3@toc@l718; CHECK-P9-NEXT: lxv v1, 0(r5)719; CHECK-P9-NEXT: vextsh2d v4, v4720; CHECK-P9-NEXT: xvcvsxddp vs1, v4721; CHECK-P9-NEXT: vperm v4, v2, v2, v0722; CHECK-P9-NEXT: vperm v2, v2, v2, v1723; CHECK-P9-NEXT: stxv vs0, 0(r3)724; CHECK-P9-NEXT: vextsh2d v4, v4725; CHECK-P9-NEXT: xvcvsxddp vs2, v4726; CHECK-P9-NEXT: lxv v4, 16(r4)727; CHECK-P9-NEXT: stxv vs1, 16(r3)728; CHECK-P9-NEXT: vextsh2d v2, v2729; CHECK-P9-NEXT: xvcvsxddp vs3, v2730; CHECK-P9-NEXT: vperm v2, v4, v4, v3731; CHECK-P9-NEXT: stxv vs2, 32(r3)732; CHECK-P9-NEXT: vextsh2d v2, v2733; CHECK-P9-NEXT: stxv vs3, 48(r3)734; CHECK-P9-NEXT: xvcvsxddp vs4, v2735; CHECK-P9-NEXT: vperm v2, v4, v4, v5736; CHECK-P9-NEXT: vextsh2d v2, v2737; CHECK-P9-NEXT: xvcvsxddp vs5, v2738; CHECK-P9-NEXT: vperm v2, v4, v4, v0739; CHECK-P9-NEXT: stxv vs4, 64(r3)740; CHECK-P9-NEXT: vextsh2d v2, v2741; CHECK-P9-NEXT: xvcvsxddp vs6, v2742; CHECK-P9-NEXT: vperm v2, v4, v4, v1743; CHECK-P9-NEXT: stxv vs5, 80(r3)744; CHECK-P9-NEXT: vextsh2d v2, v2745; CHECK-P9-NEXT: xvcvsxddp vs7, v2746; CHECK-P9-NEXT: stxv vs6, 96(r3)747; CHECK-P9-NEXT: stxv vs7, 112(r3)748; CHECK-P9-NEXT: blr749;750; CHECK-BE-LABEL: test16elt_signed:751; CHECK-BE: # %bb.0: # %entry752; CHECK-BE-NEXT: addis r5, r2, .LCPI7_0@toc@ha753; CHECK-BE-NEXT: lxv v2, 0(r4)754; CHECK-BE-NEXT: addi r5, r5, .LCPI7_0@toc@l755; CHECK-BE-NEXT: lxv v3, 0(r5)756; CHECK-BE-NEXT: addis r5, r2, .LCPI7_1@toc@ha757; CHECK-BE-NEXT: addi r5, r5, .LCPI7_1@toc@l758; CHECK-BE-NEXT: lxv v5, 0(r5)759; CHECK-BE-NEXT: addis r5, r2, .LCPI7_2@toc@ha760; CHECK-BE-NEXT: vperm v4, v2, v2, v3761; CHECK-BE-NEXT: addi r5, r5, .LCPI7_2@toc@l762; CHECK-BE-NEXT: vextsh2d v4, v4763; CHECK-BE-NEXT: lxv v0, 0(r5)764; CHECK-BE-NEXT: addis r5, r2, .LCPI7_3@toc@ha765; CHECK-BE-NEXT: xvcvsxddp vs0, v4766; CHECK-BE-NEXT: vperm v4, v2, v2, v5767; CHECK-BE-NEXT: addi r5, r5, .LCPI7_3@toc@l768; CHECK-BE-NEXT: lxv v1, 0(r5)769; CHECK-BE-NEXT: vextsh2d v4, v4770; CHECK-BE-NEXT: xvcvsxddp vs1, v4771; CHECK-BE-NEXT: vperm v4, v2, v2, v0772; CHECK-BE-NEXT: vperm v2, v2, v2, v1773; CHECK-BE-NEXT: stxv vs0, 0(r3)774; CHECK-BE-NEXT: vextsh2d v4, v4775; CHECK-BE-NEXT: xvcvsxddp vs2, v4776; CHECK-BE-NEXT: lxv v4, 16(r4)777; CHECK-BE-NEXT: stxv vs1, 16(r3)778; CHECK-BE-NEXT: vextsh2d v2, v2779; CHECK-BE-NEXT: xvcvsxddp vs3, v2780; CHECK-BE-NEXT: vperm v2, v4, v4, v3781; CHECK-BE-NEXT: stxv vs2, 32(r3)782; CHECK-BE-NEXT: vextsh2d v2, v2783; CHECK-BE-NEXT: stxv vs3, 48(r3)784; CHECK-BE-NEXT: xvcvsxddp vs4, v2785; CHECK-BE-NEXT: vperm v2, v4, v4, v5786; CHECK-BE-NEXT: vextsh2d v2, v2787; CHECK-BE-NEXT: xvcvsxddp vs5, v2788; CHECK-BE-NEXT: vperm v2, v4, v4, v0789; CHECK-BE-NEXT: stxv vs4, 64(r3)790; CHECK-BE-NEXT: vextsh2d v2, v2791; CHECK-BE-NEXT: xvcvsxddp vs6, v2792; CHECK-BE-NEXT: vperm v2, v4, v4, v1793; CHECK-BE-NEXT: stxv vs5, 80(r3)794; CHECK-BE-NEXT: vextsh2d v2, v2795; CHECK-BE-NEXT: xvcvsxddp vs7, v2796; CHECK-BE-NEXT: stxv vs6, 96(r3)797; CHECK-BE-NEXT: stxv vs7, 112(r3)798; CHECK-BE-NEXT: blr799entry:800 %a = load <16 x i16>, ptr %0, align 32801 %1 = sitofp <16 x i16> %a to <16 x double>802 store <16 x double> %1, ptr %agg.result, align 128803 ret void804}805