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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-P85; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-P98; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-BE11 12define <2 x double> @test2elt(i64 %a.coerce) local_unnamed_addr #0 {13; CHECK-P8-LABEL: test2elt:14; CHECK-P8: # %bb.0: # %entry15; CHECK-P8-NEXT: mtfprd f0, r316; CHECK-P8-NEXT: xxswapd v2, vs017; CHECK-P8-NEXT: xxmrglw v2, v2, v218; CHECK-P8-NEXT: xvcvuxwdp v2, v219; CHECK-P8-NEXT: blr20;21; CHECK-P9-LABEL: test2elt:22; CHECK-P9: # %bb.0: # %entry23; CHECK-P9-NEXT: mtfprd f0, r324; CHECK-P9-NEXT: xxswapd v2, vs025; CHECK-P9-NEXT: xxmrglw v2, v2, v226; CHECK-P9-NEXT: xvcvuxwdp v2, v227; CHECK-P9-NEXT: blr28;29; CHECK-BE-LABEL: test2elt:30; CHECK-BE: # %bb.0: # %entry31; CHECK-BE-NEXT: mtfprd f0, r332; CHECK-BE-NEXT: xxmrghw v2, vs0, vs033; CHECK-BE-NEXT: xvcvuxwdp v2, v234; CHECK-BE-NEXT: blr35entry:36 %0 = bitcast i64 %a.coerce to <2 x i32>37 %1 = uitofp <2 x i32> %0 to <2 x double>38 ret <2 x double> %139}40 41define void @test4elt(ptr noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {42; CHECK-P8-LABEL: test4elt:43; CHECK-P8: # %bb.0: # %entry44; CHECK-P8-NEXT: xxmrglw v3, v2, v245; CHECK-P8-NEXT: xxmrghw v2, v2, v246; CHECK-P8-NEXT: li r4, 1647; CHECK-P8-NEXT: xvcvuxwdp vs0, v348; CHECK-P8-NEXT: xvcvuxwdp vs1, v249; CHECK-P8-NEXT: xxswapd vs1, vs150; CHECK-P8-NEXT: xxswapd vs0, vs051; CHECK-P8-NEXT: stxvd2x vs1, r3, r452; CHECK-P8-NEXT: stxvd2x vs0, 0, r353; CHECK-P8-NEXT: blr54;55; CHECK-P9-LABEL: test4elt:56; CHECK-P9: # %bb.0: # %entry57; CHECK-P9-NEXT: xxmrglw v3, v2, v258; CHECK-P9-NEXT: xxmrghw v2, v2, v259; CHECK-P9-NEXT: xvcvuxwdp vs0, v360; CHECK-P9-NEXT: xvcvuxwdp vs1, v261; CHECK-P9-NEXT: stxv vs1, 16(r3)62; CHECK-P9-NEXT: stxv vs0, 0(r3)63; CHECK-P9-NEXT: blr64;65; CHECK-BE-LABEL: test4elt:66; CHECK-BE: # %bb.0: # %entry67; CHECK-BE-NEXT: xxmrghw v3, v2, v268; CHECK-BE-NEXT: xxmrglw v2, v2, v269; CHECK-BE-NEXT: xvcvuxwdp vs0, v370; CHECK-BE-NEXT: xvcvuxwdp vs1, v271; CHECK-BE-NEXT: stxv vs1, 16(r3)72; CHECK-BE-NEXT: stxv vs0, 0(r3)73; CHECK-BE-NEXT: blr74entry:75 %0 = uitofp <4 x i32> %a to <4 x double>76 store <4 x double> %0, ptr %agg.result, align 3277 ret void78}79 80define void @test8elt(ptr noalias nocapture sret(<8 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {81; CHECK-P8-LABEL: test8elt:82; CHECK-P8: # %bb.0: # %entry83; CHECK-P8-NEXT: li r5, 1684; CHECK-P8-NEXT: lxvd2x vs0, r4, r585; CHECK-P8-NEXT: xxswapd v2, vs086; CHECK-P8-NEXT: lxvd2x vs0, 0, r487; CHECK-P8-NEXT: li r4, 4888; CHECK-P8-NEXT: xxmrghw v4, v2, v289; CHECK-P8-NEXT: xxmrglw v2, v2, v290; CHECK-P8-NEXT: xvcvuxwdp vs1, v491; CHECK-P8-NEXT: xxswapd v3, vs092; CHECK-P8-NEXT: xvcvuxwdp vs0, v293; CHECK-P8-NEXT: xxmrglw v5, v3, v394; CHECK-P8-NEXT: xxmrghw v3, v3, v395; CHECK-P8-NEXT: xvcvuxwdp vs2, v596; CHECK-P8-NEXT: xvcvuxwdp vs3, v397; CHECK-P8-NEXT: xxswapd vs1, vs198; CHECK-P8-NEXT: stxvd2x vs1, r3, r499; CHECK-P8-NEXT: li r4, 32100; CHECK-P8-NEXT: xxswapd vs0, vs0101; CHECK-P8-NEXT: stxvd2x vs0, r3, r4102; CHECK-P8-NEXT: xxswapd vs3, vs3103; CHECK-P8-NEXT: xxswapd vs2, vs2104; CHECK-P8-NEXT: stxvd2x vs3, r3, r5105; CHECK-P8-NEXT: stxvd2x vs2, 0, r3106; CHECK-P8-NEXT: blr107;108; CHECK-P9-LABEL: test8elt:109; CHECK-P9: # %bb.0: # %entry110; CHECK-P9-NEXT: lxv vs1, 0(r4)111; CHECK-P9-NEXT: lxv vs0, 16(r4)112; CHECK-P9-NEXT: xxmrglw v2, vs1, vs1113; CHECK-P9-NEXT: xvcvuxwdp vs2, v2114; CHECK-P9-NEXT: xxmrghw v2, vs1, vs1115; CHECK-P9-NEXT: xvcvuxwdp vs1, v2116; CHECK-P9-NEXT: xxmrglw v2, vs0, vs0117; CHECK-P9-NEXT: xvcvuxwdp vs3, v2118; CHECK-P9-NEXT: xxmrghw v2, vs0, vs0119; CHECK-P9-NEXT: stxv vs2, 0(r3)120; CHECK-P9-NEXT: xvcvuxwdp vs0, v2121; CHECK-P9-NEXT: stxv vs1, 16(r3)122; CHECK-P9-NEXT: stxv vs3, 32(r3)123; CHECK-P9-NEXT: stxv vs0, 48(r3)124; CHECK-P9-NEXT: blr125;126; CHECK-BE-LABEL: test8elt:127; CHECK-BE: # %bb.0: # %entry128; CHECK-BE-NEXT: lxv vs1, 0(r4)129; CHECK-BE-NEXT: lxv vs0, 16(r4)130; CHECK-BE-NEXT: xxmrghw v2, vs1, vs1131; CHECK-BE-NEXT: xvcvuxwdp vs2, v2132; CHECK-BE-NEXT: xxmrglw v2, vs1, vs1133; CHECK-BE-NEXT: xvcvuxwdp vs1, v2134; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0135; CHECK-BE-NEXT: xvcvuxwdp vs3, v2136; CHECK-BE-NEXT: xxmrglw v2, vs0, vs0137; CHECK-BE-NEXT: stxv vs2, 0(r3)138; CHECK-BE-NEXT: xvcvuxwdp vs0, v2139; CHECK-BE-NEXT: stxv vs1, 16(r3)140; CHECK-BE-NEXT: stxv vs3, 32(r3)141; CHECK-BE-NEXT: stxv vs0, 48(r3)142; CHECK-BE-NEXT: blr143entry:144 %a = load <8 x i32>, ptr %0, align 32145 %1 = uitofp <8 x i32> %a to <8 x double>146 store <8 x double> %1, ptr %agg.result, align 64147 ret void148}149 150define void @test16elt(ptr noalias nocapture sret(<16 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {151; CHECK-P8-LABEL: test16elt:152; CHECK-P8: # %bb.0: # %entry153; CHECK-P8-NEXT: li r5, 48154; CHECK-P8-NEXT: li r6, 32155; CHECK-P8-NEXT: li r7, 16156; CHECK-P8-NEXT: lxvd2x vs1, 0, r4157; CHECK-P8-NEXT: lxvd2x vs0, r4, r5158; CHECK-P8-NEXT: xxswapd v0, vs1159; CHECK-P8-NEXT: xxswapd v2, vs0160; CHECK-P8-NEXT: lxvd2x vs0, r4, r6161; CHECK-P8-NEXT: xxmrglw v7, v0, v0162; CHECK-P8-NEXT: xxmrghw v0, v0, v0163; CHECK-P8-NEXT: xvcvuxwdp vs6, v7164; CHECK-P8-NEXT: xvcvuxwdp vs7, v0165; CHECK-P8-NEXT: xxmrghw v3, v2, v2166; CHECK-P8-NEXT: xxmrglw v2, v2, v2167; CHECK-P8-NEXT: xvcvuxwdp vs2, v3168; CHECK-P8-NEXT: xvcvuxwdp vs5, v2169; CHECK-P8-NEXT: xxswapd v4, vs0170; CHECK-P8-NEXT: lxvd2x vs0, r4, r7171; CHECK-P8-NEXT: li r4, 112172; CHECK-P8-NEXT: xxmrglw v1, v4, v4173; CHECK-P8-NEXT: xxmrghw v4, v4, v4174; CHECK-P8-NEXT: xvcvuxwdp vs4, v4175; CHECK-P8-NEXT: xvcvuxwdp vs3, v1176; CHECK-P8-NEXT: xxswapd v5, vs0177; CHECK-P8-NEXT: xxswapd vs2, vs2178; CHECK-P8-NEXT: xxswapd vs5, vs5179; CHECK-P8-NEXT: stxvd2x vs2, r3, r4180; CHECK-P8-NEXT: li r4, 96181; CHECK-P8-NEXT: stxvd2x vs5, r3, r4182; CHECK-P8-NEXT: li r4, 80183; CHECK-P8-NEXT: xxmrglw v6, v5, v5184; CHECK-P8-NEXT: xxmrghw v5, v5, v5185; CHECK-P8-NEXT: xvcvuxwdp vs0, v6186; CHECK-P8-NEXT: xvcvuxwdp vs1, v5187; CHECK-P8-NEXT: xxswapd vs5, vs6188; CHECK-P8-NEXT: stxvd2x vs5, 0, r3189; CHECK-P8-NEXT: xxswapd vs2, vs4190; CHECK-P8-NEXT: xxswapd vs3, vs3191; CHECK-P8-NEXT: xxswapd vs4, vs7192; CHECK-P8-NEXT: stxvd2x vs2, r3, r4193; CHECK-P8-NEXT: li r4, 64194; CHECK-P8-NEXT: stxvd2x vs4, r3, r7195; CHECK-P8-NEXT: stxvd2x vs3, r3, r4196; CHECK-P8-NEXT: xxswapd vs1, vs1197; CHECK-P8-NEXT: xxswapd vs0, vs0198; CHECK-P8-NEXT: stxvd2x vs1, r3, r5199; CHECK-P8-NEXT: stxvd2x vs0, r3, r6200; CHECK-P8-NEXT: blr201;202; CHECK-P9-LABEL: test16elt:203; CHECK-P9: # %bb.0: # %entry204; CHECK-P9-NEXT: lxv vs0, 0(r4)205; CHECK-P9-NEXT: lxv vs2, 16(r4)206; CHECK-P9-NEXT: lxv vs5, 32(r4)207; CHECK-P9-NEXT: lxv vs4, 48(r4)208; CHECK-P9-NEXT: xxmrglw v2, vs0, vs0209; CHECK-P9-NEXT: xvcvuxwdp vs1, v2210; CHECK-P9-NEXT: xxmrghw v2, vs0, vs0211; CHECK-P9-NEXT: xvcvuxwdp vs0, v2212; CHECK-P9-NEXT: xxmrglw v2, vs2, vs2213; CHECK-P9-NEXT: xvcvuxwdp vs3, v2214; CHECK-P9-NEXT: xxmrghw v2, vs2, vs2215; CHECK-P9-NEXT: stxv vs1, 0(r3)216; CHECK-P9-NEXT: stxv vs0, 16(r3)217; CHECK-P9-NEXT: xvcvuxwdp vs2, v2218; CHECK-P9-NEXT: xxmrglw v2, vs5, vs5219; CHECK-P9-NEXT: xvcvuxwdp vs6, v2220; CHECK-P9-NEXT: xxmrghw v2, vs5, vs5221; CHECK-P9-NEXT: stxv vs3, 32(r3)222; CHECK-P9-NEXT: stxv vs2, 48(r3)223; CHECK-P9-NEXT: xvcvuxwdp vs5, v2224; CHECK-P9-NEXT: xxmrglw v2, vs4, vs4225; CHECK-P9-NEXT: xvcvuxwdp vs7, v2226; CHECK-P9-NEXT: xxmrghw v2, vs4, vs4227; CHECK-P9-NEXT: stxv vs6, 64(r3)228; CHECK-P9-NEXT: stxv vs5, 80(r3)229; CHECK-P9-NEXT: xvcvuxwdp vs4, v2230; CHECK-P9-NEXT: stxv vs7, 96(r3)231; CHECK-P9-NEXT: stxv vs4, 112(r3)232; CHECK-P9-NEXT: blr233;234; CHECK-BE-LABEL: test16elt:235; CHECK-BE: # %bb.0: # %entry236; CHECK-BE-NEXT: lxv vs0, 0(r4)237; CHECK-BE-NEXT: lxv vs2, 16(r4)238; CHECK-BE-NEXT: lxv vs5, 32(r4)239; CHECK-BE-NEXT: lxv vs4, 48(r4)240; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0241; CHECK-BE-NEXT: xvcvuxwdp vs1, v2242; CHECK-BE-NEXT: xxmrglw v2, vs0, vs0243; CHECK-BE-NEXT: xvcvuxwdp vs0, v2244; CHECK-BE-NEXT: xxmrghw v2, vs2, vs2245; CHECK-BE-NEXT: xvcvuxwdp vs3, v2246; CHECK-BE-NEXT: xxmrglw v2, vs2, vs2247; CHECK-BE-NEXT: stxv vs1, 0(r3)248; CHECK-BE-NEXT: stxv vs0, 16(r3)249; CHECK-BE-NEXT: xvcvuxwdp vs2, v2250; CHECK-BE-NEXT: xxmrghw v2, vs5, vs5251; CHECK-BE-NEXT: xvcvuxwdp vs6, v2252; CHECK-BE-NEXT: xxmrglw v2, vs5, vs5253; CHECK-BE-NEXT: stxv vs3, 32(r3)254; CHECK-BE-NEXT: stxv vs2, 48(r3)255; CHECK-BE-NEXT: xvcvuxwdp vs5, v2256; CHECK-BE-NEXT: xxmrghw v2, vs4, vs4257; CHECK-BE-NEXT: xvcvuxwdp vs7, v2258; CHECK-BE-NEXT: xxmrglw v2, vs4, vs4259; CHECK-BE-NEXT: stxv vs6, 64(r3)260; CHECK-BE-NEXT: stxv vs5, 80(r3)261; CHECK-BE-NEXT: xvcvuxwdp vs4, v2262; CHECK-BE-NEXT: stxv vs7, 96(r3)263; CHECK-BE-NEXT: stxv vs4, 112(r3)264; CHECK-BE-NEXT: blr265entry:266 %a = load <16 x i32>, ptr %0, align 64267 %1 = uitofp <16 x i32> %a to <16 x double>268 store <16 x double> %1, ptr %agg.result, align 128269 ret void270}271 272define <2 x double> @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {273; CHECK-P8-LABEL: test2elt_signed:274; CHECK-P8: # %bb.0: # %entry275; CHECK-P8-NEXT: mtfprd f0, r3276; CHECK-P8-NEXT: xxswapd v2, vs0277; CHECK-P8-NEXT: xxmrglw v2, v2, v2278; CHECK-P8-NEXT: xvcvsxwdp v2, v2279; CHECK-P8-NEXT: blr280;281; CHECK-P9-LABEL: test2elt_signed:282; CHECK-P9: # %bb.0: # %entry283; CHECK-P9-NEXT: mtfprd f0, r3284; CHECK-P9-NEXT: xxswapd v2, vs0285; CHECK-P9-NEXT: xxmrglw v2, v2, v2286; CHECK-P9-NEXT: xvcvsxwdp v2, v2287; CHECK-P9-NEXT: blr288;289; CHECK-BE-LABEL: test2elt_signed:290; CHECK-BE: # %bb.0: # %entry291; CHECK-BE-NEXT: mtfprd f0, r3292; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0293; CHECK-BE-NEXT: xvcvsxwdp v2, v2294; CHECK-BE-NEXT: blr295entry:296 %0 = bitcast i64 %a.coerce to <2 x i32>297 %1 = sitofp <2 x i32> %0 to <2 x double>298 ret <2 x double> %1299}300 301define void @test4elt_signed(ptr noalias nocapture sret(<4 x double>) %agg.result, <4 x i32> %a) local_unnamed_addr #1 {302; CHECK-P8-LABEL: test4elt_signed:303; CHECK-P8: # %bb.0: # %entry304; CHECK-P8-NEXT: xxmrglw v3, v2, v2305; CHECK-P8-NEXT: xxmrghw v2, v2, v2306; CHECK-P8-NEXT: li r4, 16307; CHECK-P8-NEXT: xvcvsxwdp vs0, v3308; CHECK-P8-NEXT: xvcvsxwdp vs1, v2309; CHECK-P8-NEXT: xxswapd vs1, vs1310; CHECK-P8-NEXT: xxswapd vs0, vs0311; CHECK-P8-NEXT: stxvd2x vs1, r3, r4312; CHECK-P8-NEXT: stxvd2x vs0, 0, r3313; CHECK-P8-NEXT: blr314;315; CHECK-P9-LABEL: test4elt_signed:316; CHECK-P9: # %bb.0: # %entry317; CHECK-P9-NEXT: xxmrglw v3, v2, v2318; CHECK-P9-NEXT: xxmrghw v2, v2, v2319; CHECK-P9-NEXT: xvcvsxwdp vs0, v3320; CHECK-P9-NEXT: xvcvsxwdp vs1, v2321; CHECK-P9-NEXT: stxv vs1, 16(r3)322; CHECK-P9-NEXT: stxv vs0, 0(r3)323; CHECK-P9-NEXT: blr324;325; CHECK-BE-LABEL: test4elt_signed:326; CHECK-BE: # %bb.0: # %entry327; CHECK-BE-NEXT: xxmrghw v3, v2, v2328; CHECK-BE-NEXT: xxmrglw v2, v2, v2329; CHECK-BE-NEXT: xvcvsxwdp vs0, v3330; CHECK-BE-NEXT: xvcvsxwdp vs1, v2331; CHECK-BE-NEXT: stxv vs1, 16(r3)332; CHECK-BE-NEXT: stxv vs0, 0(r3)333; CHECK-BE-NEXT: blr334entry:335 %0 = sitofp <4 x i32> %a to <4 x double>336 store <4 x double> %0, ptr %agg.result, align 32337 ret void338}339 340define void @test8elt_signed(ptr noalias nocapture sret(<8 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {341; CHECK-P8-LABEL: test8elt_signed:342; CHECK-P8: # %bb.0: # %entry343; CHECK-P8-NEXT: li r5, 16344; CHECK-P8-NEXT: lxvd2x vs0, r4, r5345; CHECK-P8-NEXT: xxswapd v2, vs0346; CHECK-P8-NEXT: lxvd2x vs0, 0, r4347; CHECK-P8-NEXT: li r4, 48348; CHECK-P8-NEXT: xxmrghw v4, v2, v2349; CHECK-P8-NEXT: xxmrglw v2, v2, v2350; CHECK-P8-NEXT: xvcvsxwdp vs1, v4351; CHECK-P8-NEXT: xxswapd v3, vs0352; CHECK-P8-NEXT: xvcvsxwdp vs0, v2353; CHECK-P8-NEXT: xxmrglw v5, v3, v3354; CHECK-P8-NEXT: xxmrghw v3, v3, v3355; CHECK-P8-NEXT: xvcvsxwdp vs2, v5356; CHECK-P8-NEXT: xvcvsxwdp vs3, v3357; CHECK-P8-NEXT: xxswapd vs1, vs1358; CHECK-P8-NEXT: stxvd2x vs1, r3, r4359; CHECK-P8-NEXT: li r4, 32360; CHECK-P8-NEXT: xxswapd vs0, vs0361; CHECK-P8-NEXT: stxvd2x vs0, r3, r4362; CHECK-P8-NEXT: xxswapd vs3, vs3363; CHECK-P8-NEXT: xxswapd vs2, vs2364; CHECK-P8-NEXT: stxvd2x vs3, r3, r5365; CHECK-P8-NEXT: stxvd2x vs2, 0, r3366; CHECK-P8-NEXT: blr367;368; CHECK-P9-LABEL: test8elt_signed:369; CHECK-P9: # %bb.0: # %entry370; CHECK-P9-NEXT: lxv vs1, 0(r4)371; CHECK-P9-NEXT: lxv vs0, 16(r4)372; CHECK-P9-NEXT: xxmrglw v2, vs1, vs1373; CHECK-P9-NEXT: xvcvsxwdp vs2, v2374; CHECK-P9-NEXT: xxmrghw v2, vs1, vs1375; CHECK-P9-NEXT: xvcvsxwdp vs1, v2376; CHECK-P9-NEXT: xxmrglw v2, vs0, vs0377; CHECK-P9-NEXT: xvcvsxwdp vs3, v2378; CHECK-P9-NEXT: xxmrghw v2, vs0, vs0379; CHECK-P9-NEXT: stxv vs2, 0(r3)380; CHECK-P9-NEXT: xvcvsxwdp vs0, v2381; CHECK-P9-NEXT: stxv vs1, 16(r3)382; CHECK-P9-NEXT: stxv vs3, 32(r3)383; CHECK-P9-NEXT: stxv vs0, 48(r3)384; CHECK-P9-NEXT: blr385;386; CHECK-BE-LABEL: test8elt_signed:387; CHECK-BE: # %bb.0: # %entry388; CHECK-BE-NEXT: lxv vs1, 0(r4)389; CHECK-BE-NEXT: lxv vs0, 16(r4)390; CHECK-BE-NEXT: xxmrghw v2, vs1, vs1391; CHECK-BE-NEXT: xvcvsxwdp vs2, v2392; CHECK-BE-NEXT: xxmrglw v2, vs1, vs1393; CHECK-BE-NEXT: xvcvsxwdp vs1, v2394; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0395; CHECK-BE-NEXT: xvcvsxwdp vs3, v2396; CHECK-BE-NEXT: xxmrglw v2, vs0, vs0397; CHECK-BE-NEXT: stxv vs2, 0(r3)398; CHECK-BE-NEXT: xvcvsxwdp vs0, v2399; CHECK-BE-NEXT: stxv vs1, 16(r3)400; CHECK-BE-NEXT: stxv vs3, 32(r3)401; CHECK-BE-NEXT: stxv vs0, 48(r3)402; CHECK-BE-NEXT: blr403entry:404 %a = load <8 x i32>, ptr %0, align 32405 %1 = sitofp <8 x i32> %a to <8 x double>406 store <8 x double> %1, ptr %agg.result, align 64407 ret void408}409 410define void @test16elt_signed(ptr noalias nocapture sret(<16 x double>) %agg.result, ptr nocapture readonly) local_unnamed_addr #2 {411; CHECK-P8-LABEL: test16elt_signed:412; CHECK-P8: # %bb.0: # %entry413; CHECK-P8-NEXT: li r5, 48414; CHECK-P8-NEXT: li r6, 32415; CHECK-P8-NEXT: li r7, 16416; CHECK-P8-NEXT: lxvd2x vs1, 0, r4417; CHECK-P8-NEXT: lxvd2x vs0, r4, r5418; CHECK-P8-NEXT: xxswapd v0, vs1419; CHECK-P8-NEXT: xxswapd v2, vs0420; CHECK-P8-NEXT: lxvd2x vs0, r4, r6421; CHECK-P8-NEXT: xxmrglw v7, v0, v0422; CHECK-P8-NEXT: xxmrghw v0, v0, v0423; CHECK-P8-NEXT: xvcvsxwdp vs6, v7424; CHECK-P8-NEXT: xvcvsxwdp vs7, v0425; CHECK-P8-NEXT: xxmrghw v3, v2, v2426; CHECK-P8-NEXT: xxmrglw v2, v2, v2427; CHECK-P8-NEXT: xvcvsxwdp vs2, v3428; CHECK-P8-NEXT: xvcvsxwdp vs5, v2429; CHECK-P8-NEXT: xxswapd v4, vs0430; CHECK-P8-NEXT: lxvd2x vs0, r4, r7431; CHECK-P8-NEXT: li r4, 112432; CHECK-P8-NEXT: xxmrglw v1, v4, v4433; CHECK-P8-NEXT: xxmrghw v4, v4, v4434; CHECK-P8-NEXT: xvcvsxwdp vs4, v4435; CHECK-P8-NEXT: xvcvsxwdp vs3, v1436; CHECK-P8-NEXT: xxswapd v5, vs0437; CHECK-P8-NEXT: xxswapd vs2, vs2438; CHECK-P8-NEXT: xxswapd vs5, vs5439; CHECK-P8-NEXT: stxvd2x vs2, r3, r4440; CHECK-P8-NEXT: li r4, 96441; CHECK-P8-NEXT: stxvd2x vs5, r3, r4442; CHECK-P8-NEXT: li r4, 80443; CHECK-P8-NEXT: xxmrglw v6, v5, v5444; CHECK-P8-NEXT: xxmrghw v5, v5, v5445; CHECK-P8-NEXT: xvcvsxwdp vs0, v6446; CHECK-P8-NEXT: xvcvsxwdp vs1, v5447; CHECK-P8-NEXT: xxswapd vs5, vs6448; CHECK-P8-NEXT: stxvd2x vs5, 0, r3449; CHECK-P8-NEXT: xxswapd vs2, vs4450; CHECK-P8-NEXT: xxswapd vs3, vs3451; CHECK-P8-NEXT: xxswapd vs4, vs7452; CHECK-P8-NEXT: stxvd2x vs2, r3, r4453; CHECK-P8-NEXT: li r4, 64454; CHECK-P8-NEXT: stxvd2x vs4, r3, r7455; CHECK-P8-NEXT: stxvd2x vs3, r3, r4456; CHECK-P8-NEXT: xxswapd vs1, vs1457; CHECK-P8-NEXT: xxswapd vs0, vs0458; CHECK-P8-NEXT: stxvd2x vs1, r3, r5459; CHECK-P8-NEXT: stxvd2x vs0, r3, r6460; CHECK-P8-NEXT: blr461;462; CHECK-P9-LABEL: test16elt_signed:463; CHECK-P9: # %bb.0: # %entry464; CHECK-P9-NEXT: lxv vs0, 0(r4)465; CHECK-P9-NEXT: lxv vs2, 16(r4)466; CHECK-P9-NEXT: lxv vs5, 32(r4)467; CHECK-P9-NEXT: lxv vs4, 48(r4)468; CHECK-P9-NEXT: xxmrglw v2, vs0, vs0469; CHECK-P9-NEXT: xvcvsxwdp vs1, v2470; CHECK-P9-NEXT: xxmrghw v2, vs0, vs0471; CHECK-P9-NEXT: xvcvsxwdp vs0, v2472; CHECK-P9-NEXT: xxmrglw v2, vs2, vs2473; CHECK-P9-NEXT: xvcvsxwdp vs3, v2474; CHECK-P9-NEXT: xxmrghw v2, vs2, vs2475; CHECK-P9-NEXT: stxv vs1, 0(r3)476; CHECK-P9-NEXT: stxv vs0, 16(r3)477; CHECK-P9-NEXT: xvcvsxwdp vs2, v2478; CHECK-P9-NEXT: xxmrglw v2, vs5, vs5479; CHECK-P9-NEXT: xvcvsxwdp vs6, v2480; CHECK-P9-NEXT: xxmrghw v2, vs5, vs5481; CHECK-P9-NEXT: stxv vs3, 32(r3)482; CHECK-P9-NEXT: stxv vs2, 48(r3)483; CHECK-P9-NEXT: xvcvsxwdp vs5, v2484; CHECK-P9-NEXT: xxmrglw v2, vs4, vs4485; CHECK-P9-NEXT: xvcvsxwdp vs7, v2486; CHECK-P9-NEXT: xxmrghw v2, vs4, vs4487; CHECK-P9-NEXT: stxv vs6, 64(r3)488; CHECK-P9-NEXT: stxv vs5, 80(r3)489; CHECK-P9-NEXT: xvcvsxwdp vs4, v2490; CHECK-P9-NEXT: stxv vs7, 96(r3)491; CHECK-P9-NEXT: stxv vs4, 112(r3)492; CHECK-P9-NEXT: blr493;494; CHECK-BE-LABEL: test16elt_signed:495; CHECK-BE: # %bb.0: # %entry496; CHECK-BE-NEXT: lxv vs0, 0(r4)497; CHECK-BE-NEXT: lxv vs2, 16(r4)498; CHECK-BE-NEXT: lxv vs5, 32(r4)499; CHECK-BE-NEXT: lxv vs4, 48(r4)500; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0501; CHECK-BE-NEXT: xvcvsxwdp vs1, v2502; CHECK-BE-NEXT: xxmrglw v2, vs0, vs0503; CHECK-BE-NEXT: xvcvsxwdp vs0, v2504; CHECK-BE-NEXT: xxmrghw v2, vs2, vs2505; CHECK-BE-NEXT: xvcvsxwdp vs3, v2506; CHECK-BE-NEXT: xxmrglw v2, vs2, vs2507; CHECK-BE-NEXT: stxv vs1, 0(r3)508; CHECK-BE-NEXT: stxv vs0, 16(r3)509; CHECK-BE-NEXT: xvcvsxwdp vs2, v2510; CHECK-BE-NEXT: xxmrghw v2, vs5, vs5511; CHECK-BE-NEXT: xvcvsxwdp vs6, v2512; CHECK-BE-NEXT: xxmrglw v2, vs5, vs5513; CHECK-BE-NEXT: stxv vs3, 32(r3)514; CHECK-BE-NEXT: stxv vs2, 48(r3)515; CHECK-BE-NEXT: xvcvsxwdp vs5, v2516; CHECK-BE-NEXT: xxmrghw v2, vs4, vs4517; CHECK-BE-NEXT: xvcvsxwdp vs7, v2518; CHECK-BE-NEXT: xxmrglw v2, vs4, vs4519; CHECK-BE-NEXT: stxv vs6, 64(r3)520; CHECK-BE-NEXT: stxv vs5, 80(r3)521; CHECK-BE-NEXT: xvcvsxwdp vs4, v2522; CHECK-BE-NEXT: stxv vs7, 96(r3)523; CHECK-BE-NEXT: stxv vs4, 112(r3)524; CHECK-BE-NEXT: blr525entry:526 %a = load <16 x i32>, ptr %0, align 64527 %1 = sitofp <16 x i32> %a to <16 x double>528 store <16 x double> %1, ptr %agg.result, align 128529 ret void530}531