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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-P85; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \6; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-P98; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \9; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-BE11 12define i64 @test2elt(i16 %a.coerce) local_unnamed_addr #0 {13; CHECK-P8-LABEL: test2elt:14; CHECK-P8: # %bb.0: # %entry15; CHECK-P8-NEXT: mtfprd f0, r316; CHECK-P8-NEXT: mffprd r3, f017; CHECK-P8-NEXT: clrldi r4, r3, 5618; CHECK-P8-NEXT: rldicl r3, r3, 56, 5619; CHECK-P8-NEXT: clrlwi r4, r4, 2420; CHECK-P8-NEXT: clrlwi r3, r3, 2421; CHECK-P8-NEXT: mtfprwz f0, r422; CHECK-P8-NEXT: mtfprwz f1, r323; CHECK-P8-NEXT: xscvuxdsp f0, f024; CHECK-P8-NEXT: xscvuxdsp f1, f125; CHECK-P8-NEXT: xscvdpspn vs0, f026; CHECK-P8-NEXT: xscvdpspn vs1, f127; CHECK-P8-NEXT: xxmrghw vs0, vs1, vs028; CHECK-P8-NEXT: xxswapd vs0, vs029; CHECK-P8-NEXT: mffprd r3, f030; CHECK-P8-NEXT: blr31;32; CHECK-P9-LABEL: test2elt:33; CHECK-P9: # %bb.0: # %entry34; CHECK-P9-NEXT: mtfprd f0, r335; CHECK-P9-NEXT: xxswapd v2, vs036; CHECK-P9-NEXT: vextractub v3, v2, 1537; CHECK-P9-NEXT: vextractub v2, v2, 1438; CHECK-P9-NEXT: xscvuxdsp f0, v339; CHECK-P9-NEXT: xscvuxdsp f1, v240; CHECK-P9-NEXT: xscvdpspn vs0, f041; CHECK-P9-NEXT: xscvdpspn vs1, f142; CHECK-P9-NEXT: xxmrghw vs0, vs1, vs043; CHECK-P9-NEXT: mfvsrld r3, vs044; CHECK-P9-NEXT: blr45;46; CHECK-BE-LABEL: test2elt:47; CHECK-BE: # %bb.0: # %entry48; CHECK-BE-NEXT: sldi r3, r3, 4849; CHECK-BE-NEXT: mtvsrd v2, r350; CHECK-BE-NEXT: vextractub v3, v2, 251; CHECK-BE-NEXT: vextractub v2, v2, 052; CHECK-BE-NEXT: xscvuxdsp f0, v353; CHECK-BE-NEXT: xscvdpspn v3, f054; CHECK-BE-NEXT: xscvuxdsp f0, v255; CHECK-BE-NEXT: xscvdpspn v2, f056; CHECK-BE-NEXT: vmrgow v2, v2, v357; CHECK-BE-NEXT: mfvsrd r3, v258; CHECK-BE-NEXT: blr59entry:60 %0 = bitcast i16 %a.coerce to <2 x i8>61 %1 = uitofp <2 x i8> %0 to <2 x float>62 %2 = bitcast <2 x float> %1 to i6463 ret i64 %264}65 66define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 {67; CHECK-P8-LABEL: test4elt:68; CHECK-P8: # %bb.0: # %entry69; CHECK-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha70; CHECK-P8-NEXT: mtvsrwz v3, r371; CHECK-P8-NEXT: xxlxor v4, v4, v472; CHECK-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l73; CHECK-P8-NEXT: lxvd2x vs0, 0, r474; CHECK-P8-NEXT: xxswapd v2, vs075; CHECK-P8-NEXT: vperm v2, v4, v3, v276; CHECK-P8-NEXT: xvcvuxwsp v2, v277; CHECK-P8-NEXT: blr78;79; CHECK-P9-LABEL: test4elt:80; CHECK-P9: # %bb.0: # %entry81; CHECK-P9-NEXT: mtfprwz f0, r382; CHECK-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha83; CHECK-P9-NEXT: xxlxor vs2, vs2, vs284; CHECK-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l85; CHECK-P9-NEXT: lxv vs1, 0(r3)86; CHECK-P9-NEXT: xxperm vs0, vs2, vs187; CHECK-P9-NEXT: xvcvuxwsp v2, vs088; CHECK-P9-NEXT: blr89;90; CHECK-BE-LABEL: test4elt:91; CHECK-BE: # %bb.0: # %entry92; CHECK-BE-NEXT: mtfprwz f0, r393; CHECK-BE-NEXT: addis r3, r2, .LCPI1_0@toc@ha94; CHECK-BE-NEXT: xxlxor vs2, vs2, vs295; CHECK-BE-NEXT: addi r3, r3, .LCPI1_0@toc@l96; CHECK-BE-NEXT: lxv vs1, 0(r3)97; CHECK-BE-NEXT: xxperm vs0, vs2, vs198; CHECK-BE-NEXT: xvcvuxwsp v2, vs099; CHECK-BE-NEXT: blr100entry:101 %0 = bitcast i32 %a.coerce to <4 x i8>102 %1 = uitofp <4 x i8> %0 to <4 x float>103 ret <4 x float> %1104}105 106define void @test8elt(ptr noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {107; CHECK-P8-LABEL: test8elt:108; CHECK-P8: # %bb.0: # %entry109; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha110; CHECK-P8-NEXT: mtvsrd v4, r4111; CHECK-P8-NEXT: xxlxor v5, v5, v5112; CHECK-P8-NEXT: li r4, 16113; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l114; CHECK-P8-NEXT: lxvd2x vs0, 0, r5115; CHECK-P8-NEXT: addis r5, r2, .LCPI2_1@toc@ha116; CHECK-P8-NEXT: addi r5, r5, .LCPI2_1@toc@l117; CHECK-P8-NEXT: lxvd2x vs1, 0, r5118; CHECK-P8-NEXT: xxswapd v2, vs0119; CHECK-P8-NEXT: vperm v2, v5, v4, v2120; CHECK-P8-NEXT: xvcvuxwsp vs0, v2121; CHECK-P8-NEXT: xxswapd v3, vs1122; CHECK-P8-NEXT: vperm v3, v5, v4, v3123; CHECK-P8-NEXT: xvcvuxwsp vs1, v3124; CHECK-P8-NEXT: xxswapd vs0, vs0125; CHECK-P8-NEXT: stxvd2x vs0, 0, r3126; CHECK-P8-NEXT: xxswapd vs1, vs1127; CHECK-P8-NEXT: stxvd2x vs1, r3, r4128; CHECK-P8-NEXT: blr129;130; CHECK-P9-LABEL: test8elt:131; CHECK-P9: # %bb.0: # %entry132; CHECK-P9-NEXT: mtvsrd v2, r4133; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha134; CHECK-P9-NEXT: xxlxor v4, v4, v4135; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l136; CHECK-P9-NEXT: lxv v3, 0(r4)137; CHECK-P9-NEXT: addis r4, r2, .LCPI2_1@toc@ha138; CHECK-P9-NEXT: addi r4, r4, .LCPI2_1@toc@l139; CHECK-P9-NEXT: vperm v3, v4, v2, v3140; CHECK-P9-NEXT: xvcvuxwsp vs0, v3141; CHECK-P9-NEXT: lxv v3, 0(r4)142; CHECK-P9-NEXT: vperm v2, v4, v2, v3143; CHECK-P9-NEXT: stxv vs0, 0(r3)144; CHECK-P9-NEXT: xvcvuxwsp vs1, v2145; CHECK-P9-NEXT: stxv vs1, 16(r3)146; CHECK-P9-NEXT: blr147;148; CHECK-BE-LABEL: test8elt:149; CHECK-BE: # %bb.0: # %entry150; CHECK-BE-NEXT: mtvsrd v2, r4151; CHECK-BE-NEXT: addis r4, r2, .LCPI2_0@toc@ha152; CHECK-BE-NEXT: xxlxor v4, v4, v4153; CHECK-BE-NEXT: addi r4, r4, .LCPI2_0@toc@l154; CHECK-BE-NEXT: lxv v3, 0(r4)155; CHECK-BE-NEXT: addis r4, r2, .LCPI2_1@toc@ha156; CHECK-BE-NEXT: addi r4, r4, .LCPI2_1@toc@l157; CHECK-BE-NEXT: vperm v3, v4, v2, v3158; CHECK-BE-NEXT: xvcvuxwsp vs0, v3159; CHECK-BE-NEXT: lxv v3, 0(r4)160; CHECK-BE-NEXT: vperm v2, v4, v2, v3161; CHECK-BE-NEXT: stxv vs0, 0(r3)162; CHECK-BE-NEXT: xvcvuxwsp vs1, v2163; CHECK-BE-NEXT: stxv vs1, 16(r3)164; CHECK-BE-NEXT: blr165entry:166 %0 = bitcast i64 %a.coerce to <8 x i8>167 %1 = uitofp <8 x i8> %0 to <8 x float>168 store <8 x float> %1, ptr %agg.result, align 32169 ret void170}171 172define void @test16elt(ptr noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {173; CHECK-P8-LABEL: test16elt:174; CHECK-P8: # %bb.0: # %entry175; CHECK-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha176; CHECK-P8-NEXT: xxlxor v1, v1, v1177; CHECK-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l178; CHECK-P8-NEXT: lxvd2x vs0, 0, r4179; CHECK-P8-NEXT: addis r4, r2, .LCPI3_1@toc@ha180; CHECK-P8-NEXT: addi r4, r4, .LCPI3_1@toc@l181; CHECK-P8-NEXT: lxvd2x vs1, 0, r4182; CHECK-P8-NEXT: addis r4, r2, .LCPI3_3@toc@ha183; CHECK-P8-NEXT: addi r4, r4, .LCPI3_3@toc@l184; CHECK-P8-NEXT: lxvd2x vs2, 0, r4185; CHECK-P8-NEXT: addis r4, r2, .LCPI3_2@toc@ha186; CHECK-P8-NEXT: addi r4, r4, .LCPI3_2@toc@l187; CHECK-P8-NEXT: xxswapd v4, vs0188; CHECK-P8-NEXT: vperm v4, v1, v2, v4189; CHECK-P8-NEXT: xvcvuxwsp vs0, v4190; CHECK-P8-NEXT: xxswapd v5, vs1191; CHECK-P8-NEXT: vperm v5, v1, v2, v5192; CHECK-P8-NEXT: xvcvuxwsp vs1, v5193; CHECK-P8-NEXT: xxswapd v3, vs2194; CHECK-P8-NEXT: lxvd2x vs2, 0, r4195; CHECK-P8-NEXT: li r4, 48196; CHECK-P8-NEXT: vperm v3, v1, v2, v3197; CHECK-P8-NEXT: xxswapd vs0, vs0198; CHECK-P8-NEXT: stxvd2x vs0, 0, r3199; CHECK-P8-NEXT: xxswapd v0, vs2200; CHECK-P8-NEXT: xvcvuxwsp vs2, v3201; CHECK-P8-NEXT: xxswapd vs1, vs1202; CHECK-P8-NEXT: vperm v2, v1, v2, v0203; CHECK-P8-NEXT: xvcvuxwsp vs3, v2204; CHECK-P8-NEXT: xxswapd vs2, vs2205; CHECK-P8-NEXT: stxvd2x vs2, r3, r4206; CHECK-P8-NEXT: li r4, 32207; CHECK-P8-NEXT: xxswapd vs3, vs3208; CHECK-P8-NEXT: stxvd2x vs3, r3, r4209; CHECK-P8-NEXT: li r4, 16210; CHECK-P8-NEXT: stxvd2x vs1, r3, r4211; CHECK-P8-NEXT: blr212;213; CHECK-P9-LABEL: test16elt:214; CHECK-P9: # %bb.0: # %entry215; CHECK-P9-NEXT: addis r4, r2, .LCPI3_0@toc@ha216; CHECK-P9-NEXT: xxlxor v4, v4, v4217; CHECK-P9-NEXT: addi r4, r4, .LCPI3_0@toc@l218; CHECK-P9-NEXT: lxv v3, 0(r4)219; CHECK-P9-NEXT: addis r4, r2, .LCPI3_1@toc@ha220; CHECK-P9-NEXT: addi r4, r4, .LCPI3_1@toc@l221; CHECK-P9-NEXT: vperm v3, v4, v2, v3222; CHECK-P9-NEXT: xvcvuxwsp vs0, v3223; CHECK-P9-NEXT: lxv v3, 0(r4)224; CHECK-P9-NEXT: addis r4, r2, .LCPI3_2@toc@ha225; CHECK-P9-NEXT: addi r4, r4, .LCPI3_2@toc@l226; CHECK-P9-NEXT: vperm v3, v4, v2, v3227; CHECK-P9-NEXT: stxv vs0, 0(r3)228; CHECK-P9-NEXT: xvcvuxwsp vs1, v3229; CHECK-P9-NEXT: lxv v3, 0(r4)230; CHECK-P9-NEXT: addis r4, r2, .LCPI3_3@toc@ha231; CHECK-P9-NEXT: addi r4, r4, .LCPI3_3@toc@l232; CHECK-P9-NEXT: vperm v3, v4, v2, v3233; CHECK-P9-NEXT: stxv vs1, 16(r3)234; CHECK-P9-NEXT: xvcvuxwsp vs2, v3235; CHECK-P9-NEXT: lxv v3, 0(r4)236; CHECK-P9-NEXT: vperm v2, v4, v2, v3237; CHECK-P9-NEXT: stxv vs2, 32(r3)238; CHECK-P9-NEXT: xvcvuxwsp vs3, v2239; CHECK-P9-NEXT: stxv vs3, 48(r3)240; CHECK-P9-NEXT: blr241;242; CHECK-BE-LABEL: test16elt:243; CHECK-BE: # %bb.0: # %entry244; CHECK-BE-NEXT: addis r4, r2, .LCPI3_0@toc@ha245; CHECK-BE-NEXT: xxlxor v4, v4, v4246; CHECK-BE-NEXT: addi r4, r4, .LCPI3_0@toc@l247; CHECK-BE-NEXT: lxv v3, 0(r4)248; CHECK-BE-NEXT: addis r4, r2, .LCPI3_1@toc@ha249; CHECK-BE-NEXT: addi r4, r4, .LCPI3_1@toc@l250; CHECK-BE-NEXT: vperm v3, v4, v2, v3251; CHECK-BE-NEXT: xvcvuxwsp vs0, v3252; CHECK-BE-NEXT: lxv v3, 0(r4)253; CHECK-BE-NEXT: addis r4, r2, .LCPI3_2@toc@ha254; CHECK-BE-NEXT: addi r4, r4, .LCPI3_2@toc@l255; CHECK-BE-NEXT: vperm v3, v4, v2, v3256; CHECK-BE-NEXT: stxv vs0, 0(r3)257; CHECK-BE-NEXT: xvcvuxwsp vs1, v3258; CHECK-BE-NEXT: lxv v3, 0(r4)259; CHECK-BE-NEXT: addis r4, r2, .LCPI3_3@toc@ha260; CHECK-BE-NEXT: addi r4, r4, .LCPI3_3@toc@l261; CHECK-BE-NEXT: vperm v3, v4, v2, v3262; CHECK-BE-NEXT: stxv vs1, 16(r3)263; CHECK-BE-NEXT: xvcvuxwsp vs2, v3264; CHECK-BE-NEXT: lxv v3, 0(r4)265; CHECK-BE-NEXT: vperm v2, v4, v2, v3266; CHECK-BE-NEXT: stxv vs2, 32(r3)267; CHECK-BE-NEXT: xvcvuxwsp vs3, v2268; CHECK-BE-NEXT: stxv vs3, 48(r3)269; CHECK-BE-NEXT: blr270entry:271 %0 = uitofp <16 x i8> %a to <16 x float>272 store <16 x float> %0, ptr %agg.result, align 64273 ret void274}275 276define i64 @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {277; CHECK-P8-LABEL: test2elt_signed:278; CHECK-P8: # %bb.0: # %entry279; CHECK-P8-NEXT: mtfprd f0, r3280; CHECK-P8-NEXT: mffprd r3, f0281; CHECK-P8-NEXT: clrldi r4, r3, 56282; CHECK-P8-NEXT: rldicl r3, r3, 56, 56283; CHECK-P8-NEXT: extsb r4, r4284; CHECK-P8-NEXT: extsb r3, r3285; CHECK-P8-NEXT: mtfprwa f0, r4286; CHECK-P8-NEXT: mtfprwa f1, r3287; CHECK-P8-NEXT: xscvsxdsp f0, f0288; CHECK-P8-NEXT: xscvsxdsp f1, f1289; CHECK-P8-NEXT: xscvdpspn vs0, f0290; CHECK-P8-NEXT: xscvdpspn vs1, f1291; CHECK-P8-NEXT: xxmrghw vs0, vs1, vs0292; CHECK-P8-NEXT: xxswapd vs0, vs0293; CHECK-P8-NEXT: mffprd r3, f0294; CHECK-P8-NEXT: blr295;296; CHECK-P9-LABEL: test2elt_signed:297; CHECK-P9: # %bb.0: # %entry298; CHECK-P9-NEXT: mtfprd f0, r3299; CHECK-P9-NEXT: xxswapd v2, vs0300; CHECK-P9-NEXT: vextractub v3, v2, 15301; CHECK-P9-NEXT: vextractub v2, v2, 14302; CHECK-P9-NEXT: vextsh2d v3, v3303; CHECK-P9-NEXT: vextsh2d v2, v2304; CHECK-P9-NEXT: xscvsxdsp f0, v3305; CHECK-P9-NEXT: xscvsxdsp f1, v2306; CHECK-P9-NEXT: xscvdpspn vs0, f0307; CHECK-P9-NEXT: xscvdpspn vs1, f1308; CHECK-P9-NEXT: xxmrghw vs0, vs1, vs0309; CHECK-P9-NEXT: mfvsrld r3, vs0310; CHECK-P9-NEXT: blr311;312; CHECK-BE-LABEL: test2elt_signed:313; CHECK-BE: # %bb.0: # %entry314; CHECK-BE-NEXT: sldi r3, r3, 48315; CHECK-BE-NEXT: mtvsrd v2, r3316; CHECK-BE-NEXT: vextractub v3, v2, 2317; CHECK-BE-NEXT: vextractub v2, v2, 0318; CHECK-BE-NEXT: vextsh2d v3, v3319; CHECK-BE-NEXT: vextsh2d v2, v2320; CHECK-BE-NEXT: xscvsxdsp f0, v3321; CHECK-BE-NEXT: xscvdpspn v3, f0322; CHECK-BE-NEXT: xscvsxdsp f0, v2323; CHECK-BE-NEXT: xscvdpspn v2, f0324; CHECK-BE-NEXT: vmrgow v2, v2, v3325; CHECK-BE-NEXT: mfvsrd r3, v2326; CHECK-BE-NEXT: blr327entry:328 %0 = bitcast i16 %a.coerce to <2 x i8>329 %1 = sitofp <2 x i8> %0 to <2 x float>330 %2 = bitcast <2 x float> %1 to i64331 ret i64 %2332}333 334define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 {335; CHECK-P8-LABEL: test4elt_signed:336; CHECK-P8: # %bb.0: # %entry337; CHECK-P8-NEXT: addis r4, r2, .LCPI5_0@toc@ha338; CHECK-P8-NEXT: mtvsrwz v4, r3339; CHECK-P8-NEXT: vspltisw v3, 12340; CHECK-P8-NEXT: addi r4, r4, .LCPI5_0@toc@l341; CHECK-P8-NEXT: vadduwm v3, v3, v3342; CHECK-P8-NEXT: lxvd2x vs0, 0, r4343; CHECK-P8-NEXT: xxswapd v2, vs0344; CHECK-P8-NEXT: vperm v2, v4, v4, v2345; CHECK-P8-NEXT: vslw v2, v2, v3346; CHECK-P8-NEXT: vsraw v2, v2, v3347; CHECK-P8-NEXT: xvcvsxwsp v2, v2348; CHECK-P8-NEXT: blr349;350; CHECK-P9-LABEL: test4elt_signed:351; CHECK-P9: # %bb.0: # %entry352; CHECK-P9-NEXT: mtvsrwz v2, r3353; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha354; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l355; CHECK-P9-NEXT: lxv vs0, 0(r3)356; CHECK-P9-NEXT: xxperm v2, v2, vs0357; CHECK-P9-NEXT: vextsb2w v2, v2358; CHECK-P9-NEXT: xvcvsxwsp v2, v2359; CHECK-P9-NEXT: blr360;361; CHECK-BE-LABEL: test4elt_signed:362; CHECK-BE: # %bb.0: # %entry363; CHECK-BE-NEXT: mtvsrwz v2, r3364; CHECK-BE-NEXT: addis r3, r2, .LCPI5_0@toc@ha365; CHECK-BE-NEXT: addi r3, r3, .LCPI5_0@toc@l366; CHECK-BE-NEXT: lxv vs0, 0(r3)367; CHECK-BE-NEXT: xxperm v2, v2, vs0368; CHECK-BE-NEXT: vextsb2w v2, v2369; CHECK-BE-NEXT: xvcvsxwsp v2, v2370; CHECK-BE-NEXT: blr371entry:372 %0 = bitcast i32 %a.coerce to <4 x i8>373 %1 = sitofp <4 x i8> %0 to <4 x float>374 ret <4 x float> %1375}376 377define void @test8elt_signed(ptr noalias nocapture sret(<8 x float>) %agg.result, i64 %a.coerce) local_unnamed_addr #2 {378; CHECK-P8-LABEL: test8elt_signed:379; CHECK-P8: # %bb.0: # %entry380; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha381; CHECK-P8-NEXT: mtvsrd v5, r4382; CHECK-P8-NEXT: vspltisw v3, 12383; CHECK-P8-NEXT: li r4, 16384; CHECK-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l385; CHECK-P8-NEXT: vadduwm v3, v3, v3386; CHECK-P8-NEXT: lxvd2x vs0, 0, r5387; CHECK-P8-NEXT: addis r5, r2, .LCPI6_1@toc@ha388; CHECK-P8-NEXT: addi r5, r5, .LCPI6_1@toc@l389; CHECK-P8-NEXT: lxvd2x vs1, 0, r5390; CHECK-P8-NEXT: xxswapd v2, vs0391; CHECK-P8-NEXT: vperm v2, v5, v5, v2392; CHECK-P8-NEXT: vslw v2, v2, v3393; CHECK-P8-NEXT: vsraw v2, v2, v3394; CHECK-P8-NEXT: xvcvsxwsp vs0, v2395; CHECK-P8-NEXT: xxswapd v4, vs1396; CHECK-P8-NEXT: vperm v4, v5, v5, v4397; CHECK-P8-NEXT: vslw v2, v4, v3398; CHECK-P8-NEXT: vsraw v2, v2, v3399; CHECK-P8-NEXT: xvcvsxwsp vs1, v2400; CHECK-P8-NEXT: xxswapd vs0, vs0401; CHECK-P8-NEXT: stxvd2x vs0, 0, r3402; CHECK-P8-NEXT: xxswapd vs1, vs1403; CHECK-P8-NEXT: stxvd2x vs1, r3, r4404; CHECK-P8-NEXT: blr405;406; CHECK-P9-LABEL: test8elt_signed:407; CHECK-P9: # %bb.0: # %entry408; CHECK-P9-NEXT: mtvsrd v2, r4409; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha410; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l411; CHECK-P9-NEXT: lxv v3, 0(r4)412; CHECK-P9-NEXT: addis r4, r2, .LCPI6_1@toc@ha413; CHECK-P9-NEXT: addi r4, r4, .LCPI6_1@toc@l414; CHECK-P9-NEXT: vperm v3, v2, v2, v3415; CHECK-P9-NEXT: vextsb2w v3, v3416; CHECK-P9-NEXT: xvcvsxwsp vs0, v3417; CHECK-P9-NEXT: lxv v3, 0(r4)418; CHECK-P9-NEXT: vperm v2, v2, v2, v3419; CHECK-P9-NEXT: stxv vs0, 0(r3)420; CHECK-P9-NEXT: vextsb2w v2, v2421; CHECK-P9-NEXT: xvcvsxwsp vs1, v2422; CHECK-P9-NEXT: stxv vs1, 16(r3)423; CHECK-P9-NEXT: blr424;425; CHECK-BE-LABEL: test8elt_signed:426; CHECK-BE: # %bb.0: # %entry427; CHECK-BE-NEXT: mtvsrd v2, r4428; CHECK-BE-NEXT: addis r4, r2, .LCPI6_0@toc@ha429; CHECK-BE-NEXT: addi r4, r4, .LCPI6_0@toc@l430; CHECK-BE-NEXT: lxv v3, 0(r4)431; CHECK-BE-NEXT: addis r4, r2, .LCPI6_1@toc@ha432; CHECK-BE-NEXT: addi r4, r4, .LCPI6_1@toc@l433; CHECK-BE-NEXT: vperm v3, v2, v2, v3434; CHECK-BE-NEXT: vextsb2w v3, v3435; CHECK-BE-NEXT: xvcvsxwsp vs0, v3436; CHECK-BE-NEXT: lxv v3, 0(r4)437; CHECK-BE-NEXT: vperm v2, v2, v2, v3438; CHECK-BE-NEXT: stxv vs0, 0(r3)439; CHECK-BE-NEXT: vextsb2w v2, v2440; CHECK-BE-NEXT: xvcvsxwsp vs1, v2441; CHECK-BE-NEXT: stxv vs1, 16(r3)442; CHECK-BE-NEXT: blr443entry:444 %0 = bitcast i64 %a.coerce to <8 x i8>445 %1 = sitofp <8 x i8> %0 to <8 x float>446 store <8 x float> %1, ptr %agg.result, align 32447 ret void448}449 450define void @test16elt_signed(ptr noalias nocapture sret(<16 x float>) %agg.result, <16 x i8> %a) local_unnamed_addr #3 {451; CHECK-P8-LABEL: test16elt_signed:452; CHECK-P8: # %bb.0: # %entry453; CHECK-P8-NEXT: addis r4, r2, .LCPI7_0@toc@ha454; CHECK-P8-NEXT: vspltisw v3, 12455; CHECK-P8-NEXT: addi r4, r4, .LCPI7_0@toc@l456; CHECK-P8-NEXT: vadduwm v3, v3, v3457; CHECK-P8-NEXT: lxvd2x vs0, 0, r4458; CHECK-P8-NEXT: addis r4, r2, .LCPI7_1@toc@ha459; CHECK-P8-NEXT: addi r4, r4, .LCPI7_1@toc@l460; CHECK-P8-NEXT: lxvd2x vs1, 0, r4461; CHECK-P8-NEXT: addis r4, r2, .LCPI7_3@toc@ha462; CHECK-P8-NEXT: addi r4, r4, .LCPI7_3@toc@l463; CHECK-P8-NEXT: lxvd2x vs2, 0, r4464; CHECK-P8-NEXT: addis r4, r2, .LCPI7_2@toc@ha465; CHECK-P8-NEXT: addi r4, r4, .LCPI7_2@toc@l466; CHECK-P8-NEXT: xxswapd v5, vs0467; CHECK-P8-NEXT: vperm v5, v2, v2, v5468; CHECK-P8-NEXT: vslw v5, v5, v3469; CHECK-P8-NEXT: vsraw v5, v5, v3470; CHECK-P8-NEXT: xvcvsxwsp vs0, v5471; CHECK-P8-NEXT: xxswapd v0, vs1472; CHECK-P8-NEXT: vperm v0, v2, v2, v0473; CHECK-P8-NEXT: vslw v0, v0, v3474; CHECK-P8-NEXT: vsraw v0, v0, v3475; CHECK-P8-NEXT: xvcvsxwsp vs1, v0476; CHECK-P8-NEXT: xxswapd v4, vs2477; CHECK-P8-NEXT: lxvd2x vs2, 0, r4478; CHECK-P8-NEXT: li r4, 48479; CHECK-P8-NEXT: vperm v4, v2, v2, v4480; CHECK-P8-NEXT: vslw v4, v4, v3481; CHECK-P8-NEXT: xxswapd v1, vs2482; CHECK-P8-NEXT: xxswapd vs0, vs0483; CHECK-P8-NEXT: stxvd2x vs0, 0, r3484; CHECK-P8-NEXT: vperm v2, v2, v2, v1485; CHECK-P8-NEXT: vslw v2, v2, v3486; CHECK-P8-NEXT: vsraw v2, v2, v3487; CHECK-P8-NEXT: vsraw v3, v4, v3488; CHECK-P8-NEXT: xvcvsxwsp vs2, v3489; CHECK-P8-NEXT: xvcvsxwsp vs3, v2490; CHECK-P8-NEXT: xxswapd vs1, vs1491; CHECK-P8-NEXT: xxswapd vs2, vs2492; CHECK-P8-NEXT: xxswapd vs3, vs3493; CHECK-P8-NEXT: stxvd2x vs2, r3, r4494; CHECK-P8-NEXT: li r4, 32495; CHECK-P8-NEXT: stxvd2x vs3, r3, r4496; CHECK-P8-NEXT: li r4, 16497; CHECK-P8-NEXT: stxvd2x vs1, r3, r4498; CHECK-P8-NEXT: blr499;500; CHECK-P9-LABEL: test16elt_signed:501; CHECK-P9: # %bb.0: # %entry502; CHECK-P9-NEXT: addis r4, r2, .LCPI7_0@toc@ha503; CHECK-P9-NEXT: addi r4, r4, .LCPI7_0@toc@l504; CHECK-P9-NEXT: lxv v3, 0(r4)505; CHECK-P9-NEXT: addis r4, r2, .LCPI7_1@toc@ha506; CHECK-P9-NEXT: addi r4, r4, .LCPI7_1@toc@l507; CHECK-P9-NEXT: vperm v3, v2, v2, v3508; CHECK-P9-NEXT: vextsb2w v3, v3509; CHECK-P9-NEXT: xvcvsxwsp vs0, v3510; CHECK-P9-NEXT: lxv v3, 0(r4)511; CHECK-P9-NEXT: addis r4, r2, .LCPI7_2@toc@ha512; CHECK-P9-NEXT: addi r4, r4, .LCPI7_2@toc@l513; CHECK-P9-NEXT: vperm v3, v2, v2, v3514; CHECK-P9-NEXT: stxv vs0, 0(r3)515; CHECK-P9-NEXT: vextsb2w v3, v3516; CHECK-P9-NEXT: xvcvsxwsp vs1, v3517; CHECK-P9-NEXT: lxv v3, 0(r4)518; CHECK-P9-NEXT: addis r4, r2, .LCPI7_3@toc@ha519; CHECK-P9-NEXT: addi r4, r4, .LCPI7_3@toc@l520; CHECK-P9-NEXT: vperm v3, v2, v2, v3521; CHECK-P9-NEXT: stxv vs1, 16(r3)522; CHECK-P9-NEXT: vextsb2w v3, v3523; CHECK-P9-NEXT: xvcvsxwsp vs2, v3524; CHECK-P9-NEXT: lxv v3, 0(r4)525; CHECK-P9-NEXT: vperm v2, v2, v2, v3526; CHECK-P9-NEXT: stxv vs2, 32(r3)527; CHECK-P9-NEXT: vextsb2w v2, v2528; CHECK-P9-NEXT: xvcvsxwsp vs3, v2529; CHECK-P9-NEXT: stxv vs3, 48(r3)530; CHECK-P9-NEXT: blr531;532; CHECK-BE-LABEL: test16elt_signed:533; CHECK-BE: # %bb.0: # %entry534; CHECK-BE-NEXT: addis r4, r2, .LCPI7_0@toc@ha535; CHECK-BE-NEXT: addi r4, r4, .LCPI7_0@toc@l536; CHECK-BE-NEXT: lxv v3, 0(r4)537; CHECK-BE-NEXT: addis r4, r2, .LCPI7_1@toc@ha538; CHECK-BE-NEXT: addi r4, r4, .LCPI7_1@toc@l539; CHECK-BE-NEXT: vperm v3, v2, v2, v3540; CHECK-BE-NEXT: vextsb2w v3, v3541; CHECK-BE-NEXT: xvcvsxwsp vs0, v3542; CHECK-BE-NEXT: lxv v3, 0(r4)543; CHECK-BE-NEXT: addis r4, r2, .LCPI7_2@toc@ha544; CHECK-BE-NEXT: addi r4, r4, .LCPI7_2@toc@l545; CHECK-BE-NEXT: vperm v3, v2, v2, v3546; CHECK-BE-NEXT: stxv vs0, 0(r3)547; CHECK-BE-NEXT: vextsb2w v3, v3548; CHECK-BE-NEXT: xvcvsxwsp vs1, v3549; CHECK-BE-NEXT: lxv v3, 0(r4)550; CHECK-BE-NEXT: addis r4, r2, .LCPI7_3@toc@ha551; CHECK-BE-NEXT: addi r4, r4, .LCPI7_3@toc@l552; CHECK-BE-NEXT: vperm v3, v2, v2, v3553; CHECK-BE-NEXT: stxv vs1, 16(r3)554; CHECK-BE-NEXT: vextsb2w v3, v3555; CHECK-BE-NEXT: xvcvsxwsp vs2, v3556; CHECK-BE-NEXT: lxv v3, 0(r4)557; CHECK-BE-NEXT: vperm v2, v2, v2, v3558; CHECK-BE-NEXT: stxv vs2, 32(r3)559; CHECK-BE-NEXT: vextsb2w v2, v2560; CHECK-BE-NEXT: xvcvsxwsp vs3, v2561; CHECK-BE-NEXT: stxv vs3, 48(r3)562; CHECK-BE-NEXT: blr563entry:564 %0 = sitofp <16 x i8> %a to <16 x float>565 store <16 x float> %0, ptr %agg.result, align 64566 ret void567}568