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1; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | \2; RUN: FileCheck %s -check-prefix=CHECK-LE3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | \4; RUN: FileCheck %s -check-prefix=CHECK-BE5 6; Check for a vector merge instruction using two inputs7; The shufflevector specifies the even elements, using big endian element 8; ordering. If run on a big endian machine, this should produce the vmrgew 9; instruction. If run on a little endian machine, this should produce the10; vmrgow instruction. Note also that on little endian the input registers 11; are swapped also.12define void @check_merge_even_xy(ptr %A, ptr %B) {13entry:14; CHECK-LE-LABEL: @check_merge_even_xy15; CHECK-BE-LABEL: @check_merge_even_xy16 %tmp = load <16 x i8>, ptr %A17 %tmp2 = load <16 x i8>, ptr %B18 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, 19 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 20 i32 16, i32 17, i32 18, i32 19, 21 i32 8, i32 9, i32 10, i32 11, 22 i32 24, i32 25, i32 26, i32 27>23; CHECK-LE: vmrgow 2, 3, 224; CHECK-BE: vmrgew 2, 2, 325 store <16 x i8> %tmp3, ptr %A26 ret void27; CHECK-LE: blr28; CHECK-BE: blr29}30 31; Check for a vector merge instruction using a single input. 32; The shufflevector specifies the even elements, using big endian element 33; ordering. If run on a big endian machine, this should produce the vmrgew 34; instruction. If run on a little endian machine, this should produce the35; vmrgow instruction. 36define void @check_merge_even_xx(ptr %A) {37entry:38; CHECK-LE-LABEL: @check_merge_even_xx39; CHECK-BE-LABEL: @check_merge_even_xx40 %tmp = load <16 x i8>, ptr %A41 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, 42 <16 x i32> <i32 0, i32 1, i32 2, i32 3, 43 i32 0, i32 1, i32 2, i32 3, 44 i32 8, i32 9, i32 10, i32 11, 45 i32 8, i32 9, i32 10, i32 11>46; CHECK-LE: vmrgow 2, 2, 247; CHECK-BE: vmrgew 2, 2, 248 store <16 x i8> %tmp2, ptr %A49 ret void50; CHECK-LE: blr51; CHECK-BE: blr 52}53 54; Check for a vector merge instruction using two inputs.55; The shufflevector specifies the odd elements, using big endian element 56; ordering. If run on a big endian machine, this should produce the vmrgow 57; instruction. If run on a little endian machine, this should produce the58; vmrgew instruction. Note also that on little endian the input registers 59; are swapped also.60define void @check_merge_odd_xy(ptr %A, ptr %B) {61entry:62; CHECK-LE-LABEL: @check_merge_odd_xy63; CHECK-BE-LABEL: @check_merge_odd_xy64 %tmp = load <16 x i8>, ptr %A65 %tmp2 = load <16 x i8>, ptr %B66 %tmp3 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp2, 67 <16 x i32> <i32 4, i32 5, i32 6, i32 7, 68 i32 20, i32 21, i32 22, i32 23, 69 i32 12, i32 13, i32 14, i32 15, 70 i32 28, i32 29, i32 30, i32 31>71; CHECK-LE: vmrgew 2, 3, 272; CHECK-BE: vmrgow 2, 2, 373 store <16 x i8> %tmp3, ptr %A74 ret void75; CHECK-LE: blr76; CHECK-BE: blr77}78 79; Check for a vector merge instruction using a single input.80; The shufflevector specifies the odd elements, using big endian element 81; ordering. If run on a big endian machine, this should produce the vmrgow 82; instruction. If run on a little endian machine, this should produce the83; vmrgew instruction. 84define void @check_merge_odd_xx(ptr %A) {85entry:86; CHECK-LE-LABEL: @check_merge_odd_xx87; CHECK-BE-LABEL: @check_merge_odd_xx88 %tmp = load <16 x i8>, ptr %A89 %tmp2 = shufflevector <16 x i8> %tmp, <16 x i8> %tmp, 90 <16 x i32> <i32 4, i32 5, i32 6, i32 7, 91 i32 4, i32 5, i32 6, i32 7, 92 i32 12, i32 13, i32 14, i32 15, 93 i32 12, i32 13, i32 14, i32 15>94; CHECK-LE: vmrgew 2, 2, 295; CHECK-BE: vmrgow 2, 2, 296 store <16 x i8> %tmp2, ptr %A97 ret void98; CHECK-LE: blr99; CHECK-BE: blr100}101 102