39 lines · plain
1; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g5 -ppc-disable-perfect-shuffle=false | not grep vperm2 3; TODO: Fix this case when disabling perfect shuffle4 5define <4 x float> @test_uu72(ptr %P1, ptr %P2) {6 %V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]7 %V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]8 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 undef, i32 undef, i32 7, i32 2 > ; <<4 x float>> [#uses=1]9 ret <4 x float> %V310}11 12define <4 x float> @test_30u5(ptr %P1, ptr %P2) {13 %V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]14 %V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]15 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 0, i32 undef, i32 5 > ; <<4 x float>> [#uses=1]16 ret <4 x float> %V317}18 19define <4 x float> @test_3u73(ptr %P1, ptr %P2) {20 %V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]21 %V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]22 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 undef, i32 7, i32 3 > ; <<4 x float>> [#uses=1]23 ret <4 x float> %V324}25 26define <4 x float> @test_3774(ptr %P1, ptr %P2) {27 %V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]28 %V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]29 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 3, i32 7, i32 7, i32 4 > ; <<4 x float>> [#uses=1]30 ret <4 x float> %V331}32 33define <4 x float> @test_4450(ptr %P1, ptr %P2) {34 %V1 = load <4 x float>, ptr %P1 ; <<4 x float>> [#uses=1]35 %V2 = load <4 x float>, ptr %P2 ; <<4 x float>> [#uses=1]36 %V3 = shufflevector <4 x float> %V1, <4 x float> %V2, <4 x i32> < i32 4, i32 4, i32 5, i32 0 > ; <<4 x float>> [#uses=1]37 ret <4 x float> %V338}39