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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s5 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \7; RUN: -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \8; RUN: FileCheck %s9 10; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-aix \11; RUN: -mcpu=future -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \12; RUN: FileCheck %s13 14define <4 x i32> @testVRLWMI(<4 x i32> %a, <4 x i32> %b) {15; CHECK-LABEL: testVRLWMI:16; CHECK: # %bb.0: # %entry17; CHECK-NEXT: xvrlw v2, v2, v318; CHECK-NEXT: blr19entry:20 %0 = tail call <4 x i32> @llvm.ppc.vsx.xvrlw(<4 x i32> %a, <4 x i32> %b)21 ret <4 x i32> %022}23