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1; Check the miscellaneous logical vector operations added in P82; 3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s4; Test x eqv y5define <4 x i32> @test_veqv(<4 x i32> %x, <4 x i32> %y) nounwind {6 %tmp = xor <4 x i32> %x, %y7 %ret_val = xor <4 x i32> %tmp, < i32 -1, i32 -1, i32 -1, i32 -1>8 ret <4 x i32> %ret_val9; CHECK: veqv 2, 2, 310}11 12; Test x vnand y13define <4 x i32> @test_vnand(<4 x i32> %x, <4 x i32> %y) nounwind {14 %tmp = and <4 x i32> %x, %y15 %ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>16 ret <4 x i32> %ret_val17; CHECK: vnand 2, 2, 318}19 20; Test x vorc y and variants21define <4 x i32> @test_vorc(<4 x i32> %x, <4 x i32> %y) nounwind {22 %tmp1 = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>23 %tmp2 = or <4 x i32> %x, %tmp124; CHECK: vorc 3, 2, 3 25 %tmp3 = xor <4 x i32> %tmp2, <i32 -1, i32 -1, i32 -1, i32 -1>26 %tmp4 = or <4 x i32> %tmp3, %x27; CHECK: vorc 2, 2, 328 ret <4 x i32> %tmp429}30