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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \3; RUN: -mcpu=pwr9 -mtriple=powerpc64le < %s | FileCheck %s --check-prefix=PWR9LE4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \5; RUN: -mcpu=pwr9 -mtriple=powerpc64 < %s | FileCheck %s --check-prefix=PWR9BE6; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \7; RUN: -mcpu=pwr10 -mtriple=powerpc64le < %s | FileCheck %s --check-prefix=PWR10LE8; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \9; RUN: -mcpu=pwr10 -mtriple=powerpc64 < %s | FileCheck %s --check-prefix=PWR10BE10 11;;12;; Vectors of i813;;14define dso_local i8 @v2i8(<2 x i8> %a) local_unnamed_addr #0 {15; PWR9LE-LABEL: v2i8:16; PWR9LE: # %bb.0: # %entry17; PWR9LE-NEXT: vspltb v3, v2, 1418; PWR9LE-NEXT: li r3, 019; PWR9LE-NEXT: vaddubm v2, v2, v320; PWR9LE-NEXT: vextubrx r3, r3, v221; PWR9LE-NEXT: blr22;23; PWR9BE-LABEL: v2i8:24; PWR9BE: # %bb.0: # %entry25; PWR9BE-NEXT: vspltb v3, v2, 126; PWR9BE-NEXT: li r3, 027; PWR9BE-NEXT: vaddubm v2, v2, v328; PWR9BE-NEXT: vextublx r3, r3, v229; PWR9BE-NEXT: blr30;31; PWR10LE-LABEL: v2i8:32; PWR10LE: # %bb.0: # %entry33; PWR10LE-NEXT: vspltb v3, v2, 1434; PWR10LE-NEXT: li r3, 035; PWR10LE-NEXT: vaddubm v2, v2, v336; PWR10LE-NEXT: vextubrx r3, r3, v237; PWR10LE-NEXT: blr38;39; PWR10BE-LABEL: v2i8:40; PWR10BE: # %bb.0: # %entry41; PWR10BE-NEXT: vspltb v3, v2, 142; PWR10BE-NEXT: li r3, 043; PWR10BE-NEXT: vaddubm v2, v2, v344; PWR10BE-NEXT: vextublx r3, r3, v245; PWR10BE-NEXT: blr46entry:47 %0 = call i8 @llvm.vector.reduce.add.v2i8(<2 x i8> %a)48 ret i8 %049}50 51define dso_local i8 @v4i8(<4 x i8> %a) local_unnamed_addr #0 {52; PWR9LE-LABEL: v4i8:53; PWR9LE: # %bb.0: # %entry54; PWR9LE-NEXT: vsplth v3, v2, 655; PWR9LE-NEXT: li r3, 056; PWR9LE-NEXT: vaddubm v2, v2, v357; PWR9LE-NEXT: vspltb v3, v2, 1458; PWR9LE-NEXT: vaddubm v2, v2, v359; PWR9LE-NEXT: vextubrx r3, r3, v260; PWR9LE-NEXT: blr61;62; PWR9BE-LABEL: v4i8:63; PWR9BE: # %bb.0: # %entry64; PWR9BE-NEXT: vsplth v3, v2, 165; PWR9BE-NEXT: li r3, 066; PWR9BE-NEXT: vaddubm v2, v2, v367; PWR9BE-NEXT: vspltb v3, v2, 168; PWR9BE-NEXT: vaddubm v2, v2, v369; PWR9BE-NEXT: vextublx r3, r3, v270; PWR9BE-NEXT: blr71;72; PWR10LE-LABEL: v4i8:73; PWR10LE: # %bb.0: # %entry74; PWR10LE-NEXT: vsplth v3, v2, 675; PWR10LE-NEXT: li r3, 076; PWR10LE-NEXT: vaddubm v2, v2, v377; PWR10LE-NEXT: vspltb v3, v2, 1478; PWR10LE-NEXT: vaddubm v2, v2, v379; PWR10LE-NEXT: vextubrx r3, r3, v280; PWR10LE-NEXT: blr81;82; PWR10BE-LABEL: v4i8:83; PWR10BE: # %bb.0: # %entry84; PWR10BE-NEXT: vsplth v3, v2, 185; PWR10BE-NEXT: li r3, 086; PWR10BE-NEXT: vaddubm v2, v2, v387; PWR10BE-NEXT: vspltb v3, v2, 188; PWR10BE-NEXT: vaddubm v2, v2, v389; PWR10BE-NEXT: vextublx r3, r3, v290; PWR10BE-NEXT: blr91entry:92 %0 = call i8 @llvm.vector.reduce.add.v4i8(<4 x i8> %a)93 ret i8 %094}95 96define dso_local i8 @v8i8(<8 x i8> %a) local_unnamed_addr #0 {97; PWR9LE-LABEL: v8i8:98; PWR9LE: # %bb.0: # %entry99; PWR9LE-NEXT: xxspltw v3, v2, 2100; PWR9LE-NEXT: li r3, 0101; PWR9LE-NEXT: vaddubm v2, v2, v3102; PWR9LE-NEXT: vsplth v3, v2, 6103; PWR9LE-NEXT: vaddubm v2, v2, v3104; PWR9LE-NEXT: vspltb v3, v2, 14105; PWR9LE-NEXT: vaddubm v2, v2, v3106; PWR9LE-NEXT: vextubrx r3, r3, v2107; PWR9LE-NEXT: blr108;109; PWR9BE-LABEL: v8i8:110; PWR9BE: # %bb.0: # %entry111; PWR9BE-NEXT: xxspltw v3, v2, 1112; PWR9BE-NEXT: li r3, 0113; PWR9BE-NEXT: vaddubm v2, v2, v3114; PWR9BE-NEXT: vsplth v3, v2, 1115; PWR9BE-NEXT: vaddubm v2, v2, v3116; PWR9BE-NEXT: vspltb v3, v2, 1117; PWR9BE-NEXT: vaddubm v2, v2, v3118; PWR9BE-NEXT: vextublx r3, r3, v2119; PWR9BE-NEXT: blr120;121; PWR10LE-LABEL: v8i8:122; PWR10LE: # %bb.0: # %entry123; PWR10LE-NEXT: xxspltw v3, v2, 2124; PWR10LE-NEXT: li r3, 0125; PWR10LE-NEXT: vaddubm v2, v2, v3126; PWR10LE-NEXT: vsplth v3, v2, 6127; PWR10LE-NEXT: vaddubm v2, v2, v3128; PWR10LE-NEXT: vspltb v3, v2, 14129; PWR10LE-NEXT: vaddubm v2, v2, v3130; PWR10LE-NEXT: vextubrx r3, r3, v2131; PWR10LE-NEXT: blr132;133; PWR10BE-LABEL: v8i8:134; PWR10BE: # %bb.0: # %entry135; PWR10BE-NEXT: xxspltw v3, v2, 1136; PWR10BE-NEXT: li r3, 0137; PWR10BE-NEXT: vaddubm v2, v2, v3138; PWR10BE-NEXT: vsplth v3, v2, 1139; PWR10BE-NEXT: vaddubm v2, v2, v3140; PWR10BE-NEXT: vspltb v3, v2, 1141; PWR10BE-NEXT: vaddubm v2, v2, v3142; PWR10BE-NEXT: vextublx r3, r3, v2143; PWR10BE-NEXT: blr144entry:145 %0 = call i8 @llvm.vector.reduce.add.v8i8(<8 x i8> %a)146 ret i8 %0147}148 149define dso_local signext i8 @v16i8_sign(<16 x i8> %a) local_unnamed_addr #0 {150; PWR9LE-LABEL: v16i8_sign:151; PWR9LE: # %bb.0: # %entry152; PWR9LE-NEXT: xxswapd v3, v2153; PWR9LE-NEXT: li r3, 0154; PWR9LE-NEXT: vaddubm v2, v2, v3155; PWR9LE-NEXT: xxspltw v3, v2, 2156; PWR9LE-NEXT: vaddubm v2, v2, v3157; PWR9LE-NEXT: vsplth v3, v2, 6158; PWR9LE-NEXT: vaddubm v2, v2, v3159; PWR9LE-NEXT: vspltb v3, v2, 14160; PWR9LE-NEXT: vaddubm v2, v2, v3161; PWR9LE-NEXT: vextubrx r3, r3, v2162; PWR9LE-NEXT: extsb r3, r3163; PWR9LE-NEXT: blr164;165; PWR9BE-LABEL: v16i8_sign:166; PWR9BE: # %bb.0: # %entry167; PWR9BE-NEXT: xxswapd v3, v2168; PWR9BE-NEXT: li r3, 0169; PWR9BE-NEXT: vaddubm v2, v2, v3170; PWR9BE-NEXT: xxspltw v3, v2, 1171; PWR9BE-NEXT: vaddubm v2, v2, v3172; PWR9BE-NEXT: vsplth v3, v2, 1173; PWR9BE-NEXT: vaddubm v2, v2, v3174; PWR9BE-NEXT: vspltb v3, v2, 1175; PWR9BE-NEXT: vaddubm v2, v2, v3176; PWR9BE-NEXT: vextublx r3, r3, v2177; PWR9BE-NEXT: extsb r3, r3178; PWR9BE-NEXT: blr179;180; PWR10LE-LABEL: v16i8_sign:181; PWR10LE: # %bb.0: # %entry182; PWR10LE-NEXT: xxswapd v3, v2183; PWR10LE-NEXT: li r3, 0184; PWR10LE-NEXT: vaddubm v2, v2, v3185; PWR10LE-NEXT: xxspltw v3, v2, 2186; PWR10LE-NEXT: vaddubm v2, v2, v3187; PWR10LE-NEXT: vsplth v3, v2, 6188; PWR10LE-NEXT: vaddubm v2, v2, v3189; PWR10LE-NEXT: vspltb v3, v2, 14190; PWR10LE-NEXT: vaddubm v2, v2, v3191; PWR10LE-NEXT: vextubrx r3, r3, v2192; PWR10LE-NEXT: extsb r3, r3193; PWR10LE-NEXT: blr194;195; PWR10BE-LABEL: v16i8_sign:196; PWR10BE: # %bb.0: # %entry197; PWR10BE-NEXT: xxswapd v3, v2198; PWR10BE-NEXT: li r3, 0199; PWR10BE-NEXT: vaddubm v2, v2, v3200; PWR10BE-NEXT: xxspltw v3, v2, 1201; PWR10BE-NEXT: vaddubm v2, v2, v3202; PWR10BE-NEXT: vsplth v3, v2, 1203; PWR10BE-NEXT: vaddubm v2, v2, v3204; PWR10BE-NEXT: vspltb v3, v2, 1205; PWR10BE-NEXT: vaddubm v2, v2, v3206; PWR10BE-NEXT: vextublx r3, r3, v2207; PWR10BE-NEXT: extsb r3, r3208; PWR10BE-NEXT: blr209entry:210 %0 = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %a)211 ret i8 %0212}213 214define dso_local zeroext i8 @v16i8_zero(<16 x i8> %a) local_unnamed_addr #0 {215; PWR9LE-LABEL: v16i8_zero:216; PWR9LE: # %bb.0: # %entry217; PWR9LE-NEXT: xxswapd v3, v2218; PWR9LE-NEXT: li r3, 0219; PWR9LE-NEXT: vaddubm v2, v2, v3220; PWR9LE-NEXT: xxspltw v3, v2, 2221; PWR9LE-NEXT: vaddubm v2, v2, v3222; PWR9LE-NEXT: vsplth v3, v2, 6223; PWR9LE-NEXT: vaddubm v2, v2, v3224; PWR9LE-NEXT: vspltb v3, v2, 14225; PWR9LE-NEXT: vaddubm v2, v2, v3226; PWR9LE-NEXT: vextubrx r3, r3, v2227; PWR9LE-NEXT: clrldi r3, r3, 56228; PWR9LE-NEXT: blr229;230; PWR9BE-LABEL: v16i8_zero:231; PWR9BE: # %bb.0: # %entry232; PWR9BE-NEXT: xxswapd v3, v2233; PWR9BE-NEXT: li r3, 0234; PWR9BE-NEXT: vaddubm v2, v2, v3235; PWR9BE-NEXT: xxspltw v3, v2, 1236; PWR9BE-NEXT: vaddubm v2, v2, v3237; PWR9BE-NEXT: vsplth v3, v2, 1238; PWR9BE-NEXT: vaddubm v2, v2, v3239; PWR9BE-NEXT: vspltb v3, v2, 1240; PWR9BE-NEXT: vaddubm v2, v2, v3241; PWR9BE-NEXT: vextublx r3, r3, v2242; PWR9BE-NEXT: clrldi r3, r3, 56243; PWR9BE-NEXT: blr244;245; PWR10LE-LABEL: v16i8_zero:246; PWR10LE: # %bb.0: # %entry247; PWR10LE-NEXT: xxswapd v3, v2248; PWR10LE-NEXT: li r3, 0249; PWR10LE-NEXT: vaddubm v2, v2, v3250; PWR10LE-NEXT: xxspltw v3, v2, 2251; PWR10LE-NEXT: vaddubm v2, v2, v3252; PWR10LE-NEXT: vsplth v3, v2, 6253; PWR10LE-NEXT: vaddubm v2, v2, v3254; PWR10LE-NEXT: vspltb v3, v2, 14255; PWR10LE-NEXT: vaddubm v2, v2, v3256; PWR10LE-NEXT: vextubrx r3, r3, v2257; PWR10LE-NEXT: clrldi r3, r3, 56258; PWR10LE-NEXT: blr259;260; PWR10BE-LABEL: v16i8_zero:261; PWR10BE: # %bb.0: # %entry262; PWR10BE-NEXT: xxswapd v3, v2263; PWR10BE-NEXT: li r3, 0264; PWR10BE-NEXT: vaddubm v2, v2, v3265; PWR10BE-NEXT: xxspltw v3, v2, 1266; PWR10BE-NEXT: vaddubm v2, v2, v3267; PWR10BE-NEXT: vsplth v3, v2, 1268; PWR10BE-NEXT: vaddubm v2, v2, v3269; PWR10BE-NEXT: vspltb v3, v2, 1270; PWR10BE-NEXT: vaddubm v2, v2, v3271; PWR10BE-NEXT: vextublx r3, r3, v2272; PWR10BE-NEXT: clrldi r3, r3, 56273; PWR10BE-NEXT: blr274entry:275 %0 = call i8 @llvm.vector.reduce.add.v16i8(<16 x i8> %a)276 ret i8 %0277}278 279define dso_local i8 @v32i8(<32 x i8> %a) local_unnamed_addr #0 {280; PWR9LE-LABEL: v32i8:281; PWR9LE: # %bb.0: # %entry282; PWR9LE-NEXT: vaddubm v2, v2, v3283; PWR9LE-NEXT: li r3, 0284; PWR9LE-NEXT: xxswapd v3, v2285; PWR9LE-NEXT: vaddubm v2, v2, v3286; PWR9LE-NEXT: xxspltw v3, v2, 2287; PWR9LE-NEXT: vaddubm v2, v2, v3288; PWR9LE-NEXT: vsplth v3, v2, 6289; PWR9LE-NEXT: vaddubm v2, v2, v3290; PWR9LE-NEXT: vspltb v3, v2, 14291; PWR9LE-NEXT: vaddubm v2, v2, v3292; PWR9LE-NEXT: vextubrx r3, r3, v2293; PWR9LE-NEXT: blr294;295; PWR9BE-LABEL: v32i8:296; PWR9BE: # %bb.0: # %entry297; PWR9BE-NEXT: vaddubm v2, v2, v3298; PWR9BE-NEXT: li r3, 0299; PWR9BE-NEXT: xxswapd v3, v2300; PWR9BE-NEXT: vaddubm v2, v2, v3301; PWR9BE-NEXT: xxspltw v3, v2, 1302; PWR9BE-NEXT: vaddubm v2, v2, v3303; PWR9BE-NEXT: vsplth v3, v2, 1304; PWR9BE-NEXT: vaddubm v2, v2, v3305; PWR9BE-NEXT: vspltb v3, v2, 1306; PWR9BE-NEXT: vaddubm v2, v2, v3307; PWR9BE-NEXT: vextublx r3, r3, v2308; PWR9BE-NEXT: blr309;310; PWR10LE-LABEL: v32i8:311; PWR10LE: # %bb.0: # %entry312; PWR10LE-NEXT: vaddubm v2, v2, v3313; PWR10LE-NEXT: li r3, 0314; PWR10LE-NEXT: xxswapd v3, v2315; PWR10LE-NEXT: vaddubm v2, v2, v3316; PWR10LE-NEXT: xxspltw v3, v2, 2317; PWR10LE-NEXT: vaddubm v2, v2, v3318; PWR10LE-NEXT: vsplth v3, v2, 6319; PWR10LE-NEXT: vaddubm v2, v2, v3320; PWR10LE-NEXT: vspltb v3, v2, 14321; PWR10LE-NEXT: vaddubm v2, v2, v3322; PWR10LE-NEXT: vextubrx r3, r3, v2323; PWR10LE-NEXT: blr324;325; PWR10BE-LABEL: v32i8:326; PWR10BE: # %bb.0: # %entry327; PWR10BE-NEXT: vaddubm v2, v2, v3328; PWR10BE-NEXT: li r3, 0329; PWR10BE-NEXT: xxswapd v3, v2330; PWR10BE-NEXT: vaddubm v2, v2, v3331; PWR10BE-NEXT: xxspltw v3, v2, 1332; PWR10BE-NEXT: vaddubm v2, v2, v3333; PWR10BE-NEXT: vsplth v3, v2, 1334; PWR10BE-NEXT: vaddubm v2, v2, v3335; PWR10BE-NEXT: vspltb v3, v2, 1336; PWR10BE-NEXT: vaddubm v2, v2, v3337; PWR10BE-NEXT: vextublx r3, r3, v2338; PWR10BE-NEXT: blr339entry:340 %0 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> %a)341 ret i8 %0342}343 344declare i8 @llvm.vector.reduce.add.v2i8(<2 x i8>) #0345declare i8 @llvm.vector.reduce.add.v4i8(<4 x i8>) #0346declare i8 @llvm.vector.reduce.add.v8i8(<8 x i8>) #0347declare i8 @llvm.vector.reduce.add.v16i8(<16 x i8>) #0348declare i8 @llvm.vector.reduce.add.v32i8(<32 x i8>) #0349 350;;351;; Vectors of i16352;;353define dso_local i16 @v2i16(<2 x i16> %a) local_unnamed_addr #0 {354; PWR9LE-LABEL: v2i16:355; PWR9LE: # %bb.0: # %entry356; PWR9LE-NEXT: vsplth v3, v2, 6357; PWR9LE-NEXT: li r3, 0358; PWR9LE-NEXT: vadduhm v2, v2, v3359; PWR9LE-NEXT: vextuhrx r3, r3, v2360; PWR9LE-NEXT: blr361;362; PWR9BE-LABEL: v2i16:363; PWR9BE: # %bb.0: # %entry364; PWR9BE-NEXT: vsplth v3, v2, 1365; PWR9BE-NEXT: li r3, 0366; PWR9BE-NEXT: vadduhm v2, v2, v3367; PWR9BE-NEXT: vextuhlx r3, r3, v2368; PWR9BE-NEXT: blr369;370; PWR10LE-LABEL: v2i16:371; PWR10LE: # %bb.0: # %entry372; PWR10LE-NEXT: vsplth v3, v2, 6373; PWR10LE-NEXT: li r3, 0374; PWR10LE-NEXT: vadduhm v2, v2, v3375; PWR10LE-NEXT: vextuhrx r3, r3, v2376; PWR10LE-NEXT: blr377;378; PWR10BE-LABEL: v2i16:379; PWR10BE: # %bb.0: # %entry380; PWR10BE-NEXT: vsplth v3, v2, 1381; PWR10BE-NEXT: li r3, 0382; PWR10BE-NEXT: vadduhm v2, v2, v3383; PWR10BE-NEXT: vextuhlx r3, r3, v2384; PWR10BE-NEXT: blr385entry:386 %0 = call i16 @llvm.vector.reduce.add.v2i16(<2 x i16> %a)387 ret i16 %0388}389 390define dso_local i16 @v4i16(<4 x i16> %a) local_unnamed_addr #0 {391; PWR9LE-LABEL: v4i16:392; PWR9LE: # %bb.0: # %entry393; PWR9LE-NEXT: xxspltw v3, v2, 2394; PWR9LE-NEXT: li r3, 0395; PWR9LE-NEXT: vadduhm v2, v2, v3396; PWR9LE-NEXT: vsplth v3, v2, 6397; PWR9LE-NEXT: vadduhm v2, v2, v3398; PWR9LE-NEXT: vextuhrx r3, r3, v2399; PWR9LE-NEXT: blr400;401; PWR9BE-LABEL: v4i16:402; PWR9BE: # %bb.0: # %entry403; PWR9BE-NEXT: xxspltw v3, v2, 1404; PWR9BE-NEXT: li r3, 0405; PWR9BE-NEXT: vadduhm v2, v2, v3406; PWR9BE-NEXT: vsplth v3, v2, 1407; PWR9BE-NEXT: vadduhm v2, v2, v3408; PWR9BE-NEXT: vextuhlx r3, r3, v2409; PWR9BE-NEXT: blr410;411; PWR10LE-LABEL: v4i16:412; PWR10LE: # %bb.0: # %entry413; PWR10LE-NEXT: xxspltw v3, v2, 2414; PWR10LE-NEXT: li r3, 0415; PWR10LE-NEXT: vadduhm v2, v2, v3416; PWR10LE-NEXT: vsplth v3, v2, 6417; PWR10LE-NEXT: vadduhm v2, v2, v3418; PWR10LE-NEXT: vextuhrx r3, r3, v2419; PWR10LE-NEXT: blr420;421; PWR10BE-LABEL: v4i16:422; PWR10BE: # %bb.0: # %entry423; PWR10BE-NEXT: xxspltw v3, v2, 1424; PWR10BE-NEXT: li r3, 0425; PWR10BE-NEXT: vadduhm v2, v2, v3426; PWR10BE-NEXT: vsplth v3, v2, 1427; PWR10BE-NEXT: vadduhm v2, v2, v3428; PWR10BE-NEXT: vextuhlx r3, r3, v2429; PWR10BE-NEXT: blr430entry:431 %0 = call i16 @llvm.vector.reduce.add.v4i16(<4 x i16> %a)432 ret i16 %0433}434 435define dso_local i16 @v8i16(<8 x i16> %a) local_unnamed_addr #0 {436; PWR9LE-LABEL: v8i16:437; PWR9LE: # %bb.0: # %entry438; PWR9LE-NEXT: xxswapd v3, v2439; PWR9LE-NEXT: li r3, 0440; PWR9LE-NEXT: vadduhm v2, v2, v3441; PWR9LE-NEXT: xxspltw v3, v2, 2442; PWR9LE-NEXT: vadduhm v2, v2, v3443; PWR9LE-NEXT: vsplth v3, v2, 6444; PWR9LE-NEXT: vadduhm v2, v2, v3445; PWR9LE-NEXT: vextuhrx r3, r3, v2446; PWR9LE-NEXT: blr447;448; PWR9BE-LABEL: v8i16:449; PWR9BE: # %bb.0: # %entry450; PWR9BE-NEXT: xxswapd v3, v2451; PWR9BE-NEXT: li r3, 0452; PWR9BE-NEXT: vadduhm v2, v2, v3453; PWR9BE-NEXT: xxspltw v3, v2, 1454; PWR9BE-NEXT: vadduhm v2, v2, v3455; PWR9BE-NEXT: vsplth v3, v2, 1456; PWR9BE-NEXT: vadduhm v2, v2, v3457; PWR9BE-NEXT: vextuhlx r3, r3, v2458; PWR9BE-NEXT: blr459;460; PWR10LE-LABEL: v8i16:461; PWR10LE: # %bb.0: # %entry462; PWR10LE-NEXT: xxswapd v3, v2463; PWR10LE-NEXT: li r3, 0464; PWR10LE-NEXT: vadduhm v2, v2, v3465; PWR10LE-NEXT: xxspltw v3, v2, 2466; PWR10LE-NEXT: vadduhm v2, v2, v3467; PWR10LE-NEXT: vsplth v3, v2, 6468; PWR10LE-NEXT: vadduhm v2, v2, v3469; PWR10LE-NEXT: vextuhrx r3, r3, v2470; PWR10LE-NEXT: blr471;472; PWR10BE-LABEL: v8i16:473; PWR10BE: # %bb.0: # %entry474; PWR10BE-NEXT: xxswapd v3, v2475; PWR10BE-NEXT: li r3, 0476; PWR10BE-NEXT: vadduhm v2, v2, v3477; PWR10BE-NEXT: xxspltw v3, v2, 1478; PWR10BE-NEXT: vadduhm v2, v2, v3479; PWR10BE-NEXT: vsplth v3, v2, 1480; PWR10BE-NEXT: vadduhm v2, v2, v3481; PWR10BE-NEXT: vextuhlx r3, r3, v2482; PWR10BE-NEXT: blr483entry:484 %0 = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %a)485 ret i16 %0486}487 488define dso_local zeroext i16 @v16i16(<16 x i16> %a) local_unnamed_addr #0 {489; PWR9LE-LABEL: v16i16:490; PWR9LE: # %bb.0: # %entry491; PWR9LE-NEXT: vadduhm v2, v2, v3492; PWR9LE-NEXT: li r3, 0493; PWR9LE-NEXT: xxswapd v3, v2494; PWR9LE-NEXT: vadduhm v2, v2, v3495; PWR9LE-NEXT: xxspltw v3, v2, 2496; PWR9LE-NEXT: vadduhm v2, v2, v3497; PWR9LE-NEXT: vsplth v3, v2, 6498; PWR9LE-NEXT: vadduhm v2, v2, v3499; PWR9LE-NEXT: vextuhrx r3, r3, v2500; PWR9LE-NEXT: clrldi r3, r3, 48501; PWR9LE-NEXT: blr502;503; PWR9BE-LABEL: v16i16:504; PWR9BE: # %bb.0: # %entry505; PWR9BE-NEXT: vadduhm v2, v2, v3506; PWR9BE-NEXT: li r3, 0507; PWR9BE-NEXT: xxswapd v3, v2508; PWR9BE-NEXT: vadduhm v2, v2, v3509; PWR9BE-NEXT: xxspltw v3, v2, 1510; PWR9BE-NEXT: vadduhm v2, v2, v3511; PWR9BE-NEXT: vsplth v3, v2, 1512; PWR9BE-NEXT: vadduhm v2, v2, v3513; PWR9BE-NEXT: vextuhlx r3, r3, v2514; PWR9BE-NEXT: clrldi r3, r3, 48515; PWR9BE-NEXT: blr516;517; PWR10LE-LABEL: v16i16:518; PWR10LE: # %bb.0: # %entry519; PWR10LE-NEXT: vadduhm v2, v2, v3520; PWR10LE-NEXT: li r3, 0521; PWR10LE-NEXT: xxswapd v3, v2522; PWR10LE-NEXT: vadduhm v2, v2, v3523; PWR10LE-NEXT: xxspltw v3, v2, 2524; PWR10LE-NEXT: vadduhm v2, v2, v3525; PWR10LE-NEXT: vsplth v3, v2, 6526; PWR10LE-NEXT: vadduhm v2, v2, v3527; PWR10LE-NEXT: vextuhrx r3, r3, v2528; PWR10LE-NEXT: clrldi r3, r3, 48529; PWR10LE-NEXT: blr530;531; PWR10BE-LABEL: v16i16:532; PWR10BE: # %bb.0: # %entry533; PWR10BE-NEXT: vadduhm v2, v2, v3534; PWR10BE-NEXT: li r3, 0535; PWR10BE-NEXT: xxswapd v3, v2536; PWR10BE-NEXT: vadduhm v2, v2, v3537; PWR10BE-NEXT: xxspltw v3, v2, 1538; PWR10BE-NEXT: vadduhm v2, v2, v3539; PWR10BE-NEXT: vsplth v3, v2, 1540; PWR10BE-NEXT: vadduhm v2, v2, v3541; PWR10BE-NEXT: vextuhlx r3, r3, v2542; PWR10BE-NEXT: clrldi r3, r3, 48543; PWR10BE-NEXT: blr544entry:545 %0 = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %a)546 ret i16 %0547}548 549define dso_local signext i16 @v16i8tov16i16_sign(<16 x i8> %a) local_unnamed_addr #0 {550; PWR9LE-LABEL: v16i8tov16i16_sign:551; PWR9LE: # %bb.0: # %entry552; PWR9LE-NEXT: vmrghb v3, v2, v2553; PWR9LE-NEXT: vspltish v4, 8554; PWR9LE-NEXT: li r3, 0555; PWR9LE-NEXT: vmrglb v2, v2, v2556; PWR9LE-NEXT: vslh v3, v3, v4557; PWR9LE-NEXT: vslh v2, v2, v4558; PWR9LE-NEXT: vsrah v3, v3, v4559; PWR9LE-NEXT: vsrah v2, v2, v4560; PWR9LE-NEXT: vadduhm v2, v2, v3561; PWR9LE-NEXT: xxswapd v3, v2562; PWR9LE-NEXT: vadduhm v2, v2, v3563; PWR9LE-NEXT: xxspltw v3, v2, 2564; PWR9LE-NEXT: vadduhm v2, v2, v3565; PWR9LE-NEXT: vsplth v3, v2, 6566; PWR9LE-NEXT: vadduhm v2, v2, v3567; PWR9LE-NEXT: vextuhrx r3, r3, v2568; PWR9LE-NEXT: extsh r3, r3569; PWR9LE-NEXT: blr570;571; PWR9BE-LABEL: v16i8tov16i16_sign:572; PWR9BE: # %bb.0: # %entry573; PWR9BE-NEXT: vmrglb v3, v2, v2574; PWR9BE-NEXT: vspltish v4, 8575; PWR9BE-NEXT: li r3, 0576; PWR9BE-NEXT: vmrghb v2, v2, v2577; PWR9BE-NEXT: vslh v3, v3, v4578; PWR9BE-NEXT: vslh v2, v2, v4579; PWR9BE-NEXT: vsrah v3, v3, v4580; PWR9BE-NEXT: vsrah v2, v2, v4581; PWR9BE-NEXT: vadduhm v2, v2, v3582; PWR9BE-NEXT: xxswapd v3, v2583; PWR9BE-NEXT: vadduhm v2, v2, v3584; PWR9BE-NEXT: xxspltw v3, v2, 1585; PWR9BE-NEXT: vadduhm v2, v2, v3586; PWR9BE-NEXT: vsplth v3, v2, 1587; PWR9BE-NEXT: vadduhm v2, v2, v3588; PWR9BE-NEXT: vextuhlx r3, r3, v2589; PWR9BE-NEXT: extsh r3, r3590; PWR9BE-NEXT: blr591;592; PWR10LE-LABEL: v16i8tov16i16_sign:593; PWR10LE: # %bb.0: # %entry594; PWR10LE-NEXT: vmrghb v3, v2, v2595; PWR10LE-NEXT: xxspltiw v4, 524296596; PWR10LE-NEXT: vmrglb v2, v2, v2597; PWR10LE-NEXT: li r3, 0598; PWR10LE-NEXT: vslh v3, v3, v4599; PWR10LE-NEXT: vslh v2, v2, v4600; PWR10LE-NEXT: vsrah v3, v3, v4601; PWR10LE-NEXT: vsrah v2, v2, v4602; PWR10LE-NEXT: vadduhm v2, v2, v3603; PWR10LE-NEXT: xxswapd v3, v2604; PWR10LE-NEXT: vadduhm v2, v2, v3605; PWR10LE-NEXT: xxspltw v3, v2, 2606; PWR10LE-NEXT: vadduhm v2, v2, v3607; PWR10LE-NEXT: vsplth v3, v2, 6608; PWR10LE-NEXT: vadduhm v2, v2, v3609; PWR10LE-NEXT: vextuhrx r3, r3, v2610; PWR10LE-NEXT: extsh r3, r3611; PWR10LE-NEXT: blr612;613; PWR10BE-LABEL: v16i8tov16i16_sign:614; PWR10BE: # %bb.0: # %entry615; PWR10BE-NEXT: vmrglb v3, v2, v2616; PWR10BE-NEXT: xxspltiw v4, 524296617; PWR10BE-NEXT: vmrghb v2, v2, v2618; PWR10BE-NEXT: li r3, 0619; PWR10BE-NEXT: vslh v3, v3, v4620; PWR10BE-NEXT: vslh v2, v2, v4621; PWR10BE-NEXT: vsrah v3, v3, v4622; PWR10BE-NEXT: vsrah v2, v2, v4623; PWR10BE-NEXT: vadduhm v2, v2, v3624; PWR10BE-NEXT: xxswapd v3, v2625; PWR10BE-NEXT: vadduhm v2, v2, v3626; PWR10BE-NEXT: xxspltw v3, v2, 1627; PWR10BE-NEXT: vadduhm v2, v2, v3628; PWR10BE-NEXT: vsplth v3, v2, 1629; PWR10BE-NEXT: vadduhm v2, v2, v3630; PWR10BE-NEXT: vextuhlx r3, r3, v2631; PWR10BE-NEXT: extsh r3, r3632; PWR10BE-NEXT: blr633entry:634 %0 = sext <16 x i8> %a to <16 x i16>635 %1 = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %0)636 ret i16 %1637}638 639define dso_local zeroext i16 @v16i8tov16i16_zero(<16 x i8> %a) local_unnamed_addr #0 {640; PWR9LE-LABEL: v16i8tov16i16_zero:641; PWR9LE: # %bb.0: # %entry642; PWR9LE-NEXT: xxlxor v3, v3, v3643; PWR9LE-NEXT: li r3, 0644; PWR9LE-NEXT: vmrghb v4, v3, v2645; PWR9LE-NEXT: vmrglb v2, v3, v2646; PWR9LE-NEXT: vadduhm v2, v2, v4647; PWR9LE-NEXT: xxswapd v3, v2648; PWR9LE-NEXT: vadduhm v2, v2, v3649; PWR9LE-NEXT: xxspltw v3, v2, 2650; PWR9LE-NEXT: vadduhm v2, v2, v3651; PWR9LE-NEXT: vsplth v3, v2, 6652; PWR9LE-NEXT: vadduhm v2, v2, v3653; PWR9LE-NEXT: vextuhrx r3, r3, v2654; PWR9LE-NEXT: clrldi r3, r3, 48655; PWR9LE-NEXT: blr656;657; PWR9BE-LABEL: v16i8tov16i16_zero:658; PWR9BE: # %bb.0: # %entry659; PWR9BE-NEXT: xxlxor v3, v3, v3660; PWR9BE-NEXT: li r3, 0661; PWR9BE-NEXT: vmrglb v4, v3, v2662; PWR9BE-NEXT: vmrghb v2, v3, v2663; PWR9BE-NEXT: vadduhm v2, v2, v4664; PWR9BE-NEXT: xxswapd v3, v2665; PWR9BE-NEXT: vadduhm v2, v2, v3666; PWR9BE-NEXT: xxspltw v3, v2, 1667; PWR9BE-NEXT: vadduhm v2, v2, v3668; PWR9BE-NEXT: vsplth v3, v2, 1669; PWR9BE-NEXT: vadduhm v2, v2, v3670; PWR9BE-NEXT: vextuhlx r3, r3, v2671; PWR9BE-NEXT: clrldi r3, r3, 48672; PWR9BE-NEXT: blr673;674; PWR10LE-LABEL: v16i8tov16i16_zero:675; PWR10LE: # %bb.0: # %entry676; PWR10LE-NEXT: xxlxor v3, v3, v3677; PWR10LE-NEXT: li r3, 0678; PWR10LE-NEXT: vmrghb v4, v3, v2679; PWR10LE-NEXT: vmrglb v2, v3, v2680; PWR10LE-NEXT: vadduhm v2, v2, v4681; PWR10LE-NEXT: xxswapd v3, v2682; PWR10LE-NEXT: vadduhm v2, v2, v3683; PWR10LE-NEXT: xxspltw v3, v2, 2684; PWR10LE-NEXT: vadduhm v2, v2, v3685; PWR10LE-NEXT: vsplth v3, v2, 6686; PWR10LE-NEXT: vadduhm v2, v2, v3687; PWR10LE-NEXT: vextuhrx r3, r3, v2688; PWR10LE-NEXT: clrldi r3, r3, 48689; PWR10LE-NEXT: blr690;691; PWR10BE-LABEL: v16i8tov16i16_zero:692; PWR10BE: # %bb.0: # %entry693; PWR10BE-NEXT: xxlxor v3, v3, v3694; PWR10BE-NEXT: li r3, 0695; PWR10BE-NEXT: vmrglb v4, v3, v2696; PWR10BE-NEXT: vmrghb v2, v3, v2697; PWR10BE-NEXT: vadduhm v2, v2, v4698; PWR10BE-NEXT: xxswapd v3, v2699; PWR10BE-NEXT: vadduhm v2, v2, v3700; PWR10BE-NEXT: xxspltw v3, v2, 1701; PWR10BE-NEXT: vadduhm v2, v2, v3702; PWR10BE-NEXT: vsplth v3, v2, 1703; PWR10BE-NEXT: vadduhm v2, v2, v3704; PWR10BE-NEXT: vextuhlx r3, r3, v2705; PWR10BE-NEXT: clrldi r3, r3, 48706; PWR10BE-NEXT: blr707entry:708 %0 = zext <16 x i8> %a to <16 x i16>709 %1 = call i16 @llvm.vector.reduce.add.v16i16(<16 x i16> %0)710 ret i16 %1711}712 713declare i16 @llvm.vector.reduce.add.v2i16(<2 x i16>) #0714declare i16 @llvm.vector.reduce.add.v4i16(<4 x i16>) #0715declare i16 @llvm.vector.reduce.add.v8i16(<8 x i16>) #0716declare i16 @llvm.vector.reduce.add.v16i16(<16 x i16>) #0717 718;;719;; Vectors of i32720;;721define dso_local zeroext i32 @v2i32(<2 x i32> %a) local_unnamed_addr #0 {722; PWR9LE-LABEL: v2i32:723; PWR9LE: # %bb.0: # %entry724; PWR9LE-NEXT: xxspltw v3, v2, 2725; PWR9LE-NEXT: li r3, 0726; PWR9LE-NEXT: vadduwm v2, v2, v3727; PWR9LE-NEXT: vextuwrx r3, r3, v2728; PWR9LE-NEXT: blr729;730; PWR9BE-LABEL: v2i32:731; PWR9BE: # %bb.0: # %entry732; PWR9BE-NEXT: xxspltw v3, v2, 1733; PWR9BE-NEXT: li r3, 0734; PWR9BE-NEXT: vadduwm v2, v2, v3735; PWR9BE-NEXT: vextuwlx r3, r3, v2736; PWR9BE-NEXT: blr737;738; PWR10LE-LABEL: v2i32:739; PWR10LE: # %bb.0: # %entry740; PWR10LE-NEXT: xxspltw v3, v2, 2741; PWR10LE-NEXT: li r3, 0742; PWR10LE-NEXT: vadduwm v2, v2, v3743; PWR10LE-NEXT: vextuwrx r3, r3, v2744; PWR10LE-NEXT: blr745;746; PWR10BE-LABEL: v2i32:747; PWR10BE: # %bb.0: # %entry748; PWR10BE-NEXT: xxspltw v3, v2, 1749; PWR10BE-NEXT: li r3, 0750; PWR10BE-NEXT: vadduwm v2, v2, v3751; PWR10BE-NEXT: vextuwlx r3, r3, v2752; PWR10BE-NEXT: blr753entry:754 %0 = call i32 @llvm.vector.reduce.add.v2i32(<2 x i32> %a)755 ret i32 %0756}757 758define dso_local zeroext i32 @v4i32(<4 x i32> %a) local_unnamed_addr #0 {759; PWR9LE-LABEL: v4i32:760; PWR9LE: # %bb.0: # %entry761; PWR9LE-NEXT: xxswapd v3, v2762; PWR9LE-NEXT: li r3, 0763; PWR9LE-NEXT: vadduwm v2, v2, v3764; PWR9LE-NEXT: xxspltw v3, v2, 2765; PWR9LE-NEXT: vadduwm v2, v2, v3766; PWR9LE-NEXT: vextuwrx r3, r3, v2767; PWR9LE-NEXT: blr768;769; PWR9BE-LABEL: v4i32:770; PWR9BE: # %bb.0: # %entry771; PWR9BE-NEXT: xxswapd v3, v2772; PWR9BE-NEXT: li r3, 0773; PWR9BE-NEXT: vadduwm v2, v2, v3774; PWR9BE-NEXT: xxspltw v3, v2, 1775; PWR9BE-NEXT: vadduwm v2, v2, v3776; PWR9BE-NEXT: vextuwlx r3, r3, v2777; PWR9BE-NEXT: blr778;779; PWR10LE-LABEL: v4i32:780; PWR10LE: # %bb.0: # %entry781; PWR10LE-NEXT: xxswapd v3, v2782; PWR10LE-NEXT: li r3, 0783; PWR10LE-NEXT: vadduwm v2, v2, v3784; PWR10LE-NEXT: xxspltw v3, v2, 2785; PWR10LE-NEXT: vadduwm v2, v2, v3786; PWR10LE-NEXT: vextuwrx r3, r3, v2787; PWR10LE-NEXT: blr788;789; PWR10BE-LABEL: v4i32:790; PWR10BE: # %bb.0: # %entry791; PWR10BE-NEXT: xxswapd v3, v2792; PWR10BE-NEXT: li r3, 0793; PWR10BE-NEXT: vadduwm v2, v2, v3794; PWR10BE-NEXT: xxspltw v3, v2, 1795; PWR10BE-NEXT: vadduwm v2, v2, v3796; PWR10BE-NEXT: vextuwlx r3, r3, v2797; PWR10BE-NEXT: blr798entry:799 %0 = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %a)800 ret i32 %0801}802 803define dso_local zeroext i32 @v8i32(<8 x i32> %a) local_unnamed_addr #0 {804; PWR9LE-LABEL: v8i32:805; PWR9LE: # %bb.0: # %entry806; PWR9LE-NEXT: vadduwm v2, v2, v3807; PWR9LE-NEXT: li r3, 0808; PWR9LE-NEXT: xxswapd v3, v2809; PWR9LE-NEXT: vadduwm v2, v2, v3810; PWR9LE-NEXT: xxspltw v3, v2, 2811; PWR9LE-NEXT: vadduwm v2, v2, v3812; PWR9LE-NEXT: vextuwrx r3, r3, v2813; PWR9LE-NEXT: blr814;815; PWR9BE-LABEL: v8i32:816; PWR9BE: # %bb.0: # %entry817; PWR9BE-NEXT: vadduwm v2, v2, v3818; PWR9BE-NEXT: li r3, 0819; PWR9BE-NEXT: xxswapd v3, v2820; PWR9BE-NEXT: vadduwm v2, v2, v3821; PWR9BE-NEXT: xxspltw v3, v2, 1822; PWR9BE-NEXT: vadduwm v2, v2, v3823; PWR9BE-NEXT: vextuwlx r3, r3, v2824; PWR9BE-NEXT: blr825;826; PWR10LE-LABEL: v8i32:827; PWR10LE: # %bb.0: # %entry828; PWR10LE-NEXT: vadduwm v2, v2, v3829; PWR10LE-NEXT: li r3, 0830; PWR10LE-NEXT: xxswapd v3, v2831; PWR10LE-NEXT: vadduwm v2, v2, v3832; PWR10LE-NEXT: xxspltw v3, v2, 2833; PWR10LE-NEXT: vadduwm v2, v2, v3834; PWR10LE-NEXT: vextuwrx r3, r3, v2835; PWR10LE-NEXT: blr836;837; PWR10BE-LABEL: v8i32:838; PWR10BE: # %bb.0: # %entry839; PWR10BE-NEXT: vadduwm v2, v2, v3840; PWR10BE-NEXT: li r3, 0841; PWR10BE-NEXT: xxswapd v3, v2842; PWR10BE-NEXT: vadduwm v2, v2, v3843; PWR10BE-NEXT: xxspltw v3, v2, 1844; PWR10BE-NEXT: vadduwm v2, v2, v3845; PWR10BE-NEXT: vextuwlx r3, r3, v2846; PWR10BE-NEXT: blr847entry:848 %0 = call i32 @llvm.vector.reduce.add.v8i32(<8 x i32> %a)849 ret i32 %0850}851 852define dso_local zeroext i32 @v16i32(<16 x i32> %a) local_unnamed_addr #0 {853; PWR9LE-LABEL: v16i32:854; PWR9LE: # %bb.0: # %entry855; PWR9LE-NEXT: vadduwm v3, v3, v5856; PWR9LE-NEXT: vadduwm v2, v2, v4857; PWR9LE-NEXT: li r3, 0858; PWR9LE-NEXT: vadduwm v2, v2, v3859; PWR9LE-NEXT: xxswapd v3, v2860; PWR9LE-NEXT: vadduwm v2, v2, v3861; PWR9LE-NEXT: xxspltw v3, v2, 2862; PWR9LE-NEXT: vadduwm v2, v2, v3863; PWR9LE-NEXT: vextuwrx r3, r3, v2864; PWR9LE-NEXT: blr865;866; PWR9BE-LABEL: v16i32:867; PWR9BE: # %bb.0: # %entry868; PWR9BE-NEXT: vadduwm v3, v3, v5869; PWR9BE-NEXT: vadduwm v2, v2, v4870; PWR9BE-NEXT: li r3, 0871; PWR9BE-NEXT: vadduwm v2, v2, v3872; PWR9BE-NEXT: xxswapd v3, v2873; PWR9BE-NEXT: vadduwm v2, v2, v3874; PWR9BE-NEXT: xxspltw v3, v2, 1875; PWR9BE-NEXT: vadduwm v2, v2, v3876; PWR9BE-NEXT: vextuwlx r3, r3, v2877; PWR9BE-NEXT: blr878;879; PWR10LE-LABEL: v16i32:880; PWR10LE: # %bb.0: # %entry881; PWR10LE-NEXT: vadduwm v3, v3, v5882; PWR10LE-NEXT: vadduwm v2, v2, v4883; PWR10LE-NEXT: li r3, 0884; PWR10LE-NEXT: vadduwm v2, v2, v3885; PWR10LE-NEXT: xxswapd v3, v2886; PWR10LE-NEXT: vadduwm v2, v2, v3887; PWR10LE-NEXT: xxspltw v3, v2, 2888; PWR10LE-NEXT: vadduwm v2, v2, v3889; PWR10LE-NEXT: vextuwrx r3, r3, v2890; PWR10LE-NEXT: blr891;892; PWR10BE-LABEL: v16i32:893; PWR10BE: # %bb.0: # %entry894; PWR10BE-NEXT: vadduwm v3, v3, v5895; PWR10BE-NEXT: vadduwm v2, v2, v4896; PWR10BE-NEXT: li r3, 0897; PWR10BE-NEXT: vadduwm v2, v2, v3898; PWR10BE-NEXT: xxswapd v3, v2899; PWR10BE-NEXT: vadduwm v2, v2, v3900; PWR10BE-NEXT: xxspltw v3, v2, 1901; PWR10BE-NEXT: vadduwm v2, v2, v3902; PWR10BE-NEXT: vextuwlx r3, r3, v2903; PWR10BE-NEXT: blr904entry:905 %0 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %a)906 ret i32 %0907}908 909define dso_local zeroext i32 @v32i32(<32 x i32> %a) local_unnamed_addr #0 {910; PWR9LE-LABEL: v32i32:911; PWR9LE: # %bb.0: # %entry912; PWR9LE-NEXT: vadduwm v4, v4, v8913; PWR9LE-NEXT: vadduwm v2, v2, v6914; PWR9LE-NEXT: li r3, 0915; PWR9LE-NEXT: vadduwm v5, v5, v9916; PWR9LE-NEXT: vadduwm v3, v3, v7917; PWR9LE-NEXT: vadduwm v3, v3, v5918; PWR9LE-NEXT: vadduwm v2, v2, v4919; PWR9LE-NEXT: vadduwm v2, v2, v3920; PWR9LE-NEXT: xxswapd v3, v2921; PWR9LE-NEXT: vadduwm v2, v2, v3922; PWR9LE-NEXT: xxspltw v3, v2, 2923; PWR9LE-NEXT: vadduwm v2, v2, v3924; PWR9LE-NEXT: vextuwrx r3, r3, v2925; PWR9LE-NEXT: blr926;927; PWR9BE-LABEL: v32i32:928; PWR9BE: # %bb.0: # %entry929; PWR9BE-NEXT: vadduwm v4, v4, v8930; PWR9BE-NEXT: vadduwm v2, v2, v6931; PWR9BE-NEXT: li r3, 0932; PWR9BE-NEXT: vadduwm v5, v5, v9933; PWR9BE-NEXT: vadduwm v3, v3, v7934; PWR9BE-NEXT: vadduwm v3, v3, v5935; PWR9BE-NEXT: vadduwm v2, v2, v4936; PWR9BE-NEXT: vadduwm v2, v2, v3937; PWR9BE-NEXT: xxswapd v3, v2938; PWR9BE-NEXT: vadduwm v2, v2, v3939; PWR9BE-NEXT: xxspltw v3, v2, 1940; PWR9BE-NEXT: vadduwm v2, v2, v3941; PWR9BE-NEXT: vextuwlx r3, r3, v2942; PWR9BE-NEXT: blr943;944; PWR10LE-LABEL: v32i32:945; PWR10LE: # %bb.0: # %entry946; PWR10LE-NEXT: vadduwm v4, v4, v8947; PWR10LE-NEXT: vadduwm v2, v2, v6948; PWR10LE-NEXT: vadduwm v5, v5, v9949; PWR10LE-NEXT: vadduwm v3, v3, v7950; PWR10LE-NEXT: li r3, 0951; PWR10LE-NEXT: vadduwm v3, v3, v5952; PWR10LE-NEXT: vadduwm v2, v2, v4953; PWR10LE-NEXT: vadduwm v2, v2, v3954; PWR10LE-NEXT: xxswapd v3, v2955; PWR10LE-NEXT: vadduwm v2, v2, v3956; PWR10LE-NEXT: xxspltw v3, v2, 2957; PWR10LE-NEXT: vadduwm v2, v2, v3958; PWR10LE-NEXT: vextuwrx r3, r3, v2959; PWR10LE-NEXT: blr960;961; PWR10BE-LABEL: v32i32:962; PWR10BE: # %bb.0: # %entry963; PWR10BE-NEXT: vadduwm v4, v4, v8964; PWR10BE-NEXT: vadduwm v2, v2, v6965; PWR10BE-NEXT: vadduwm v5, v5, v9966; PWR10BE-NEXT: vadduwm v3, v3, v7967; PWR10BE-NEXT: li r3, 0968; PWR10BE-NEXT: vadduwm v3, v3, v5969; PWR10BE-NEXT: vadduwm v2, v2, v4970; PWR10BE-NEXT: vadduwm v2, v2, v3971; PWR10BE-NEXT: xxswapd v3, v2972; PWR10BE-NEXT: vadduwm v2, v2, v3973; PWR10BE-NEXT: xxspltw v3, v2, 1974; PWR10BE-NEXT: vadduwm v2, v2, v3975; PWR10BE-NEXT: vextuwlx r3, r3, v2976; PWR10BE-NEXT: blr977entry:978 %0 = call i32 @llvm.vector.reduce.add.v32i32(<32 x i32> %a)979 ret i32 %0980}981 982define dso_local signext i32 @v16i8tov16i32_sign(<16 x i8> %a) local_unnamed_addr #0 {983; PWR9LE-LABEL: v16i8tov16i32_sign:984; PWR9LE: # %bb.0: # %entry985; PWR9LE-NEXT: addis r3, r2, .LCPI17_0@toc@ha986; PWR9LE-NEXT: addi r3, r3, .LCPI17_0@toc@l987; PWR9LE-NEXT: lxv v3, 0(r3)988; PWR9LE-NEXT: addis r3, r2, .LCPI17_1@toc@ha989; PWR9LE-NEXT: addi r3, r3, .LCPI17_1@toc@l990; PWR9LE-NEXT: lxv v4, 0(r3)991; PWR9LE-NEXT: addis r3, r2, .LCPI17_2@toc@ha992; PWR9LE-NEXT: vperm v3, v2, v2, v3993; PWR9LE-NEXT: addi r3, r3, .LCPI17_2@toc@l994; PWR9LE-NEXT: lxv v5, 0(r3)995; PWR9LE-NEXT: addis r3, r2, .LCPI17_3@toc@ha996; PWR9LE-NEXT: vextsb2w v3, v3997; PWR9LE-NEXT: vperm v4, v2, v2, v4998; PWR9LE-NEXT: addi r3, r3, .LCPI17_3@toc@l999; PWR9LE-NEXT: lxv v0, 0(r3)1000; PWR9LE-NEXT: vextsb2w v4, v41001; PWR9LE-NEXT: li r3, 01002; PWR9LE-NEXT: vperm v5, v2, v2, v51003; PWR9LE-NEXT: vadduwm v3, v4, v31004; PWR9LE-NEXT: vextsb2w v5, v51005; PWR9LE-NEXT: vperm v2, v2, v2, v01006; PWR9LE-NEXT: vextsb2w v2, v21007; PWR9LE-NEXT: vadduwm v2, v2, v51008; PWR9LE-NEXT: vadduwm v2, v3, v21009; PWR9LE-NEXT: xxswapd v3, v21010; PWR9LE-NEXT: vadduwm v2, v2, v31011; PWR9LE-NEXT: xxspltw v3, v2, 21012; PWR9LE-NEXT: vadduwm v2, v2, v31013; PWR9LE-NEXT: vextuwrx r3, r3, v21014; PWR9LE-NEXT: extsw r3, r31015; PWR9LE-NEXT: blr1016;1017; PWR9BE-LABEL: v16i8tov16i32_sign:1018; PWR9BE: # %bb.0: # %entry1019; PWR9BE-NEXT: addis r3, r2, .LCPI17_0@toc@ha1020; PWR9BE-NEXT: addi r3, r3, .LCPI17_0@toc@l1021; PWR9BE-NEXT: lxv v3, 0(r3)1022; PWR9BE-NEXT: addis r3, r2, .LCPI17_1@toc@ha1023; PWR9BE-NEXT: addi r3, r3, .LCPI17_1@toc@l1024; PWR9BE-NEXT: lxv v4, 0(r3)1025; PWR9BE-NEXT: addis r3, r2, .LCPI17_2@toc@ha1026; PWR9BE-NEXT: vperm v3, v2, v2, v31027; PWR9BE-NEXT: addi r3, r3, .LCPI17_2@toc@l1028; PWR9BE-NEXT: lxv v5, 0(r3)1029; PWR9BE-NEXT: addis r3, r2, .LCPI17_3@toc@ha1030; PWR9BE-NEXT: vextsb2w v3, v31031; PWR9BE-NEXT: vperm v4, v2, v2, v41032; PWR9BE-NEXT: addi r3, r3, .LCPI17_3@toc@l1033; PWR9BE-NEXT: lxv v0, 0(r3)1034; PWR9BE-NEXT: vextsb2w v4, v41035; PWR9BE-NEXT: li r3, 01036; PWR9BE-NEXT: vperm v5, v2, v2, v51037; PWR9BE-NEXT: vadduwm v3, v4, v31038; PWR9BE-NEXT: vextsb2w v5, v51039; PWR9BE-NEXT: vperm v2, v2, v2, v01040; PWR9BE-NEXT: vextsb2w v2, v21041; PWR9BE-NEXT: vadduwm v2, v2, v51042; PWR9BE-NEXT: vadduwm v2, v3, v21043; PWR9BE-NEXT: xxswapd v3, v21044; PWR9BE-NEXT: vadduwm v2, v2, v31045; PWR9BE-NEXT: xxspltw v3, v2, 11046; PWR9BE-NEXT: vadduwm v2, v2, v31047; PWR9BE-NEXT: vextuwlx r3, r3, v21048; PWR9BE-NEXT: extsw r3, r31049; PWR9BE-NEXT: blr1050;1051; PWR10LE-LABEL: v16i8tov16i32_sign:1052; PWR10LE: # %bb.0: # %entry1053; PWR10LE-NEXT: plxv v3, .LCPI17_0@PCREL(0), 11054; PWR10LE-NEXT: plxv v4, .LCPI17_1@PCREL(0), 11055; PWR10LE-NEXT: li r3, 01056; PWR10LE-NEXT: vperm v3, v2, v2, v31057; PWR10LE-NEXT: plxv v5, .LCPI17_2@PCREL(0), 11058; PWR10LE-NEXT: plxv v0, .LCPI17_3@PCREL(0), 11059; PWR10LE-NEXT: vperm v4, v2, v2, v41060; PWR10LE-NEXT: vperm v5, v2, v2, v51061; PWR10LE-NEXT: vperm v2, v2, v2, v01062; PWR10LE-NEXT: vextsb2w v3, v31063; PWR10LE-NEXT: vextsb2w v4, v41064; PWR10LE-NEXT: vextsb2w v5, v51065; PWR10LE-NEXT: vextsb2w v2, v21066; PWR10LE-NEXT: vadduwm v2, v2, v51067; PWR10LE-NEXT: vadduwm v3, v4, v31068; PWR10LE-NEXT: vadduwm v2, v3, v21069; PWR10LE-NEXT: xxswapd v3, v21070; PWR10LE-NEXT: vadduwm v2, v2, v31071; PWR10LE-NEXT: xxspltw v3, v2, 21072; PWR10LE-NEXT: vadduwm v2, v2, v31073; PWR10LE-NEXT: vextuwrx r3, r3, v21074; PWR10LE-NEXT: extsw r3, r31075; PWR10LE-NEXT: blr1076;1077; PWR10BE-LABEL: v16i8tov16i32_sign:1078; PWR10BE: # %bb.0: # %entry1079; PWR10BE-NEXT: addis r3, r2, .LCPI17_0@toc@ha1080; PWR10BE-NEXT: addi r3, r3, .LCPI17_0@toc@l1081; PWR10BE-NEXT: lxv v3, 0(r3)1082; PWR10BE-NEXT: addis r3, r2, .LCPI17_1@toc@ha1083; PWR10BE-NEXT: addi r3, r3, .LCPI17_1@toc@l1084; PWR10BE-NEXT: lxv v4, 0(r3)1085; PWR10BE-NEXT: addis r3, r2, .LCPI17_2@toc@ha1086; PWR10BE-NEXT: vperm v3, v2, v2, v31087; PWR10BE-NEXT: addi r3, r3, .LCPI17_2@toc@l1088; PWR10BE-NEXT: lxv v5, 0(r3)1089; PWR10BE-NEXT: addis r3, r2, .LCPI17_3@toc@ha1090; PWR10BE-NEXT: vextsb2w v3, v31091; PWR10BE-NEXT: vperm v4, v2, v2, v41092; PWR10BE-NEXT: addi r3, r3, .LCPI17_3@toc@l1093; PWR10BE-NEXT: lxv v0, 0(r3)1094; PWR10BE-NEXT: li r3, 01095; PWR10BE-NEXT: vextsb2w v4, v41096; PWR10BE-NEXT: vperm v5, v2, v2, v51097; PWR10BE-NEXT: vadduwm v3, v4, v31098; PWR10BE-NEXT: vextsb2w v5, v51099; PWR10BE-NEXT: vperm v2, v2, v2, v01100; PWR10BE-NEXT: vextsb2w v2, v21101; PWR10BE-NEXT: vadduwm v2, v2, v51102; PWR10BE-NEXT: vadduwm v2, v3, v21103; PWR10BE-NEXT: xxswapd v3, v21104; PWR10BE-NEXT: vadduwm v2, v2, v31105; PWR10BE-NEXT: xxspltw v3, v2, 11106; PWR10BE-NEXT: vadduwm v2, v2, v31107; PWR10BE-NEXT: vextuwlx r3, r3, v21108; PWR10BE-NEXT: extsw r3, r31109; PWR10BE-NEXT: blr1110entry:1111 %0 = sext <16 x i8> %a to <16 x i32>1112 %1 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %0)1113 ret i32 %11114}1115 1116define dso_local zeroext i32 @v16i8tov16i32_zero(<16 x i8> %a) local_unnamed_addr #0 {1117; PWR9LE-LABEL: v16i8tov16i32_zero:1118; PWR9LE: # %bb.0: # %entry1119; PWR9LE-NEXT: addis r3, r2, .LCPI18_0@toc@ha1120; PWR9LE-NEXT: xxlxor v4, v4, v41121; PWR9LE-NEXT: addi r3, r3, .LCPI18_0@toc@l1122; PWR9LE-NEXT: lxv v3, 0(r3)1123; PWR9LE-NEXT: addis r3, r2, .LCPI18_1@toc@ha1124; PWR9LE-NEXT: addi r3, r3, .LCPI18_1@toc@l1125; PWR9LE-NEXT: lxv v5, 0(r3)1126; PWR9LE-NEXT: addis r3, r2, .LCPI18_2@toc@ha1127; PWR9LE-NEXT: vperm v3, v4, v2, v31128; PWR9LE-NEXT: addi r3, r3, .LCPI18_2@toc@l1129; PWR9LE-NEXT: lxv v0, 0(r3)1130; PWR9LE-NEXT: addis r3, r2, .LCPI18_3@toc@ha1131; PWR9LE-NEXT: vperm v5, v4, v2, v51132; PWR9LE-NEXT: addi r3, r3, .LCPI18_3@toc@l1133; PWR9LE-NEXT: lxv v1, 0(r3)1134; PWR9LE-NEXT: vadduwm v3, v5, v31135; PWR9LE-NEXT: li r3, 01136; PWR9LE-NEXT: vperm v0, v4, v2, v01137; PWR9LE-NEXT: vperm v2, v4, v2, v11138; PWR9LE-NEXT: vadduwm v2, v2, v01139; PWR9LE-NEXT: vadduwm v2, v3, v21140; PWR9LE-NEXT: xxswapd v3, v21141; PWR9LE-NEXT: vadduwm v2, v2, v31142; PWR9LE-NEXT: xxspltw v3, v2, 21143; PWR9LE-NEXT: vadduwm v2, v2, v31144; PWR9LE-NEXT: vextuwrx r3, r3, v21145; PWR9LE-NEXT: blr1146;1147; PWR9BE-LABEL: v16i8tov16i32_zero:1148; PWR9BE: # %bb.0: # %entry1149; PWR9BE-NEXT: addis r3, r2, .LCPI18_0@toc@ha1150; PWR9BE-NEXT: xxlxor v4, v4, v41151; PWR9BE-NEXT: addi r3, r3, .LCPI18_0@toc@l1152; PWR9BE-NEXT: lxv v3, 0(r3)1153; PWR9BE-NEXT: addis r3, r2, .LCPI18_1@toc@ha1154; PWR9BE-NEXT: addi r3, r3, .LCPI18_1@toc@l1155; PWR9BE-NEXT: lxv v5, 0(r3)1156; PWR9BE-NEXT: addis r3, r2, .LCPI18_2@toc@ha1157; PWR9BE-NEXT: vperm v3, v4, v2, v31158; PWR9BE-NEXT: addi r3, r3, .LCPI18_2@toc@l1159; PWR9BE-NEXT: lxv v0, 0(r3)1160; PWR9BE-NEXT: addis r3, r2, .LCPI18_3@toc@ha1161; PWR9BE-NEXT: vperm v5, v4, v2, v51162; PWR9BE-NEXT: addi r3, r3, .LCPI18_3@toc@l1163; PWR9BE-NEXT: lxv v1, 0(r3)1164; PWR9BE-NEXT: vadduwm v3, v5, v31165; PWR9BE-NEXT: li r3, 01166; PWR9BE-NEXT: vperm v0, v4, v2, v01167; PWR9BE-NEXT: vperm v2, v4, v2, v11168; PWR9BE-NEXT: vadduwm v2, v2, v01169; PWR9BE-NEXT: vadduwm v2, v3, v21170; PWR9BE-NEXT: xxswapd v3, v21171; PWR9BE-NEXT: vadduwm v2, v2, v31172; PWR9BE-NEXT: xxspltw v3, v2, 11173; PWR9BE-NEXT: vadduwm v2, v2, v31174; PWR9BE-NEXT: vextuwlx r3, r3, v21175; PWR9BE-NEXT: blr1176;1177; PWR10LE-LABEL: v16i8tov16i32_zero:1178; PWR10LE: # %bb.0: # %entry1179; PWR10LE-NEXT: plxv v3, .LCPI18_0@PCREL(0), 11180; PWR10LE-NEXT: plxv v5, .LCPI18_1@PCREL(0), 11181; PWR10LE-NEXT: xxlxor v4, v4, v41182; PWR10LE-NEXT: li r3, 01183; PWR10LE-NEXT: vperm v3, v4, v2, v31184; PWR10LE-NEXT: plxv v0, .LCPI18_2@PCREL(0), 11185; PWR10LE-NEXT: plxv v1, .LCPI18_3@PCREL(0), 11186; PWR10LE-NEXT: vperm v5, v4, v2, v51187; PWR10LE-NEXT: vperm v0, v4, v2, v01188; PWR10LE-NEXT: vperm v2, v4, v2, v11189; PWR10LE-NEXT: vadduwm v2, v2, v01190; PWR10LE-NEXT: vadduwm v3, v5, v31191; PWR10LE-NEXT: vadduwm v2, v3, v21192; PWR10LE-NEXT: xxswapd v3, v21193; PWR10LE-NEXT: vadduwm v2, v2, v31194; PWR10LE-NEXT: xxspltw v3, v2, 21195; PWR10LE-NEXT: vadduwm v2, v2, v31196; PWR10LE-NEXT: vextuwrx r3, r3, v21197; PWR10LE-NEXT: blr1198;1199; PWR10BE-LABEL: v16i8tov16i32_zero:1200; PWR10BE: # %bb.0: # %entry1201; PWR10BE-NEXT: addis r3, r2, .LCPI18_0@toc@ha1202; PWR10BE-NEXT: xxlxor v4, v4, v41203; PWR10BE-NEXT: addi r3, r3, .LCPI18_0@toc@l1204; PWR10BE-NEXT: lxv v3, 0(r3)1205; PWR10BE-NEXT: addis r3, r2, .LCPI18_1@toc@ha1206; PWR10BE-NEXT: addi r3, r3, .LCPI18_1@toc@l1207; PWR10BE-NEXT: lxv v5, 0(r3)1208; PWR10BE-NEXT: addis r3, r2, .LCPI18_2@toc@ha1209; PWR10BE-NEXT: vperm v3, v4, v2, v31210; PWR10BE-NEXT: addi r3, r3, .LCPI18_2@toc@l1211; PWR10BE-NEXT: lxv v0, 0(r3)1212; PWR10BE-NEXT: addis r3, r2, .LCPI18_3@toc@ha1213; PWR10BE-NEXT: vperm v5, v4, v2, v51214; PWR10BE-NEXT: addi r3, r3, .LCPI18_3@toc@l1215; PWR10BE-NEXT: lxv v1, 0(r3)1216; PWR10BE-NEXT: li r3, 01217; PWR10BE-NEXT: vadduwm v3, v5, v31218; PWR10BE-NEXT: vperm v0, v4, v2, v01219; PWR10BE-NEXT: vperm v2, v4, v2, v11220; PWR10BE-NEXT: vadduwm v2, v2, v01221; PWR10BE-NEXT: vadduwm v2, v3, v21222; PWR10BE-NEXT: xxswapd v3, v21223; PWR10BE-NEXT: vadduwm v2, v2, v31224; PWR10BE-NEXT: xxspltw v3, v2, 11225; PWR10BE-NEXT: vadduwm v2, v2, v31226; PWR10BE-NEXT: vextuwlx r3, r3, v21227; PWR10BE-NEXT: blr1228entry:1229 %0 = zext <16 x i8> %a to <16 x i32>1230 %1 = call i32 @llvm.vector.reduce.add.v16i32(<16 x i32> %0)1231 ret i32 %11232}1233 1234declare i32 @llvm.vector.reduce.add.v2i32(<2 x i32>) #01235declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #01236declare i32 @llvm.vector.reduce.add.v8i32(<8 x i32>) #01237declare i32 @llvm.vector.reduce.add.v16i32(<16 x i32>) #01238declare i32 @llvm.vector.reduce.add.v32i32(<32 x i32>) #01239 1240;;1241;; Vectors of i641242;;1243define dso_local i64 @v2i64(<2 x i64> %a) local_unnamed_addr #0 {1244; PWR9LE-LABEL: v2i64:1245; PWR9LE: # %bb.0: # %entry1246; PWR9LE-NEXT: xxswapd v3, v21247; PWR9LE-NEXT: vaddudm v2, v2, v31248; PWR9LE-NEXT: mfvsrld r3, v21249; PWR9LE-NEXT: blr1250;1251; PWR9BE-LABEL: v2i64:1252; PWR9BE: # %bb.0: # %entry1253; PWR9BE-NEXT: xxswapd v3, v21254; PWR9BE-NEXT: vaddudm v2, v2, v31255; PWR9BE-NEXT: mfvsrd r3, v21256; PWR9BE-NEXT: blr1257;1258; PWR10LE-LABEL: v2i64:1259; PWR10LE: # %bb.0: # %entry1260; PWR10LE-NEXT: xxswapd v3, v21261; PWR10LE-NEXT: vaddudm v2, v2, v31262; PWR10LE-NEXT: mfvsrld r3, v21263; PWR10LE-NEXT: blr1264;1265; PWR10BE-LABEL: v2i64:1266; PWR10BE: # %bb.0: # %entry1267; PWR10BE-NEXT: xxswapd v3, v21268; PWR10BE-NEXT: vaddudm v2, v2, v31269; PWR10BE-NEXT: mfvsrd r3, v21270; PWR10BE-NEXT: blr1271entry:1272 %0 = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %a)1273 ret i64 %01274}1275 1276define dso_local i64 @v4i64(<4 x i64> %a) local_unnamed_addr #0 {1277; PWR9LE-LABEL: v4i64:1278; PWR9LE: # %bb.0: # %entry1279; PWR9LE-NEXT: vaddudm v2, v2, v31280; PWR9LE-NEXT: xxswapd v3, v21281; PWR9LE-NEXT: vaddudm v2, v2, v31282; PWR9LE-NEXT: mfvsrld r3, v21283; PWR9LE-NEXT: blr1284;1285; PWR9BE-LABEL: v4i64:1286; PWR9BE: # %bb.0: # %entry1287; PWR9BE-NEXT: vaddudm v2, v2, v31288; PWR9BE-NEXT: xxswapd v3, v21289; PWR9BE-NEXT: vaddudm v2, v2, v31290; PWR9BE-NEXT: mfvsrd r3, v21291; PWR9BE-NEXT: blr1292;1293; PWR10LE-LABEL: v4i64:1294; PWR10LE: # %bb.0: # %entry1295; PWR10LE-NEXT: vaddudm v2, v2, v31296; PWR10LE-NEXT: xxswapd v3, v21297; PWR10LE-NEXT: vaddudm v2, v2, v31298; PWR10LE-NEXT: mfvsrld r3, v21299; PWR10LE-NEXT: blr1300;1301; PWR10BE-LABEL: v4i64:1302; PWR10BE: # %bb.0: # %entry1303; PWR10BE-NEXT: vaddudm v2, v2, v31304; PWR10BE-NEXT: xxswapd v3, v21305; PWR10BE-NEXT: vaddudm v2, v2, v31306; PWR10BE-NEXT: mfvsrd r3, v21307; PWR10BE-NEXT: blr1308entry:1309 %0 = call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> %a)1310 ret i64 %01311}1312 1313define dso_local i64 @v8i64(<8 x i64> %a) local_unnamed_addr #0 {1314; PWR9LE-LABEL: v8i64:1315; PWR9LE: # %bb.0: # %entry1316; PWR9LE-NEXT: vaddudm v3, v3, v51317; PWR9LE-NEXT: vaddudm v2, v2, v41318; PWR9LE-NEXT: vaddudm v2, v2, v31319; PWR9LE-NEXT: xxswapd v3, v21320; PWR9LE-NEXT: vaddudm v2, v2, v31321; PWR9LE-NEXT: mfvsrld r3, v21322; PWR9LE-NEXT: blr1323;1324; PWR9BE-LABEL: v8i64:1325; PWR9BE: # %bb.0: # %entry1326; PWR9BE-NEXT: vaddudm v3, v3, v51327; PWR9BE-NEXT: vaddudm v2, v2, v41328; PWR9BE-NEXT: vaddudm v2, v2, v31329; PWR9BE-NEXT: xxswapd v3, v21330; PWR9BE-NEXT: vaddudm v2, v2, v31331; PWR9BE-NEXT: mfvsrd r3, v21332; PWR9BE-NEXT: blr1333;1334; PWR10LE-LABEL: v8i64:1335; PWR10LE: # %bb.0: # %entry1336; PWR10LE-NEXT: vaddudm v3, v3, v51337; PWR10LE-NEXT: vaddudm v2, v2, v41338; PWR10LE-NEXT: vaddudm v2, v2, v31339; PWR10LE-NEXT: xxswapd v3, v21340; PWR10LE-NEXT: vaddudm v2, v2, v31341; PWR10LE-NEXT: mfvsrld r3, v21342; PWR10LE-NEXT: blr1343;1344; PWR10BE-LABEL: v8i64:1345; PWR10BE: # %bb.0: # %entry1346; PWR10BE-NEXT: vaddudm v3, v3, v51347; PWR10BE-NEXT: vaddudm v2, v2, v41348; PWR10BE-NEXT: vaddudm v2, v2, v31349; PWR10BE-NEXT: xxswapd v3, v21350; PWR10BE-NEXT: vaddudm v2, v2, v31351; PWR10BE-NEXT: mfvsrd r3, v21352; PWR10BE-NEXT: blr1353entry:1354 %0 = call i64 @llvm.vector.reduce.add.v8i64(<8 x i64> %a)1355 ret i64 %01356}1357 1358define dso_local i64 @v16i64(<16 x i64> %a) local_unnamed_addr #0 {1359; PWR9LE-LABEL: v16i64:1360; PWR9LE: # %bb.0: # %entry1361; PWR9LE-NEXT: vaddudm v4, v4, v81362; PWR9LE-NEXT: vaddudm v2, v2, v61363; PWR9LE-NEXT: vaddudm v5, v5, v91364; PWR9LE-NEXT: vaddudm v3, v3, v71365; PWR9LE-NEXT: vaddudm v3, v3, v51366; PWR9LE-NEXT: vaddudm v2, v2, v41367; PWR9LE-NEXT: vaddudm v2, v2, v31368; PWR9LE-NEXT: xxswapd v3, v21369; PWR9LE-NEXT: vaddudm v2, v2, v31370; PWR9LE-NEXT: mfvsrld r3, v21371; PWR9LE-NEXT: blr1372;1373; PWR9BE-LABEL: v16i64:1374; PWR9BE: # %bb.0: # %entry1375; PWR9BE-NEXT: vaddudm v4, v4, v81376; PWR9BE-NEXT: vaddudm v2, v2, v61377; PWR9BE-NEXT: vaddudm v5, v5, v91378; PWR9BE-NEXT: vaddudm v3, v3, v71379; PWR9BE-NEXT: vaddudm v3, v3, v51380; PWR9BE-NEXT: vaddudm v2, v2, v41381; PWR9BE-NEXT: vaddudm v2, v2, v31382; PWR9BE-NEXT: xxswapd v3, v21383; PWR9BE-NEXT: vaddudm v2, v2, v31384; PWR9BE-NEXT: mfvsrd r3, v21385; PWR9BE-NEXT: blr1386;1387; PWR10LE-LABEL: v16i64:1388; PWR10LE: # %bb.0: # %entry1389; PWR10LE-NEXT: vaddudm v4, v4, v81390; PWR10LE-NEXT: vaddudm v5, v5, v91391; PWR10LE-NEXT: vaddudm v3, v3, v71392; PWR10LE-NEXT: vaddudm v3, v3, v51393; PWR10LE-NEXT: vaddudm v2, v2, v61394; PWR10LE-NEXT: vaddudm v2, v2, v41395; PWR10LE-NEXT: vaddudm v2, v2, v31396; PWR10LE-NEXT: xxswapd v3, v21397; PWR10LE-NEXT: vaddudm v2, v2, v31398; PWR10LE-NEXT: mfvsrld r3, v21399; PWR10LE-NEXT: blr1400;1401; PWR10BE-LABEL: v16i64:1402; PWR10BE: # %bb.0: # %entry1403; PWR10BE-NEXT: vaddudm v4, v4, v81404; PWR10BE-NEXT: vaddudm v5, v5, v91405; PWR10BE-NEXT: vaddudm v3, v3, v71406; PWR10BE-NEXT: vaddudm v3, v3, v51407; PWR10BE-NEXT: vaddudm v2, v2, v61408; PWR10BE-NEXT: vaddudm v2, v2, v41409; PWR10BE-NEXT: vaddudm v2, v2, v31410; PWR10BE-NEXT: xxswapd v3, v21411; PWR10BE-NEXT: vaddudm v2, v2, v31412; PWR10BE-NEXT: mfvsrd r3, v21413; PWR10BE-NEXT: blr1414entry:1415 %0 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %a)1416 ret i64 %01417}1418 1419define dso_local i64 @v16i8tov16i64_sign(<16 x i8> %a) local_unnamed_addr #0 {1420; PWR9LE-LABEL: v16i8tov16i64_sign:1421; PWR9LE: # %bb.0: # %entry1422; PWR9LE-NEXT: addis r3, r2, .LCPI23_0@toc@ha1423; PWR9LE-NEXT: addi r3, r3, .LCPI23_0@toc@l1424; PWR9LE-NEXT: lxv v3, 0(r3)1425; PWR9LE-NEXT: addis r3, r2, .LCPI23_1@toc@ha1426; PWR9LE-NEXT: addi r3, r3, .LCPI23_1@toc@l1427; PWR9LE-NEXT: lxv v4, 0(r3)1428; PWR9LE-NEXT: addis r3, r2, .LCPI23_2@toc@ha1429; PWR9LE-NEXT: vperm v3, v2, v2, v31430; PWR9LE-NEXT: addi r3, r3, .LCPI23_2@toc@l1431; PWR9LE-NEXT: lxv v5, 0(r3)1432; PWR9LE-NEXT: addis r3, r2, .LCPI23_3@toc@ha1433; PWR9LE-NEXT: vextsb2d v3, v31434; PWR9LE-NEXT: vperm v4, v2, v2, v41435; PWR9LE-NEXT: addi r3, r3, .LCPI23_3@toc@l1436; PWR9LE-NEXT: lxv v0, 0(r3)1437; PWR9LE-NEXT: addis r3, r2, .LCPI23_4@toc@ha1438; PWR9LE-NEXT: vextsb2d v4, v41439; PWR9LE-NEXT: vperm v5, v2, v2, v51440; PWR9LE-NEXT: addi r3, r3, .LCPI23_4@toc@l1441; PWR9LE-NEXT: vaddudm v3, v4, v31442; PWR9LE-NEXT: lxv v1, 0(r3)1443; PWR9LE-NEXT: addis r3, r2, .LCPI23_5@toc@ha1444; PWR9LE-NEXT: vextsb2d v5, v51445; PWR9LE-NEXT: vperm v0, v2, v2, v01446; PWR9LE-NEXT: addi r3, r3, .LCPI23_5@toc@l1447; PWR9LE-NEXT: lxv v6, 0(r3)1448; PWR9LE-NEXT: addis r3, r2, .LCPI23_6@toc@ha1449; PWR9LE-NEXT: vperm v1, v2, v2, v11450; PWR9LE-NEXT: vextsb2d v0, v01451; PWR9LE-NEXT: addi r3, r3, .LCPI23_6@toc@l1452; PWR9LE-NEXT: vaddudm v5, v0, v51453; PWR9LE-NEXT: lxv v7, 0(r3)1454; PWR9LE-NEXT: addis r3, r2, .LCPI23_7@toc@ha1455; PWR9LE-NEXT: vperm v6, v2, v2, v61456; PWR9LE-NEXT: vextsb2d v1, v11457; PWR9LE-NEXT: vaddudm v3, v3, v51458; PWR9LE-NEXT: addi r3, r3, .LCPI23_7@toc@l1459; PWR9LE-NEXT: lxv v8, 0(r3)1460; PWR9LE-NEXT: vextsb2d v6, v61461; PWR9LE-NEXT: vperm v7, v2, v2, v71462; PWR9LE-NEXT: vaddudm v1, v6, v11463; PWR9LE-NEXT: vextsb2d v7, v71464; PWR9LE-NEXT: vperm v2, v2, v2, v81465; PWR9LE-NEXT: vextsb2d v2, v21466; PWR9LE-NEXT: vaddudm v2, v2, v71467; PWR9LE-NEXT: vaddudm v2, v1, v21468; PWR9LE-NEXT: vaddudm v2, v2, v31469; PWR9LE-NEXT: xxswapd v3, v21470; PWR9LE-NEXT: vaddudm v2, v2, v31471; PWR9LE-NEXT: mfvsrld r3, v21472; PWR9LE-NEXT: blr1473;1474; PWR9BE-LABEL: v16i8tov16i64_sign:1475; PWR9BE: # %bb.0: # %entry1476; PWR9BE-NEXT: addis r3, r2, .LCPI23_0@toc@ha1477; PWR9BE-NEXT: addi r3, r3, .LCPI23_0@toc@l1478; PWR9BE-NEXT: lxv v3, 0(r3)1479; PWR9BE-NEXT: addis r3, r2, .LCPI23_1@toc@ha1480; PWR9BE-NEXT: addi r3, r3, .LCPI23_1@toc@l1481; PWR9BE-NEXT: lxv v4, 0(r3)1482; PWR9BE-NEXT: addis r3, r2, .LCPI23_2@toc@ha1483; PWR9BE-NEXT: vperm v3, v2, v2, v31484; PWR9BE-NEXT: addi r3, r3, .LCPI23_2@toc@l1485; PWR9BE-NEXT: lxv v5, 0(r3)1486; PWR9BE-NEXT: addis r3, r2, .LCPI23_3@toc@ha1487; PWR9BE-NEXT: vextsb2d v3, v31488; PWR9BE-NEXT: vperm v4, v2, v2, v41489; PWR9BE-NEXT: addi r3, r3, .LCPI23_3@toc@l1490; PWR9BE-NEXT: lxv v0, 0(r3)1491; PWR9BE-NEXT: addis r3, r2, .LCPI23_4@toc@ha1492; PWR9BE-NEXT: vextsb2d v4, v41493; PWR9BE-NEXT: vperm v5, v2, v2, v51494; PWR9BE-NEXT: addi r3, r3, .LCPI23_4@toc@l1495; PWR9BE-NEXT: vaddudm v3, v4, v31496; PWR9BE-NEXT: lxv v1, 0(r3)1497; PWR9BE-NEXT: addis r3, r2, .LCPI23_5@toc@ha1498; PWR9BE-NEXT: vextsb2d v5, v51499; PWR9BE-NEXT: vperm v0, v2, v2, v01500; PWR9BE-NEXT: addi r3, r3, .LCPI23_5@toc@l1501; PWR9BE-NEXT: lxv v6, 0(r3)1502; PWR9BE-NEXT: addis r3, r2, .LCPI23_6@toc@ha1503; PWR9BE-NEXT: vperm v1, v2, v2, v11504; PWR9BE-NEXT: vextsb2d v0, v01505; PWR9BE-NEXT: addi r3, r3, .LCPI23_6@toc@l1506; PWR9BE-NEXT: vaddudm v5, v0, v51507; PWR9BE-NEXT: lxv v7, 0(r3)1508; PWR9BE-NEXT: addis r3, r2, .LCPI23_7@toc@ha1509; PWR9BE-NEXT: vperm v6, v2, v2, v61510; PWR9BE-NEXT: vextsb2d v1, v11511; PWR9BE-NEXT: vaddudm v3, v3, v51512; PWR9BE-NEXT: addi r3, r3, .LCPI23_7@toc@l1513; PWR9BE-NEXT: lxv v8, 0(r3)1514; PWR9BE-NEXT: vextsb2d v6, v61515; PWR9BE-NEXT: vperm v7, v2, v2, v71516; PWR9BE-NEXT: vaddudm v1, v6, v11517; PWR9BE-NEXT: vextsb2d v7, v71518; PWR9BE-NEXT: vperm v2, v2, v2, v81519; PWR9BE-NEXT: vextsb2d v2, v21520; PWR9BE-NEXT: vaddudm v2, v2, v71521; PWR9BE-NEXT: vaddudm v2, v1, v21522; PWR9BE-NEXT: vaddudm v2, v2, v31523; PWR9BE-NEXT: xxswapd v3, v21524; PWR9BE-NEXT: vaddudm v2, v2, v31525; PWR9BE-NEXT: mfvsrd r3, v21526; PWR9BE-NEXT: blr1527;1528; PWR10LE-LABEL: v16i8tov16i64_sign:1529; PWR10LE: # %bb.0: # %entry1530; PWR10LE-NEXT: plxv v3, .LCPI23_0@PCREL(0), 11531; PWR10LE-NEXT: plxv v4, .LCPI23_1@PCREL(0), 11532; PWR10LE-NEXT: vperm v3, v2, v2, v31533; PWR10LE-NEXT: plxv v5, .LCPI23_2@PCREL(0), 11534; PWR10LE-NEXT: plxv v0, .LCPI23_3@PCREL(0), 11535; PWR10LE-NEXT: plxv v1, .LCPI23_4@PCREL(0), 11536; PWR10LE-NEXT: plxv v6, .LCPI23_5@PCREL(0), 11537; PWR10LE-NEXT: plxv v7, .LCPI23_6@PCREL(0), 11538; PWR10LE-NEXT: plxv v8, .LCPI23_7@PCREL(0), 11539; PWR10LE-NEXT: vperm v4, v2, v2, v41540; PWR10LE-NEXT: vperm v5, v2, v2, v51541; PWR10LE-NEXT: vperm v0, v2, v2, v01542; PWR10LE-NEXT: vperm v1, v2, v2, v11543; PWR10LE-NEXT: vperm v6, v2, v2, v61544; PWR10LE-NEXT: vperm v7, v2, v2, v71545; PWR10LE-NEXT: vperm v2, v2, v2, v81546; PWR10LE-NEXT: vextsb2d v5, v51547; PWR10LE-NEXT: vextsb2d v0, v01548; PWR10LE-NEXT: vextsb2d v7, v71549; PWR10LE-NEXT: vextsb2d v2, v21550; PWR10LE-NEXT: vextsb2d v3, v31551; PWR10LE-NEXT: vextsb2d v4, v41552; PWR10LE-NEXT: vextsb2d v1, v11553; PWR10LE-NEXT: vextsb2d v6, v61554; PWR10LE-NEXT: vaddudm v2, v2, v71555; PWR10LE-NEXT: vaddudm v5, v0, v51556; PWR10LE-NEXT: vaddudm v3, v4, v31557; PWR10LE-NEXT: vaddudm v3, v3, v51558; PWR10LE-NEXT: vaddudm v4, v6, v11559; PWR10LE-NEXT: vaddudm v2, v4, v21560; PWR10LE-NEXT: vaddudm v2, v2, v31561; PWR10LE-NEXT: xxswapd v3, v21562; PWR10LE-NEXT: vaddudm v2, v2, v31563; PWR10LE-NEXT: mfvsrld r3, v21564; PWR10LE-NEXT: blr1565;1566; PWR10BE-LABEL: v16i8tov16i64_sign:1567; PWR10BE: # %bb.0: # %entry1568; PWR10BE-NEXT: addis r3, r2, .LCPI23_0@toc@ha1569; PWR10BE-NEXT: xxspltib v1, 2551570; PWR10BE-NEXT: addi r3, r3, .LCPI23_0@toc@l1571; PWR10BE-NEXT: lxv v3, 0(r3)1572; PWR10BE-NEXT: addis r3, r2, .LCPI23_1@toc@ha1573; PWR10BE-NEXT: vsrq v1, v1, v11574; PWR10BE-NEXT: addi r3, r3, .LCPI23_1@toc@l1575; PWR10BE-NEXT: vperm v1, v2, v2, v11576; PWR10BE-NEXT: lxv v4, 0(r3)1577; PWR10BE-NEXT: addis r3, r2, .LCPI23_2@toc@ha1578; PWR10BE-NEXT: vperm v3, v2, v2, v31579; PWR10BE-NEXT: vextsb2d v1, v11580; PWR10BE-NEXT: addi r3, r3, .LCPI23_2@toc@l1581; PWR10BE-NEXT: lxv v5, 0(r3)1582; PWR10BE-NEXT: addis r3, r2, .LCPI23_3@toc@ha1583; PWR10BE-NEXT: vextsb2d v3, v31584; PWR10BE-NEXT: vperm v4, v2, v2, v41585; PWR10BE-NEXT: addi r3, r3, .LCPI23_3@toc@l1586; PWR10BE-NEXT: lxv v0, 0(r3)1587; PWR10BE-NEXT: addis r3, r2, .LCPI23_4@toc@ha1588; PWR10BE-NEXT: vextsb2d v4, v41589; PWR10BE-NEXT: vperm v5, v2, v2, v51590; PWR10BE-NEXT: addi r3, r3, .LCPI23_4@toc@l1591; PWR10BE-NEXT: lxv v6, 0(r3)1592; PWR10BE-NEXT: addis r3, r2, .LCPI23_5@toc@ha1593; PWR10BE-NEXT: vextsb2d v5, v51594; PWR10BE-NEXT: vperm v0, v2, v2, v01595; PWR10BE-NEXT: addi r3, r3, .LCPI23_5@toc@l1596; PWR10BE-NEXT: lxv v7, 0(r3)1597; PWR10BE-NEXT: addis r3, r2, .LCPI23_6@toc@ha1598; PWR10BE-NEXT: vextsb2d v0, v01599; PWR10BE-NEXT: vperm v6, v2, v2, v61600; PWR10BE-NEXT: addi r3, r3, .LCPI23_6@toc@l1601; PWR10BE-NEXT: vaddudm v5, v0, v51602; PWR10BE-NEXT: vaddudm v3, v4, v31603; PWR10BE-NEXT: vaddudm v3, v3, v51604; PWR10BE-NEXT: lxv v8, 0(r3)1605; PWR10BE-NEXT: vextsb2d v6, v61606; PWR10BE-NEXT: vperm v7, v2, v2, v71607; PWR10BE-NEXT: vextsb2d v7, v71608; PWR10BE-NEXT: vperm v2, v2, v2, v81609; PWR10BE-NEXT: vextsb2d v2, v21610; PWR10BE-NEXT: vaddudm v2, v2, v71611; PWR10BE-NEXT: vaddudm v4, v1, v61612; PWR10BE-NEXT: vaddudm v2, v4, v21613; PWR10BE-NEXT: vaddudm v2, v2, v31614; PWR10BE-NEXT: xxswapd v3, v21615; PWR10BE-NEXT: vaddudm v2, v2, v31616; PWR10BE-NEXT: mfvsrd r3, v21617; PWR10BE-NEXT: blr1618entry:1619 %0 = sext <16 x i8> %a to <16 x i64>1620 %1 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %0)1621 ret i64 %11622}1623 1624define dso_local i64 @v16i8tov16i64_zero(<16 x i8> %a) local_unnamed_addr #0 {1625; PWR9LE-LABEL: v16i8tov16i64_zero:1626; PWR9LE: # %bb.0: # %entry1627; PWR9LE-NEXT: addis r3, r2, .LCPI24_0@toc@ha1628; PWR9LE-NEXT: xxlxor v4, v4, v41629; PWR9LE-NEXT: addi r3, r3, .LCPI24_0@toc@l1630; PWR9LE-NEXT: lxv v3, 0(r3)1631; PWR9LE-NEXT: addis r3, r2, .LCPI24_1@toc@ha1632; PWR9LE-NEXT: addi r3, r3, .LCPI24_1@toc@l1633; PWR9LE-NEXT: lxv v5, 0(r3)1634; PWR9LE-NEXT: addis r3, r2, .LCPI24_2@toc@ha1635; PWR9LE-NEXT: vperm v3, v4, v2, v31636; PWR9LE-NEXT: addi r3, r3, .LCPI24_2@toc@l1637; PWR9LE-NEXT: lxv v0, 0(r3)1638; PWR9LE-NEXT: addis r3, r2, .LCPI24_3@toc@ha1639; PWR9LE-NEXT: vperm v5, v4, v2, v51640; PWR9LE-NEXT: addi r3, r3, .LCPI24_3@toc@l1641; PWR9LE-NEXT: lxv v1, 0(r3)1642; PWR9LE-NEXT: addis r3, r2, .LCPI24_4@toc@ha1643; PWR9LE-NEXT: vaddudm v3, v5, v31644; PWR9LE-NEXT: vperm v0, v4, v2, v01645; PWR9LE-NEXT: addi r3, r3, .LCPI24_4@toc@l1646; PWR9LE-NEXT: lxv v6, 0(r3)1647; PWR9LE-NEXT: addis r3, r2, .LCPI24_5@toc@ha1648; PWR9LE-NEXT: vperm v1, v4, v2, v11649; PWR9LE-NEXT: addi r3, r3, .LCPI24_5@toc@l1650; PWR9LE-NEXT: lxv v7, 0(r3)1651; PWR9LE-NEXT: addis r3, r2, .LCPI24_6@toc@ha1652; PWR9LE-NEXT: vaddudm v0, v1, v01653; PWR9LE-NEXT: vperm v6, v4, v2, v61654; PWR9LE-NEXT: addi r3, r3, .LCPI24_6@toc@l1655; PWR9LE-NEXT: lxv v8, 0(r3)1656; PWR9LE-NEXT: addis r3, r2, .LCPI24_7@toc@ha1657; PWR9LE-NEXT: vaddudm v3, v3, v01658; PWR9LE-NEXT: vperm v7, v4, v2, v71659; PWR9LE-NEXT: addi r3, r3, .LCPI24_7@toc@l1660; PWR9LE-NEXT: lxv v9, 0(r3)1661; PWR9LE-NEXT: vperm v8, v4, v2, v81662; PWR9LE-NEXT: vperm v2, v4, v2, v91663; PWR9LE-NEXT: vaddudm v4, v7, v61664; PWR9LE-NEXT: vaddudm v2, v2, v81665; PWR9LE-NEXT: vaddudm v2, v4, v21666; PWR9LE-NEXT: vaddudm v2, v2, v31667; PWR9LE-NEXT: xxswapd v3, v21668; PWR9LE-NEXT: vaddudm v2, v2, v31669; PWR9LE-NEXT: mfvsrld r3, v21670; PWR9LE-NEXT: blr1671;1672; PWR9BE-LABEL: v16i8tov16i64_zero:1673; PWR9BE: # %bb.0: # %entry1674; PWR9BE-NEXT: addis r3, r2, .LCPI24_0@toc@ha1675; PWR9BE-NEXT: xxlxor v4, v4, v41676; PWR9BE-NEXT: addi r3, r3, .LCPI24_0@toc@l1677; PWR9BE-NEXT: lxv v3, 0(r3)1678; PWR9BE-NEXT: addis r3, r2, .LCPI24_1@toc@ha1679; PWR9BE-NEXT: addi r3, r3, .LCPI24_1@toc@l1680; PWR9BE-NEXT: lxv v5, 0(r3)1681; PWR9BE-NEXT: addis r3, r2, .LCPI24_2@toc@ha1682; PWR9BE-NEXT: vperm v3, v4, v2, v31683; PWR9BE-NEXT: addi r3, r3, .LCPI24_2@toc@l1684; PWR9BE-NEXT: lxv v0, 0(r3)1685; PWR9BE-NEXT: addis r3, r2, .LCPI24_3@toc@ha1686; PWR9BE-NEXT: vperm v5, v4, v2, v51687; PWR9BE-NEXT: addi r3, r3, .LCPI24_3@toc@l1688; PWR9BE-NEXT: lxv v1, 0(r3)1689; PWR9BE-NEXT: addis r3, r2, .LCPI24_4@toc@ha1690; PWR9BE-NEXT: vaddudm v3, v5, v31691; PWR9BE-NEXT: vperm v0, v4, v2, v01692; PWR9BE-NEXT: addi r3, r3, .LCPI24_4@toc@l1693; PWR9BE-NEXT: lxv v6, 0(r3)1694; PWR9BE-NEXT: addis r3, r2, .LCPI24_5@toc@ha1695; PWR9BE-NEXT: vperm v1, v4, v2, v11696; PWR9BE-NEXT: addi r3, r3, .LCPI24_5@toc@l1697; PWR9BE-NEXT: lxv v7, 0(r3)1698; PWR9BE-NEXT: addis r3, r2, .LCPI24_6@toc@ha1699; PWR9BE-NEXT: vaddudm v0, v1, v01700; PWR9BE-NEXT: vperm v6, v4, v2, v61701; PWR9BE-NEXT: addi r3, r3, .LCPI24_6@toc@l1702; PWR9BE-NEXT: lxv v8, 0(r3)1703; PWR9BE-NEXT: addis r3, r2, .LCPI24_7@toc@ha1704; PWR9BE-NEXT: vaddudm v3, v3, v01705; PWR9BE-NEXT: vperm v7, v4, v2, v71706; PWR9BE-NEXT: addi r3, r3, .LCPI24_7@toc@l1707; PWR9BE-NEXT: lxv v9, 0(r3)1708; PWR9BE-NEXT: vperm v8, v4, v2, v81709; PWR9BE-NEXT: vperm v2, v4, v2, v91710; PWR9BE-NEXT: vaddudm v4, v7, v61711; PWR9BE-NEXT: vaddudm v2, v2, v81712; PWR9BE-NEXT: vaddudm v2, v4, v21713; PWR9BE-NEXT: vaddudm v2, v2, v31714; PWR9BE-NEXT: xxswapd v3, v21715; PWR9BE-NEXT: vaddudm v2, v2, v31716; PWR9BE-NEXT: mfvsrd r3, v21717; PWR9BE-NEXT: blr1718;1719; PWR10LE-LABEL: v16i8tov16i64_zero:1720; PWR10LE: # %bb.0: # %entry1721; PWR10LE-NEXT: plxv v3, .LCPI24_0@PCREL(0), 11722; PWR10LE-NEXT: plxv v5, .LCPI24_1@PCREL(0), 11723; PWR10LE-NEXT: xxlxor v4, v4, v41724; PWR10LE-NEXT: vperm v3, v4, v2, v31725; PWR10LE-NEXT: plxv v0, .LCPI24_2@PCREL(0), 11726; PWR10LE-NEXT: plxv v1, .LCPI24_3@PCREL(0), 11727; PWR10LE-NEXT: plxv v6, .LCPI24_4@PCREL(0), 11728; PWR10LE-NEXT: plxv v7, .LCPI24_5@PCREL(0), 11729; PWR10LE-NEXT: plxv v8, .LCPI24_6@PCREL(0), 11730; PWR10LE-NEXT: plxv v9, .LCPI24_7@PCREL(0), 11731; PWR10LE-NEXT: vperm v5, v4, v2, v51732; PWR10LE-NEXT: vperm v0, v4, v2, v01733; PWR10LE-NEXT: vperm v1, v4, v2, v11734; PWR10LE-NEXT: vperm v6, v4, v2, v61735; PWR10LE-NEXT: vperm v7, v4, v2, v71736; PWR10LE-NEXT: vperm v8, v4, v2, v81737; PWR10LE-NEXT: vperm v2, v4, v2, v91738; PWR10LE-NEXT: vaddudm v2, v2, v81739; PWR10LE-NEXT: vaddudm v4, v1, v01740; PWR10LE-NEXT: vaddudm v3, v5, v31741; PWR10LE-NEXT: vaddudm v3, v3, v41742; PWR10LE-NEXT: vaddudm v4, v7, v61743; PWR10LE-NEXT: vaddudm v2, v4, v21744; PWR10LE-NEXT: vaddudm v2, v2, v31745; PWR10LE-NEXT: xxswapd v3, v21746; PWR10LE-NEXT: vaddudm v2, v2, v31747; PWR10LE-NEXT: mfvsrld r3, v21748; PWR10LE-NEXT: blr1749;1750; PWR10BE-LABEL: v16i8tov16i64_zero:1751; PWR10BE: # %bb.0: # %entry1752; PWR10BE-NEXT: addis r3, r2, .LCPI24_0@toc@ha1753; PWR10BE-NEXT: xxlxor v4, v4, v41754; PWR10BE-NEXT: addi r3, r3, .LCPI24_0@toc@l1755; PWR10BE-NEXT: lxv v3, 0(r3)1756; PWR10BE-NEXT: addis r3, r2, .LCPI24_1@toc@ha1757; PWR10BE-NEXT: addi r3, r3, .LCPI24_1@toc@l1758; PWR10BE-NEXT: lxv v5, 0(r3)1759; PWR10BE-NEXT: addis r3, r2, .LCPI24_2@toc@ha1760; PWR10BE-NEXT: vperm v3, v4, v2, v31761; PWR10BE-NEXT: addi r3, r3, .LCPI24_2@toc@l1762; PWR10BE-NEXT: lxv v0, 0(r3)1763; PWR10BE-NEXT: addis r3, r2, .LCPI24_3@toc@ha1764; PWR10BE-NEXT: vperm v5, v4, v2, v51765; PWR10BE-NEXT: addi r3, r3, .LCPI24_3@toc@l1766; PWR10BE-NEXT: lxv v1, 0(r3)1767; PWR10BE-NEXT: addis r3, r2, .LCPI24_4@toc@ha1768; PWR10BE-NEXT: vperm v0, v4, v2, v01769; PWR10BE-NEXT: addi r3, r3, .LCPI24_4@toc@l1770; PWR10BE-NEXT: lxv v6, 0(r3)1771; PWR10BE-NEXT: addis r3, r2, .LCPI24_5@toc@ha1772; PWR10BE-NEXT: vperm v1, v4, v2, v11773; PWR10BE-NEXT: addi r3, r3, .LCPI24_5@toc@l1774; PWR10BE-NEXT: lxv v7, 0(r3)1775; PWR10BE-NEXT: addis r3, r2, .LCPI24_6@toc@ha1776; PWR10BE-NEXT: vperm v6, v4, v2, v61777; PWR10BE-NEXT: addi r3, r3, .LCPI24_6@toc@l1778; PWR10BE-NEXT: lxv v8, 0(r3)1779; PWR10BE-NEXT: addis r3, r2, .LCPI24_7@toc@ha1780; PWR10BE-NEXT: vperm v7, v4, v2, v71781; PWR10BE-NEXT: addi r3, r3, .LCPI24_7@toc@l1782; PWR10BE-NEXT: lxv v9, 0(r3)1783; PWR10BE-NEXT: vperm v8, v4, v2, v81784; PWR10BE-NEXT: vperm v2, v4, v2, v91785; PWR10BE-NEXT: vaddudm v4, v1, v01786; PWR10BE-NEXT: vaddudm v3, v5, v31787; PWR10BE-NEXT: vaddudm v3, v3, v41788; PWR10BE-NEXT: vaddudm v2, v2, v81789; PWR10BE-NEXT: vaddudm v4, v7, v61790; PWR10BE-NEXT: vaddudm v2, v4, v21791; PWR10BE-NEXT: vaddudm v2, v2, v31792; PWR10BE-NEXT: xxswapd v3, v21793; PWR10BE-NEXT: vaddudm v2, v2, v31794; PWR10BE-NEXT: mfvsrd r3, v21795; PWR10BE-NEXT: blr1796entry:1797 %0 = zext <16 x i8> %a to <16 x i64>1798 %1 = call i64 @llvm.vector.reduce.add.v16i64(<16 x i64> %0)1799 ret i64 %11800}1801 1802declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #01803declare i64 @llvm.vector.reduce.add.v4i64(<4 x i64>) #01804declare i64 @llvm.vector.reduce.add.v8i64(<8 x i64>) #01805declare i64 @llvm.vector.reduce.add.v16i64(<16 x i64>) #01806 1807attributes #0 = { nounwind }1808