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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \3; RUN:   -mcpu=pwr9 -mtriple=powerpc64le < %s | FileCheck %s --check-prefix=PWR9LE4; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \5; RUN:   -mcpu=pwr9 -mtriple=powerpc64 < %s | FileCheck %s --check-prefix=PWR9BE6; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \7; RUN:   -mcpu=pwr10 -mattr=-paired-vector-memops -mtriple=powerpc64le < %s | \8; RUN:   FileCheck %s --check-prefix=PWR10LE9; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \10; RUN:   -mcpu=pwr10 -mattr=-paired-vector-memops -mtriple=powerpc64 < %s | \11; RUN:   FileCheck %s --check-prefix=PWR10BE12 13;;14;; Vectors of f3215;;16define dso_local float @v2f32(<2 x float> %a) local_unnamed_addr #0 {17; PWR9LE-LABEL: v2f32:18; PWR9LE:       # %bb.0: # %entry19; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 320; PWR9LE-NEXT:    xxswapd vs1, v221; PWR9LE-NEXT:    xscvspdpn f0, vs022; PWR9LE-NEXT:    xscvspdpn f1, vs123; PWR9LE-NEXT:    xsmulsp f1, f0, f124; PWR9LE-NEXT:    blr25;26; PWR9BE-LABEL: v2f32:27; PWR9BE:       # %bb.0: # %entry28; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 129; PWR9BE-NEXT:    xscvspdpn f0, v230; PWR9BE-NEXT:    xscvspdpn f1, vs131; PWR9BE-NEXT:    xsmulsp f1, f0, f132; PWR9BE-NEXT:    blr33;34; PWR10LE-LABEL: v2f32:35; PWR10LE:       # %bb.0: # %entry36; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 337; PWR10LE-NEXT:    xxswapd vs1, v238; PWR10LE-NEXT:    xscvspdpn f0, vs039; PWR10LE-NEXT:    xscvspdpn f1, vs140; PWR10LE-NEXT:    xsmulsp f1, f0, f141; PWR10LE-NEXT:    blr42;43; PWR10BE-LABEL: v2f32:44; PWR10BE:       # %bb.0: # %entry45; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 146; PWR10BE-NEXT:    xscvspdpn f0, v247; PWR10BE-NEXT:    xscvspdpn f1, vs148; PWR10BE-NEXT:    xsmulsp f1, f0, f149; PWR10BE-NEXT:    blr50entry:51  %0 = call float @llvm.vector.reduce.fmul.v2f32(float 1.000000e+00, <2 x float> %a)52  ret float %053}54 55define dso_local float @v2f32_b(<2 x float> %a, float %b) local_unnamed_addr #0 {56; PWR9LE-LABEL: v2f32_b:57; PWR9LE:       # %bb.0: # %entry58; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 359; PWR9LE-NEXT:    xscvspdpn f0, vs060; PWR9LE-NEXT:    xsmulsp f0, f1, f061; PWR9LE-NEXT:    xxswapd vs1, v262; PWR9LE-NEXT:    xscvspdpn f1, vs163; PWR9LE-NEXT:    xsmulsp f1, f0, f164; PWR9LE-NEXT:    blr65;66; PWR9BE-LABEL: v2f32_b:67; PWR9BE:       # %bb.0: # %entry68; PWR9BE-NEXT:    xscvspdpn f0, v269; PWR9BE-NEXT:    xsmulsp f0, f1, f070; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 171; PWR9BE-NEXT:    xscvspdpn f1, vs172; PWR9BE-NEXT:    xsmulsp f1, f0, f173; PWR9BE-NEXT:    blr74;75; PWR10LE-LABEL: v2f32_b:76; PWR10LE:       # %bb.0: # %entry77; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 378; PWR10LE-NEXT:    xscvspdpn f0, vs079; PWR10LE-NEXT:    xsmulsp f0, f1, f080; PWR10LE-NEXT:    xxswapd vs1, v281; PWR10LE-NEXT:    xscvspdpn f1, vs182; PWR10LE-NEXT:    xsmulsp f1, f0, f183; PWR10LE-NEXT:    blr84;85; PWR10BE-LABEL: v2f32_b:86; PWR10BE:       # %bb.0: # %entry87; PWR10BE-NEXT:    xscvspdpn f0, v288; PWR10BE-NEXT:    xsmulsp f0, f1, f089; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 190; PWR10BE-NEXT:    xscvspdpn f1, vs191; PWR10BE-NEXT:    xsmulsp f1, f0, f192; PWR10BE-NEXT:    blr93entry:94  %0 = call float @llvm.vector.reduce.fmul.v2f32(float %b, <2 x float> %a)95  ret float %096}97 98define dso_local float @v2f32_fast(<2 x float> %a) local_unnamed_addr #0 {99; PWR9LE-LABEL: v2f32_fast:100; PWR9LE:       # %bb.0: # %entry101; PWR9LE-NEXT:    xxspltw vs0, v2, 2102; PWR9LE-NEXT:    xvmulsp vs0, v2, vs0103; PWR9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3104; PWR9LE-NEXT:    xscvspdpn f1, vs0105; PWR9LE-NEXT:    blr106;107; PWR9BE-LABEL: v2f32_fast:108; PWR9BE:       # %bb.0: # %entry109; PWR9BE-NEXT:    xxspltw vs0, v2, 1110; PWR9BE-NEXT:    xvmulsp vs0, v2, vs0111; PWR9BE-NEXT:    xscvspdpn f1, vs0112; PWR9BE-NEXT:    blr113;114; PWR10LE-LABEL: v2f32_fast:115; PWR10LE:       # %bb.0: # %entry116; PWR10LE-NEXT:    xxspltw vs0, v2, 2117; PWR10LE-NEXT:    xvmulsp vs0, v2, vs0118; PWR10LE-NEXT:    xxsldwi vs0, vs0, vs0, 3119; PWR10LE-NEXT:    xscvspdpn f1, vs0120; PWR10LE-NEXT:    blr121;122; PWR10BE-LABEL: v2f32_fast:123; PWR10BE:       # %bb.0: # %entry124; PWR10BE-NEXT:    xxspltw vs0, v2, 1125; PWR10BE-NEXT:    xvmulsp vs0, v2, vs0126; PWR10BE-NEXT:    xscvspdpn f1, vs0127; PWR10BE-NEXT:    blr128entry:129  %0 = call fast float @llvm.vector.reduce.fmul.v2f32(float 1.000000e+00, <2 x float> %a)130  ret float %0131}132 133define dso_local float @v4f32(<4 x float> %a) local_unnamed_addr #0 {134; PWR9LE-LABEL: v4f32:135; PWR9LE:       # %bb.0: # %entry136; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3137; PWR9LE-NEXT:    xxswapd vs1, v2138; PWR9LE-NEXT:    xscvspdpn f0, vs0139; PWR9LE-NEXT:    xscvspdpn f1, vs1140; PWR9LE-NEXT:    xsmulsp f0, f0, f1141; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1142; PWR9LE-NEXT:    xscvspdpn f1, vs1143; PWR9LE-NEXT:    xsmulsp f0, f0, f1144; PWR9LE-NEXT:    xscvspdpn f1, v2145; PWR9LE-NEXT:    xsmulsp f1, f0, f1146; PWR9LE-NEXT:    blr147;148; PWR9BE-LABEL: v4f32:149; PWR9BE:       # %bb.0: # %entry150; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1151; PWR9BE-NEXT:    xscvspdpn f0, v2152; PWR9BE-NEXT:    xscvspdpn f1, vs1153; PWR9BE-NEXT:    xsmulsp f0, f0, f1154; PWR9BE-NEXT:    xxswapd vs1, v2155; PWR9BE-NEXT:    xscvspdpn f1, vs1156; PWR9BE-NEXT:    xsmulsp f0, f0, f1157; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3158; PWR9BE-NEXT:    xscvspdpn f1, vs1159; PWR9BE-NEXT:    xsmulsp f1, f0, f1160; PWR9BE-NEXT:    blr161;162; PWR10LE-LABEL: v4f32:163; PWR10LE:       # %bb.0: # %entry164; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3165; PWR10LE-NEXT:    xxswapd vs1, v2166; PWR10LE-NEXT:    xscvspdpn f0, vs0167; PWR10LE-NEXT:    xscvspdpn f1, vs1168; PWR10LE-NEXT:    xsmulsp f0, f0, f1169; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1170; PWR10LE-NEXT:    xscvspdpn f1, vs1171; PWR10LE-NEXT:    xsmulsp f0, f0, f1172; PWR10LE-NEXT:    xscvspdpn f1, v2173; PWR10LE-NEXT:    xsmulsp f1, f0, f1174; PWR10LE-NEXT:    blr175;176; PWR10BE-LABEL: v4f32:177; PWR10BE:       # %bb.0: # %entry178; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1179; PWR10BE-NEXT:    xscvspdpn f0, v2180; PWR10BE-NEXT:    xscvspdpn f1, vs1181; PWR10BE-NEXT:    xsmulsp f0, f0, f1182; PWR10BE-NEXT:    xxswapd vs1, v2183; PWR10BE-NEXT:    xscvspdpn f1, vs1184; PWR10BE-NEXT:    xsmulsp f0, f0, f1185; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3186; PWR10BE-NEXT:    xscvspdpn f1, vs1187; PWR10BE-NEXT:    xsmulsp f1, f0, f1188; PWR10BE-NEXT:    blr189entry:190  %0 = call float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> %a)191  ret float %0192}193 194define dso_local float @v4f32_b(<4 x float> %a, float %b) local_unnamed_addr #0 {195; PWR9LE-LABEL: v4f32_b:196; PWR9LE:       # %bb.0: # %entry197; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3198; PWR9LE-NEXT:    xscvspdpn f0, vs0199; PWR9LE-NEXT:    xsmulsp f0, f1, f0200; PWR9LE-NEXT:    xxswapd vs1, v2201; PWR9LE-NEXT:    xscvspdpn f1, vs1202; PWR9LE-NEXT:    xsmulsp f0, f0, f1203; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1204; PWR9LE-NEXT:    xscvspdpn f1, vs1205; PWR9LE-NEXT:    xsmulsp f0, f0, f1206; PWR9LE-NEXT:    xscvspdpn f1, v2207; PWR9LE-NEXT:    xsmulsp f1, f0, f1208; PWR9LE-NEXT:    blr209;210; PWR9BE-LABEL: v4f32_b:211; PWR9BE:       # %bb.0: # %entry212; PWR9BE-NEXT:    xscvspdpn f0, v2213; PWR9BE-NEXT:    xsmulsp f0, f1, f0214; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1215; PWR9BE-NEXT:    xscvspdpn f1, vs1216; PWR9BE-NEXT:    xsmulsp f0, f0, f1217; PWR9BE-NEXT:    xxswapd vs1, v2218; PWR9BE-NEXT:    xscvspdpn f1, vs1219; PWR9BE-NEXT:    xsmulsp f0, f0, f1220; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3221; PWR9BE-NEXT:    xscvspdpn f1, vs1222; PWR9BE-NEXT:    xsmulsp f1, f0, f1223; PWR9BE-NEXT:    blr224;225; PWR10LE-LABEL: v4f32_b:226; PWR10LE:       # %bb.0: # %entry227; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3228; PWR10LE-NEXT:    xscvspdpn f0, vs0229; PWR10LE-NEXT:    xsmulsp f0, f1, f0230; PWR10LE-NEXT:    xxswapd vs1, v2231; PWR10LE-NEXT:    xscvspdpn f1, vs1232; PWR10LE-NEXT:    xsmulsp f0, f0, f1233; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1234; PWR10LE-NEXT:    xscvspdpn f1, vs1235; PWR10LE-NEXT:    xsmulsp f0, f0, f1236; PWR10LE-NEXT:    xscvspdpn f1, v2237; PWR10LE-NEXT:    xsmulsp f1, f0, f1238; PWR10LE-NEXT:    blr239;240; PWR10BE-LABEL: v4f32_b:241; PWR10BE:       # %bb.0: # %entry242; PWR10BE-NEXT:    xscvspdpn f0, v2243; PWR10BE-NEXT:    xsmulsp f0, f1, f0244; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1245; PWR10BE-NEXT:    xscvspdpn f1, vs1246; PWR10BE-NEXT:    xsmulsp f0, f0, f1247; PWR10BE-NEXT:    xxswapd vs1, v2248; PWR10BE-NEXT:    xscvspdpn f1, vs1249; PWR10BE-NEXT:    xsmulsp f0, f0, f1250; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3251; PWR10BE-NEXT:    xscvspdpn f1, vs1252; PWR10BE-NEXT:    xsmulsp f1, f0, f1253; PWR10BE-NEXT:    blr254entry:255  %0 = call float @llvm.vector.reduce.fmul.v4f32(float %b, <4 x float> %a)256  ret float %0257}258 259define dso_local float @v4f32_fast(<4 x float> %a) local_unnamed_addr #0 {260; PWR9LE-LABEL: v4f32_fast:261; PWR9LE:       # %bb.0: # %entry262; PWR9LE-NEXT:    xxswapd v3, v2263; PWR9LE-NEXT:    xvmulsp vs0, v2, v3264; PWR9LE-NEXT:    xxspltw vs1, vs0, 2265; PWR9LE-NEXT:    xvmulsp vs0, vs0, vs1266; PWR9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3267; PWR9LE-NEXT:    xscvspdpn f1, vs0268; PWR9LE-NEXT:    blr269;270; PWR9BE-LABEL: v4f32_fast:271; PWR9BE:       # %bb.0: # %entry272; PWR9BE-NEXT:    xxswapd v3, v2273; PWR9BE-NEXT:    xvmulsp vs0, v2, v3274; PWR9BE-NEXT:    xxspltw vs1, vs0, 1275; PWR9BE-NEXT:    xvmulsp vs0, vs0, vs1276; PWR9BE-NEXT:    xscvspdpn f1, vs0277; PWR9BE-NEXT:    blr278;279; PWR10LE-LABEL: v4f32_fast:280; PWR10LE:       # %bb.0: # %entry281; PWR10LE-NEXT:    xxswapd v3, v2282; PWR10LE-NEXT:    xvmulsp vs0, v2, v3283; PWR10LE-NEXT:    xxspltw vs1, vs0, 2284; PWR10LE-NEXT:    xvmulsp vs0, vs0, vs1285; PWR10LE-NEXT:    xxsldwi vs0, vs0, vs0, 3286; PWR10LE-NEXT:    xscvspdpn f1, vs0287; PWR10LE-NEXT:    blr288;289; PWR10BE-LABEL: v4f32_fast:290; PWR10BE:       # %bb.0: # %entry291; PWR10BE-NEXT:    xxswapd v3, v2292; PWR10BE-NEXT:    xvmulsp vs0, v2, v3293; PWR10BE-NEXT:    xxspltw vs1, vs0, 1294; PWR10BE-NEXT:    xvmulsp vs0, vs0, vs1295; PWR10BE-NEXT:    xscvspdpn f1, vs0296; PWR10BE-NEXT:    blr297entry:298  %0 = call fast float @llvm.vector.reduce.fmul.v4f32(float 1.000000e+00, <4 x float> %a)299  ret float %0300}301 302define dso_local float @v8f32(<8 x float> %a) local_unnamed_addr #0 {303; PWR9LE-LABEL: v8f32:304; PWR9LE:       # %bb.0: # %entry305; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3306; PWR9LE-NEXT:    xxswapd vs1, v2307; PWR9LE-NEXT:    xscvspdpn f0, vs0308; PWR9LE-NEXT:    xscvspdpn f1, vs1309; PWR9LE-NEXT:    xsmulsp f0, f0, f1310; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1311; PWR9LE-NEXT:    xscvspdpn f1, vs1312; PWR9LE-NEXT:    xsmulsp f0, f0, f1313; PWR9LE-NEXT:    xscvspdpn f1, v2314; PWR9LE-NEXT:    xsmulsp f0, f0, f1315; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 3316; PWR9LE-NEXT:    xscvspdpn f1, vs1317; PWR9LE-NEXT:    xsmulsp f0, f0, f1318; PWR9LE-NEXT:    xxswapd vs1, v3319; PWR9LE-NEXT:    xscvspdpn f1, vs1320; PWR9LE-NEXT:    xsmulsp f0, f0, f1321; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 1322; PWR9LE-NEXT:    xscvspdpn f1, vs1323; PWR9LE-NEXT:    xsmulsp f0, f0, f1324; PWR9LE-NEXT:    xscvspdpn f1, v3325; PWR9LE-NEXT:    xsmulsp f1, f0, f1326; PWR9LE-NEXT:    blr327;328; PWR9BE-LABEL: v8f32:329; PWR9BE:       # %bb.0: # %entry330; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1331; PWR9BE-NEXT:    xscvspdpn f0, v2332; PWR9BE-NEXT:    xscvspdpn f1, vs1333; PWR9BE-NEXT:    xsmulsp f0, f0, f1334; PWR9BE-NEXT:    xxswapd vs1, v2335; PWR9BE-NEXT:    xscvspdpn f1, vs1336; PWR9BE-NEXT:    xsmulsp f0, f0, f1337; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3338; PWR9BE-NEXT:    xscvspdpn f1, vs1339; PWR9BE-NEXT:    xsmulsp f0, f0, f1340; PWR9BE-NEXT:    xscvspdpn f1, v3341; PWR9BE-NEXT:    xsmulsp f0, f0, f1342; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 1343; PWR9BE-NEXT:    xscvspdpn f1, vs1344; PWR9BE-NEXT:    xsmulsp f0, f0, f1345; PWR9BE-NEXT:    xxswapd vs1, v3346; PWR9BE-NEXT:    xscvspdpn f1, vs1347; PWR9BE-NEXT:    xsmulsp f0, f0, f1348; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 3349; PWR9BE-NEXT:    xscvspdpn f1, vs1350; PWR9BE-NEXT:    xsmulsp f1, f0, f1351; PWR9BE-NEXT:    blr352;353; PWR10LE-LABEL: v8f32:354; PWR10LE:       # %bb.0: # %entry355; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3356; PWR10LE-NEXT:    xxswapd vs1, v2357; PWR10LE-NEXT:    xscvspdpn f0, vs0358; PWR10LE-NEXT:    xscvspdpn f1, vs1359; PWR10LE-NEXT:    xsmulsp f0, f0, f1360; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1361; PWR10LE-NEXT:    xscvspdpn f1, vs1362; PWR10LE-NEXT:    xsmulsp f0, f0, f1363; PWR10LE-NEXT:    xscvspdpn f1, v2364; PWR10LE-NEXT:    xsmulsp f0, f0, f1365; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 3366; PWR10LE-NEXT:    xscvspdpn f1, vs1367; PWR10LE-NEXT:    xsmulsp f0, f0, f1368; PWR10LE-NEXT:    xxswapd vs1, v3369; PWR10LE-NEXT:    xscvspdpn f1, vs1370; PWR10LE-NEXT:    xsmulsp f0, f0, f1371; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 1372; PWR10LE-NEXT:    xscvspdpn f1, vs1373; PWR10LE-NEXT:    xsmulsp f0, f0, f1374; PWR10LE-NEXT:    xscvspdpn f1, v3375; PWR10LE-NEXT:    xsmulsp f1, f0, f1376; PWR10LE-NEXT:    blr377;378; PWR10BE-LABEL: v8f32:379; PWR10BE:       # %bb.0: # %entry380; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1381; PWR10BE-NEXT:    xscvspdpn f0, v2382; PWR10BE-NEXT:    xscvspdpn f1, vs1383; PWR10BE-NEXT:    xsmulsp f0, f0, f1384; PWR10BE-NEXT:    xxswapd vs1, v2385; PWR10BE-NEXT:    xscvspdpn f1, vs1386; PWR10BE-NEXT:    xsmulsp f0, f0, f1387; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3388; PWR10BE-NEXT:    xscvspdpn f1, vs1389; PWR10BE-NEXT:    xsmulsp f0, f0, f1390; PWR10BE-NEXT:    xscvspdpn f1, v3391; PWR10BE-NEXT:    xsmulsp f0, f0, f1392; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 1393; PWR10BE-NEXT:    xscvspdpn f1, vs1394; PWR10BE-NEXT:    xsmulsp f0, f0, f1395; PWR10BE-NEXT:    xxswapd vs1, v3396; PWR10BE-NEXT:    xscvspdpn f1, vs1397; PWR10BE-NEXT:    xsmulsp f0, f0, f1398; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 3399; PWR10BE-NEXT:    xscvspdpn f1, vs1400; PWR10BE-NEXT:    xsmulsp f1, f0, f1401; PWR10BE-NEXT:    blr402entry:403  %0 = call float @llvm.vector.reduce.fmul.v8f32(float 1.000000e+00, <8 x float> %a)404  ret float %0405}406 407define dso_local float @v8f32_b(<8 x float> %a, float %b) local_unnamed_addr #0 {408; PWR9LE-LABEL: v8f32_b:409; PWR9LE:       # %bb.0: # %entry410; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3411; PWR9LE-NEXT:    xscvspdpn f0, vs0412; PWR9LE-NEXT:    xsmulsp f0, f1, f0413; PWR9LE-NEXT:    xxswapd vs1, v2414; PWR9LE-NEXT:    xscvspdpn f1, vs1415; PWR9LE-NEXT:    xsmulsp f0, f0, f1416; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1417; PWR9LE-NEXT:    xscvspdpn f1, vs1418; PWR9LE-NEXT:    xsmulsp f0, f0, f1419; PWR9LE-NEXT:    xscvspdpn f1, v2420; PWR9LE-NEXT:    xsmulsp f0, f0, f1421; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 3422; PWR9LE-NEXT:    xscvspdpn f1, vs1423; PWR9LE-NEXT:    xsmulsp f0, f0, f1424; PWR9LE-NEXT:    xxswapd vs1, v3425; PWR9LE-NEXT:    xscvspdpn f1, vs1426; PWR9LE-NEXT:    xsmulsp f0, f0, f1427; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 1428; PWR9LE-NEXT:    xscvspdpn f1, vs1429; PWR9LE-NEXT:    xsmulsp f0, f0, f1430; PWR9LE-NEXT:    xscvspdpn f1, v3431; PWR9LE-NEXT:    xsmulsp f1, f0, f1432; PWR9LE-NEXT:    blr433;434; PWR9BE-LABEL: v8f32_b:435; PWR9BE:       # %bb.0: # %entry436; PWR9BE-NEXT:    xscvspdpn f0, v2437; PWR9BE-NEXT:    xsmulsp f0, f1, f0438; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1439; PWR9BE-NEXT:    xscvspdpn f1, vs1440; PWR9BE-NEXT:    xsmulsp f0, f0, f1441; PWR9BE-NEXT:    xxswapd vs1, v2442; PWR9BE-NEXT:    xscvspdpn f1, vs1443; PWR9BE-NEXT:    xsmulsp f0, f0, f1444; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3445; PWR9BE-NEXT:    xscvspdpn f1, vs1446; PWR9BE-NEXT:    xsmulsp f0, f0, f1447; PWR9BE-NEXT:    xscvspdpn f1, v3448; PWR9BE-NEXT:    xsmulsp f0, f0, f1449; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 1450; PWR9BE-NEXT:    xscvspdpn f1, vs1451; PWR9BE-NEXT:    xsmulsp f0, f0, f1452; PWR9BE-NEXT:    xxswapd vs1, v3453; PWR9BE-NEXT:    xscvspdpn f1, vs1454; PWR9BE-NEXT:    xsmulsp f0, f0, f1455; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 3456; PWR9BE-NEXT:    xscvspdpn f1, vs1457; PWR9BE-NEXT:    xsmulsp f1, f0, f1458; PWR9BE-NEXT:    blr459;460; PWR10LE-LABEL: v8f32_b:461; PWR10LE:       # %bb.0: # %entry462; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3463; PWR10LE-NEXT:    xscvspdpn f0, vs0464; PWR10LE-NEXT:    xsmulsp f0, f1, f0465; PWR10LE-NEXT:    xxswapd vs1, v2466; PWR10LE-NEXT:    xscvspdpn f1, vs1467; PWR10LE-NEXT:    xsmulsp f0, f0, f1468; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1469; PWR10LE-NEXT:    xscvspdpn f1, vs1470; PWR10LE-NEXT:    xsmulsp f0, f0, f1471; PWR10LE-NEXT:    xscvspdpn f1, v2472; PWR10LE-NEXT:    xsmulsp f0, f0, f1473; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 3474; PWR10LE-NEXT:    xscvspdpn f1, vs1475; PWR10LE-NEXT:    xsmulsp f0, f0, f1476; PWR10LE-NEXT:    xxswapd vs1, v3477; PWR10LE-NEXT:    xscvspdpn f1, vs1478; PWR10LE-NEXT:    xsmulsp f0, f0, f1479; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 1480; PWR10LE-NEXT:    xscvspdpn f1, vs1481; PWR10LE-NEXT:    xsmulsp f0, f0, f1482; PWR10LE-NEXT:    xscvspdpn f1, v3483; PWR10LE-NEXT:    xsmulsp f1, f0, f1484; PWR10LE-NEXT:    blr485;486; PWR10BE-LABEL: v8f32_b:487; PWR10BE:       # %bb.0: # %entry488; PWR10BE-NEXT:    xscvspdpn f0, v2489; PWR10BE-NEXT:    xsmulsp f0, f1, f0490; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1491; PWR10BE-NEXT:    xscvspdpn f1, vs1492; PWR10BE-NEXT:    xsmulsp f0, f0, f1493; PWR10BE-NEXT:    xxswapd vs1, v2494; PWR10BE-NEXT:    xscvspdpn f1, vs1495; PWR10BE-NEXT:    xsmulsp f0, f0, f1496; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3497; PWR10BE-NEXT:    xscvspdpn f1, vs1498; PWR10BE-NEXT:    xsmulsp f0, f0, f1499; PWR10BE-NEXT:    xscvspdpn f1, v3500; PWR10BE-NEXT:    xsmulsp f0, f0, f1501; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 1502; PWR10BE-NEXT:    xscvspdpn f1, vs1503; PWR10BE-NEXT:    xsmulsp f0, f0, f1504; PWR10BE-NEXT:    xxswapd vs1, v3505; PWR10BE-NEXT:    xscvspdpn f1, vs1506; PWR10BE-NEXT:    xsmulsp f0, f0, f1507; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 3508; PWR10BE-NEXT:    xscvspdpn f1, vs1509; PWR10BE-NEXT:    xsmulsp f1, f0, f1510; PWR10BE-NEXT:    blr511entry:512  %0 = call float @llvm.vector.reduce.fmul.v8f32(float %b, <8 x float> %a)513  ret float %0514}515 516define dso_local float @v8f32_fast(<8 x float> %a) local_unnamed_addr #0 {517; PWR9LE-LABEL: v8f32_fast:518; PWR9LE:       # %bb.0: # %entry519; PWR9LE-NEXT:    xvmulsp vs0, v2, v3520; PWR9LE-NEXT:    xxswapd v2, vs0521; PWR9LE-NEXT:    xvmulsp vs0, vs0, v2522; PWR9LE-NEXT:    xxspltw vs1, vs0, 2523; PWR9LE-NEXT:    xvmulsp vs0, vs0, vs1524; PWR9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3525; PWR9LE-NEXT:    xscvspdpn f1, vs0526; PWR9LE-NEXT:    blr527;528; PWR9BE-LABEL: v8f32_fast:529; PWR9BE:       # %bb.0: # %entry530; PWR9BE-NEXT:    xvmulsp vs0, v2, v3531; PWR9BE-NEXT:    xxswapd v2, vs0532; PWR9BE-NEXT:    xvmulsp vs0, vs0, v2533; PWR9BE-NEXT:    xxspltw vs1, vs0, 1534; PWR9BE-NEXT:    xvmulsp vs0, vs0, vs1535; PWR9BE-NEXT:    xscvspdpn f1, vs0536; PWR9BE-NEXT:    blr537;538; PWR10LE-LABEL: v8f32_fast:539; PWR10LE:       # %bb.0: # %entry540; PWR10LE-NEXT:    xvmulsp vs0, v2, v3541; PWR10LE-NEXT:    xxswapd v2, vs0542; PWR10LE-NEXT:    xvmulsp vs0, vs0, v2543; PWR10LE-NEXT:    xxspltw vs1, vs0, 2544; PWR10LE-NEXT:    xvmulsp vs0, vs0, vs1545; PWR10LE-NEXT:    xxsldwi vs0, vs0, vs0, 3546; PWR10LE-NEXT:    xscvspdpn f1, vs0547; PWR10LE-NEXT:    blr548;549; PWR10BE-LABEL: v8f32_fast:550; PWR10BE:       # %bb.0: # %entry551; PWR10BE-NEXT:    xvmulsp vs0, v2, v3552; PWR10BE-NEXT:    xxswapd v2, vs0553; PWR10BE-NEXT:    xvmulsp vs0, vs0, v2554; PWR10BE-NEXT:    xxspltw vs1, vs0, 1555; PWR10BE-NEXT:    xvmulsp vs0, vs0, vs1556; PWR10BE-NEXT:    xscvspdpn f1, vs0557; PWR10BE-NEXT:    blr558entry:559  %0 = call fast float @llvm.vector.reduce.fmul.v8f32(float 1.000000e+00, <8 x float> %a)560  ret float %0561}562 563define dso_local float @v16f32(<16 x float> %a) local_unnamed_addr #0 {564; PWR9LE-LABEL: v16f32:565; PWR9LE:       # %bb.0: # %entry566; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3567; PWR9LE-NEXT:    xxswapd vs1, v2568; PWR9LE-NEXT:    xscvspdpn f0, vs0569; PWR9LE-NEXT:    xscvspdpn f1, vs1570; PWR9LE-NEXT:    xsmulsp f0, f0, f1571; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1572; PWR9LE-NEXT:    xscvspdpn f1, vs1573; PWR9LE-NEXT:    xsmulsp f0, f0, f1574; PWR9LE-NEXT:    xscvspdpn f1, v2575; PWR9LE-NEXT:    xsmulsp f0, f0, f1576; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 3577; PWR9LE-NEXT:    xscvspdpn f1, vs1578; PWR9LE-NEXT:    xsmulsp f0, f0, f1579; PWR9LE-NEXT:    xxswapd vs1, v3580; PWR9LE-NEXT:    xscvspdpn f1, vs1581; PWR9LE-NEXT:    xsmulsp f0, f0, f1582; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 1583; PWR9LE-NEXT:    xscvspdpn f1, vs1584; PWR9LE-NEXT:    xsmulsp f0, f0, f1585; PWR9LE-NEXT:    xscvspdpn f1, v3586; PWR9LE-NEXT:    xsmulsp f0, f0, f1587; PWR9LE-NEXT:    xxsldwi vs1, v4, v4, 3588; PWR9LE-NEXT:    xscvspdpn f1, vs1589; PWR9LE-NEXT:    xsmulsp f0, f0, f1590; PWR9LE-NEXT:    xxswapd vs1, v4591; PWR9LE-NEXT:    xscvspdpn f1, vs1592; PWR9LE-NEXT:    xsmulsp f0, f0, f1593; PWR9LE-NEXT:    xxsldwi vs1, v4, v4, 1594; PWR9LE-NEXT:    xscvspdpn f1, vs1595; PWR9LE-NEXT:    xsmulsp f0, f0, f1596; PWR9LE-NEXT:    xscvspdpn f1, v4597; PWR9LE-NEXT:    xsmulsp f0, f0, f1598; PWR9LE-NEXT:    xxsldwi vs1, v5, v5, 3599; PWR9LE-NEXT:    xscvspdpn f1, vs1600; PWR9LE-NEXT:    xsmulsp f0, f0, f1601; PWR9LE-NEXT:    xxswapd vs1, v5602; PWR9LE-NEXT:    xscvspdpn f1, vs1603; PWR9LE-NEXT:    xsmulsp f0, f0, f1604; PWR9LE-NEXT:    xxsldwi vs1, v5, v5, 1605; PWR9LE-NEXT:    xscvspdpn f1, vs1606; PWR9LE-NEXT:    xsmulsp f0, f0, f1607; PWR9LE-NEXT:    xscvspdpn f1, v5608; PWR9LE-NEXT:    xsmulsp f1, f0, f1609; PWR9LE-NEXT:    blr610;611; PWR9BE-LABEL: v16f32:612; PWR9BE:       # %bb.0: # %entry613; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1614; PWR9BE-NEXT:    xscvspdpn f0, v2615; PWR9BE-NEXT:    xscvspdpn f1, vs1616; PWR9BE-NEXT:    xsmulsp f0, f0, f1617; PWR9BE-NEXT:    xxswapd vs1, v2618; PWR9BE-NEXT:    xscvspdpn f1, vs1619; PWR9BE-NEXT:    xsmulsp f0, f0, f1620; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3621; PWR9BE-NEXT:    xscvspdpn f1, vs1622; PWR9BE-NEXT:    xsmulsp f0, f0, f1623; PWR9BE-NEXT:    xscvspdpn f1, v3624; PWR9BE-NEXT:    xsmulsp f0, f0, f1625; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 1626; PWR9BE-NEXT:    xscvspdpn f1, vs1627; PWR9BE-NEXT:    xsmulsp f0, f0, f1628; PWR9BE-NEXT:    xxswapd vs1, v3629; PWR9BE-NEXT:    xscvspdpn f1, vs1630; PWR9BE-NEXT:    xsmulsp f0, f0, f1631; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 3632; PWR9BE-NEXT:    xscvspdpn f1, vs1633; PWR9BE-NEXT:    xsmulsp f0, f0, f1634; PWR9BE-NEXT:    xscvspdpn f1, v4635; PWR9BE-NEXT:    xsmulsp f0, f0, f1636; PWR9BE-NEXT:    xxsldwi vs1, v4, v4, 1637; PWR9BE-NEXT:    xscvspdpn f1, vs1638; PWR9BE-NEXT:    xsmulsp f0, f0, f1639; PWR9BE-NEXT:    xxswapd vs1, v4640; PWR9BE-NEXT:    xscvspdpn f1, vs1641; PWR9BE-NEXT:    xsmulsp f0, f0, f1642; PWR9BE-NEXT:    xxsldwi vs1, v4, v4, 3643; PWR9BE-NEXT:    xscvspdpn f1, vs1644; PWR9BE-NEXT:    xsmulsp f0, f0, f1645; PWR9BE-NEXT:    xscvspdpn f1, v5646; PWR9BE-NEXT:    xsmulsp f0, f0, f1647; PWR9BE-NEXT:    xxsldwi vs1, v5, v5, 1648; PWR9BE-NEXT:    xscvspdpn f1, vs1649; PWR9BE-NEXT:    xsmulsp f0, f0, f1650; PWR9BE-NEXT:    xxswapd vs1, v5651; PWR9BE-NEXT:    xscvspdpn f1, vs1652; PWR9BE-NEXT:    xsmulsp f0, f0, f1653; PWR9BE-NEXT:    xxsldwi vs1, v5, v5, 3654; PWR9BE-NEXT:    xscvspdpn f1, vs1655; PWR9BE-NEXT:    xsmulsp f1, f0, f1656; PWR9BE-NEXT:    blr657;658; PWR10LE-LABEL: v16f32:659; PWR10LE:       # %bb.0: # %entry660; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3661; PWR10LE-NEXT:    xxswapd vs1, v2662; PWR10LE-NEXT:    xscvspdpn f0, vs0663; PWR10LE-NEXT:    xscvspdpn f1, vs1664; PWR10LE-NEXT:    xsmulsp f0, f0, f1665; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1666; PWR10LE-NEXT:    xscvspdpn f1, vs1667; PWR10LE-NEXT:    xsmulsp f0, f0, f1668; PWR10LE-NEXT:    xscvspdpn f1, v2669; PWR10LE-NEXT:    xsmulsp f0, f0, f1670; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 3671; PWR10LE-NEXT:    xscvspdpn f1, vs1672; PWR10LE-NEXT:    xsmulsp f0, f0, f1673; PWR10LE-NEXT:    xxswapd vs1, v3674; PWR10LE-NEXT:    xscvspdpn f1, vs1675; PWR10LE-NEXT:    xsmulsp f0, f0, f1676; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 1677; PWR10LE-NEXT:    xscvspdpn f1, vs1678; PWR10LE-NEXT:    xsmulsp f0, f0, f1679; PWR10LE-NEXT:    xscvspdpn f1, v3680; PWR10LE-NEXT:    xsmulsp f0, f0, f1681; PWR10LE-NEXT:    xxsldwi vs1, v4, v4, 3682; PWR10LE-NEXT:    xscvspdpn f1, vs1683; PWR10LE-NEXT:    xsmulsp f0, f0, f1684; PWR10LE-NEXT:    xxswapd vs1, v4685; PWR10LE-NEXT:    xscvspdpn f1, vs1686; PWR10LE-NEXT:    xsmulsp f0, f0, f1687; PWR10LE-NEXT:    xxsldwi vs1, v4, v4, 1688; PWR10LE-NEXT:    xscvspdpn f1, vs1689; PWR10LE-NEXT:    xsmulsp f0, f0, f1690; PWR10LE-NEXT:    xscvspdpn f1, v4691; PWR10LE-NEXT:    xsmulsp f0, f0, f1692; PWR10LE-NEXT:    xxsldwi vs1, v5, v5, 3693; PWR10LE-NEXT:    xscvspdpn f1, vs1694; PWR10LE-NEXT:    xsmulsp f0, f0, f1695; PWR10LE-NEXT:    xxswapd vs1, v5696; PWR10LE-NEXT:    xscvspdpn f1, vs1697; PWR10LE-NEXT:    xsmulsp f0, f0, f1698; PWR10LE-NEXT:    xxsldwi vs1, v5, v5, 1699; PWR10LE-NEXT:    xscvspdpn f1, vs1700; PWR10LE-NEXT:    xsmulsp f0, f0, f1701; PWR10LE-NEXT:    xscvspdpn f1, v5702; PWR10LE-NEXT:    xsmulsp f1, f0, f1703; PWR10LE-NEXT:    blr704;705; PWR10BE-LABEL: v16f32:706; PWR10BE:       # %bb.0: # %entry707; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1708; PWR10BE-NEXT:    xscvspdpn f0, v2709; PWR10BE-NEXT:    xscvspdpn f1, vs1710; PWR10BE-NEXT:    xsmulsp f0, f0, f1711; PWR10BE-NEXT:    xxswapd vs1, v2712; PWR10BE-NEXT:    xscvspdpn f1, vs1713; PWR10BE-NEXT:    xsmulsp f0, f0, f1714; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3715; PWR10BE-NEXT:    xscvspdpn f1, vs1716; PWR10BE-NEXT:    xsmulsp f0, f0, f1717; PWR10BE-NEXT:    xscvspdpn f1, v3718; PWR10BE-NEXT:    xsmulsp f0, f0, f1719; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 1720; PWR10BE-NEXT:    xscvspdpn f1, vs1721; PWR10BE-NEXT:    xsmulsp f0, f0, f1722; PWR10BE-NEXT:    xxswapd vs1, v3723; PWR10BE-NEXT:    xscvspdpn f1, vs1724; PWR10BE-NEXT:    xsmulsp f0, f0, f1725; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 3726; PWR10BE-NEXT:    xscvspdpn f1, vs1727; PWR10BE-NEXT:    xsmulsp f0, f0, f1728; PWR10BE-NEXT:    xscvspdpn f1, v4729; PWR10BE-NEXT:    xsmulsp f0, f0, f1730; PWR10BE-NEXT:    xxsldwi vs1, v4, v4, 1731; PWR10BE-NEXT:    xscvspdpn f1, vs1732; PWR10BE-NEXT:    xsmulsp f0, f0, f1733; PWR10BE-NEXT:    xxswapd vs1, v4734; PWR10BE-NEXT:    xscvspdpn f1, vs1735; PWR10BE-NEXT:    xsmulsp f0, f0, f1736; PWR10BE-NEXT:    xxsldwi vs1, v4, v4, 3737; PWR10BE-NEXT:    xscvspdpn f1, vs1738; PWR10BE-NEXT:    xsmulsp f0, f0, f1739; PWR10BE-NEXT:    xscvspdpn f1, v5740; PWR10BE-NEXT:    xsmulsp f0, f0, f1741; PWR10BE-NEXT:    xxsldwi vs1, v5, v5, 1742; PWR10BE-NEXT:    xscvspdpn f1, vs1743; PWR10BE-NEXT:    xsmulsp f0, f0, f1744; PWR10BE-NEXT:    xxswapd vs1, v5745; PWR10BE-NEXT:    xscvspdpn f1, vs1746; PWR10BE-NEXT:    xsmulsp f0, f0, f1747; PWR10BE-NEXT:    xxsldwi vs1, v5, v5, 3748; PWR10BE-NEXT:    xscvspdpn f1, vs1749; PWR10BE-NEXT:    xsmulsp f1, f0, f1750; PWR10BE-NEXT:    blr751entry:752  %0 = call float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %a)753  ret float %0754}755 756define dso_local float @v16f32_b(<16 x float> %a, float %b) local_unnamed_addr #0 {757; PWR9LE-LABEL: v16f32_b:758; PWR9LE:       # %bb.0: # %entry759; PWR9LE-NEXT:    xxsldwi vs0, v2, v2, 3760; PWR9LE-NEXT:    xscvspdpn f0, vs0761; PWR9LE-NEXT:    xsmulsp f0, f1, f0762; PWR9LE-NEXT:    xxswapd vs1, v2763; PWR9LE-NEXT:    xscvspdpn f1, vs1764; PWR9LE-NEXT:    xsmulsp f0, f0, f1765; PWR9LE-NEXT:    xxsldwi vs1, v2, v2, 1766; PWR9LE-NEXT:    xscvspdpn f1, vs1767; PWR9LE-NEXT:    xsmulsp f0, f0, f1768; PWR9LE-NEXT:    xscvspdpn f1, v2769; PWR9LE-NEXT:    xsmulsp f0, f0, f1770; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 3771; PWR9LE-NEXT:    xscvspdpn f1, vs1772; PWR9LE-NEXT:    xsmulsp f0, f0, f1773; PWR9LE-NEXT:    xxswapd vs1, v3774; PWR9LE-NEXT:    xscvspdpn f1, vs1775; PWR9LE-NEXT:    xsmulsp f0, f0, f1776; PWR9LE-NEXT:    xxsldwi vs1, v3, v3, 1777; PWR9LE-NEXT:    xscvspdpn f1, vs1778; PWR9LE-NEXT:    xsmulsp f0, f0, f1779; PWR9LE-NEXT:    xscvspdpn f1, v3780; PWR9LE-NEXT:    xsmulsp f0, f0, f1781; PWR9LE-NEXT:    xxsldwi vs1, v4, v4, 3782; PWR9LE-NEXT:    xscvspdpn f1, vs1783; PWR9LE-NEXT:    xsmulsp f0, f0, f1784; PWR9LE-NEXT:    xxswapd vs1, v4785; PWR9LE-NEXT:    xscvspdpn f1, vs1786; PWR9LE-NEXT:    xsmulsp f0, f0, f1787; PWR9LE-NEXT:    xxsldwi vs1, v4, v4, 1788; PWR9LE-NEXT:    xscvspdpn f1, vs1789; PWR9LE-NEXT:    xsmulsp f0, f0, f1790; PWR9LE-NEXT:    xscvspdpn f1, v4791; PWR9LE-NEXT:    xsmulsp f0, f0, f1792; PWR9LE-NEXT:    xxsldwi vs1, v5, v5, 3793; PWR9LE-NEXT:    xscvspdpn f1, vs1794; PWR9LE-NEXT:    xsmulsp f0, f0, f1795; PWR9LE-NEXT:    xxswapd vs1, v5796; PWR9LE-NEXT:    xscvspdpn f1, vs1797; PWR9LE-NEXT:    xsmulsp f0, f0, f1798; PWR9LE-NEXT:    xxsldwi vs1, v5, v5, 1799; PWR9LE-NEXT:    xscvspdpn f1, vs1800; PWR9LE-NEXT:    xsmulsp f0, f0, f1801; PWR9LE-NEXT:    xscvspdpn f1, v5802; PWR9LE-NEXT:    xsmulsp f1, f0, f1803; PWR9LE-NEXT:    blr804;805; PWR9BE-LABEL: v16f32_b:806; PWR9BE:       # %bb.0: # %entry807; PWR9BE-NEXT:    xscvspdpn f0, v2808; PWR9BE-NEXT:    xsmulsp f0, f1, f0809; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 1810; PWR9BE-NEXT:    xscvspdpn f1, vs1811; PWR9BE-NEXT:    xsmulsp f0, f0, f1812; PWR9BE-NEXT:    xxswapd vs1, v2813; PWR9BE-NEXT:    xscvspdpn f1, vs1814; PWR9BE-NEXT:    xsmulsp f0, f0, f1815; PWR9BE-NEXT:    xxsldwi vs1, v2, v2, 3816; PWR9BE-NEXT:    xscvspdpn f1, vs1817; PWR9BE-NEXT:    xsmulsp f0, f0, f1818; PWR9BE-NEXT:    xscvspdpn f1, v3819; PWR9BE-NEXT:    xsmulsp f0, f0, f1820; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 1821; PWR9BE-NEXT:    xscvspdpn f1, vs1822; PWR9BE-NEXT:    xsmulsp f0, f0, f1823; PWR9BE-NEXT:    xxswapd vs1, v3824; PWR9BE-NEXT:    xscvspdpn f1, vs1825; PWR9BE-NEXT:    xsmulsp f0, f0, f1826; PWR9BE-NEXT:    xxsldwi vs1, v3, v3, 3827; PWR9BE-NEXT:    xscvspdpn f1, vs1828; PWR9BE-NEXT:    xsmulsp f0, f0, f1829; PWR9BE-NEXT:    xscvspdpn f1, v4830; PWR9BE-NEXT:    xsmulsp f0, f0, f1831; PWR9BE-NEXT:    xxsldwi vs1, v4, v4, 1832; PWR9BE-NEXT:    xscvspdpn f1, vs1833; PWR9BE-NEXT:    xsmulsp f0, f0, f1834; PWR9BE-NEXT:    xxswapd vs1, v4835; PWR9BE-NEXT:    xscvspdpn f1, vs1836; PWR9BE-NEXT:    xsmulsp f0, f0, f1837; PWR9BE-NEXT:    xxsldwi vs1, v4, v4, 3838; PWR9BE-NEXT:    xscvspdpn f1, vs1839; PWR9BE-NEXT:    xsmulsp f0, f0, f1840; PWR9BE-NEXT:    xscvspdpn f1, v5841; PWR9BE-NEXT:    xsmulsp f0, f0, f1842; PWR9BE-NEXT:    xxsldwi vs1, v5, v5, 1843; PWR9BE-NEXT:    xscvspdpn f1, vs1844; PWR9BE-NEXT:    xsmulsp f0, f0, f1845; PWR9BE-NEXT:    xxswapd vs1, v5846; PWR9BE-NEXT:    xscvspdpn f1, vs1847; PWR9BE-NEXT:    xsmulsp f0, f0, f1848; PWR9BE-NEXT:    xxsldwi vs1, v5, v5, 3849; PWR9BE-NEXT:    xscvspdpn f1, vs1850; PWR9BE-NEXT:    xsmulsp f1, f0, f1851; PWR9BE-NEXT:    blr852;853; PWR10LE-LABEL: v16f32_b:854; PWR10LE:       # %bb.0: # %entry855; PWR10LE-NEXT:    xxsldwi vs0, v2, v2, 3856; PWR10LE-NEXT:    xscvspdpn f0, vs0857; PWR10LE-NEXT:    xsmulsp f0, f1, f0858; PWR10LE-NEXT:    xxswapd vs1, v2859; PWR10LE-NEXT:    xscvspdpn f1, vs1860; PWR10LE-NEXT:    xsmulsp f0, f0, f1861; PWR10LE-NEXT:    xxsldwi vs1, v2, v2, 1862; PWR10LE-NEXT:    xscvspdpn f1, vs1863; PWR10LE-NEXT:    xsmulsp f0, f0, f1864; PWR10LE-NEXT:    xscvspdpn f1, v2865; PWR10LE-NEXT:    xsmulsp f0, f0, f1866; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 3867; PWR10LE-NEXT:    xscvspdpn f1, vs1868; PWR10LE-NEXT:    xsmulsp f0, f0, f1869; PWR10LE-NEXT:    xxswapd vs1, v3870; PWR10LE-NEXT:    xscvspdpn f1, vs1871; PWR10LE-NEXT:    xsmulsp f0, f0, f1872; PWR10LE-NEXT:    xxsldwi vs1, v3, v3, 1873; PWR10LE-NEXT:    xscvspdpn f1, vs1874; PWR10LE-NEXT:    xsmulsp f0, f0, f1875; PWR10LE-NEXT:    xscvspdpn f1, v3876; PWR10LE-NEXT:    xsmulsp f0, f0, f1877; PWR10LE-NEXT:    xxsldwi vs1, v4, v4, 3878; PWR10LE-NEXT:    xscvspdpn f1, vs1879; PWR10LE-NEXT:    xsmulsp f0, f0, f1880; PWR10LE-NEXT:    xxswapd vs1, v4881; PWR10LE-NEXT:    xscvspdpn f1, vs1882; PWR10LE-NEXT:    xsmulsp f0, f0, f1883; PWR10LE-NEXT:    xxsldwi vs1, v4, v4, 1884; PWR10LE-NEXT:    xscvspdpn f1, vs1885; PWR10LE-NEXT:    xsmulsp f0, f0, f1886; PWR10LE-NEXT:    xscvspdpn f1, v4887; PWR10LE-NEXT:    xsmulsp f0, f0, f1888; PWR10LE-NEXT:    xxsldwi vs1, v5, v5, 3889; PWR10LE-NEXT:    xscvspdpn f1, vs1890; PWR10LE-NEXT:    xsmulsp f0, f0, f1891; PWR10LE-NEXT:    xxswapd vs1, v5892; PWR10LE-NEXT:    xscvspdpn f1, vs1893; PWR10LE-NEXT:    xsmulsp f0, f0, f1894; PWR10LE-NEXT:    xxsldwi vs1, v5, v5, 1895; PWR10LE-NEXT:    xscvspdpn f1, vs1896; PWR10LE-NEXT:    xsmulsp f0, f0, f1897; PWR10LE-NEXT:    xscvspdpn f1, v5898; PWR10LE-NEXT:    xsmulsp f1, f0, f1899; PWR10LE-NEXT:    blr900;901; PWR10BE-LABEL: v16f32_b:902; PWR10BE:       # %bb.0: # %entry903; PWR10BE-NEXT:    xscvspdpn f0, v2904; PWR10BE-NEXT:    xsmulsp f0, f1, f0905; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 1906; PWR10BE-NEXT:    xscvspdpn f1, vs1907; PWR10BE-NEXT:    xsmulsp f0, f0, f1908; PWR10BE-NEXT:    xxswapd vs1, v2909; PWR10BE-NEXT:    xscvspdpn f1, vs1910; PWR10BE-NEXT:    xsmulsp f0, f0, f1911; PWR10BE-NEXT:    xxsldwi vs1, v2, v2, 3912; PWR10BE-NEXT:    xscvspdpn f1, vs1913; PWR10BE-NEXT:    xsmulsp f0, f0, f1914; PWR10BE-NEXT:    xscvspdpn f1, v3915; PWR10BE-NEXT:    xsmulsp f0, f0, f1916; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 1917; PWR10BE-NEXT:    xscvspdpn f1, vs1918; PWR10BE-NEXT:    xsmulsp f0, f0, f1919; PWR10BE-NEXT:    xxswapd vs1, v3920; PWR10BE-NEXT:    xscvspdpn f1, vs1921; PWR10BE-NEXT:    xsmulsp f0, f0, f1922; PWR10BE-NEXT:    xxsldwi vs1, v3, v3, 3923; PWR10BE-NEXT:    xscvspdpn f1, vs1924; PWR10BE-NEXT:    xsmulsp f0, f0, f1925; PWR10BE-NEXT:    xscvspdpn f1, v4926; PWR10BE-NEXT:    xsmulsp f0, f0, f1927; PWR10BE-NEXT:    xxsldwi vs1, v4, v4, 1928; PWR10BE-NEXT:    xscvspdpn f1, vs1929; PWR10BE-NEXT:    xsmulsp f0, f0, f1930; PWR10BE-NEXT:    xxswapd vs1, v4931; PWR10BE-NEXT:    xscvspdpn f1, vs1932; PWR10BE-NEXT:    xsmulsp f0, f0, f1933; PWR10BE-NEXT:    xxsldwi vs1, v4, v4, 3934; PWR10BE-NEXT:    xscvspdpn f1, vs1935; PWR10BE-NEXT:    xsmulsp f0, f0, f1936; PWR10BE-NEXT:    xscvspdpn f1, v5937; PWR10BE-NEXT:    xsmulsp f0, f0, f1938; PWR10BE-NEXT:    xxsldwi vs1, v5, v5, 1939; PWR10BE-NEXT:    xscvspdpn f1, vs1940; PWR10BE-NEXT:    xsmulsp f0, f0, f1941; PWR10BE-NEXT:    xxswapd vs1, v5942; PWR10BE-NEXT:    xscvspdpn f1, vs1943; PWR10BE-NEXT:    xsmulsp f0, f0, f1944; PWR10BE-NEXT:    xxsldwi vs1, v5, v5, 3945; PWR10BE-NEXT:    xscvspdpn f1, vs1946; PWR10BE-NEXT:    xsmulsp f1, f0, f1947; PWR10BE-NEXT:    blr948entry:949  %0 = call float @llvm.vector.reduce.fmul.v16f32(float %b, <16 x float> %a)950  ret float %0951}952 953define dso_local float @v16f32_fast(<16 x float> %a) local_unnamed_addr #0 {954; PWR9LE-LABEL: v16f32_fast:955; PWR9LE:       # %bb.0: # %entry956; PWR9LE-NEXT:    xvmulsp vs0, v3, v5957; PWR9LE-NEXT:    xvmulsp vs1, v2, v4958; PWR9LE-NEXT:    xvmulsp vs0, vs1, vs0959; PWR9LE-NEXT:    xxswapd v2, vs0960; PWR9LE-NEXT:    xvmulsp vs0, vs0, v2961; PWR9LE-NEXT:    xxspltw vs1, vs0, 2962; PWR9LE-NEXT:    xvmulsp vs0, vs0, vs1963; PWR9LE-NEXT:    xxsldwi vs0, vs0, vs0, 3964; PWR9LE-NEXT:    xscvspdpn f1, vs0965; PWR9LE-NEXT:    blr966;967; PWR9BE-LABEL: v16f32_fast:968; PWR9BE:       # %bb.0: # %entry969; PWR9BE-NEXT:    xvmulsp vs0, v3, v5970; PWR9BE-NEXT:    xvmulsp vs1, v2, v4971; PWR9BE-NEXT:    xvmulsp vs0, vs1, vs0972; PWR9BE-NEXT:    xxswapd v2, vs0973; PWR9BE-NEXT:    xvmulsp vs0, vs0, v2974; PWR9BE-NEXT:    xxspltw vs1, vs0, 1975; PWR9BE-NEXT:    xvmulsp vs0, vs0, vs1976; PWR9BE-NEXT:    xscvspdpn f1, vs0977; PWR9BE-NEXT:    blr978;979; PWR10LE-LABEL: v16f32_fast:980; PWR10LE:       # %bb.0: # %entry981; PWR10LE-NEXT:    xvmulsp vs0, v3, v5982; PWR10LE-NEXT:    xvmulsp vs1, v2, v4983; PWR10LE-NEXT:    xvmulsp vs0, vs1, vs0984; PWR10LE-NEXT:    xxswapd v2, vs0985; PWR10LE-NEXT:    xvmulsp vs0, vs0, v2986; PWR10LE-NEXT:    xxspltw vs1, vs0, 2987; PWR10LE-NEXT:    xvmulsp vs0, vs0, vs1988; PWR10LE-NEXT:    xxsldwi vs0, vs0, vs0, 3989; PWR10LE-NEXT:    xscvspdpn f1, vs0990; PWR10LE-NEXT:    blr991;992; PWR10BE-LABEL: v16f32_fast:993; PWR10BE:       # %bb.0: # %entry994; PWR10BE-NEXT:    xvmulsp vs0, v3, v5995; PWR10BE-NEXT:    xvmulsp vs1, v2, v4996; PWR10BE-NEXT:    xvmulsp vs0, vs1, vs0997; PWR10BE-NEXT:    xxswapd v2, vs0998; PWR10BE-NEXT:    xvmulsp vs0, vs0, v2999; PWR10BE-NEXT:    xxspltw vs1, vs0, 11000; PWR10BE-NEXT:    xvmulsp vs0, vs0, vs11001; PWR10BE-NEXT:    xscvspdpn f1, vs01002; PWR10BE-NEXT:    blr1003entry:1004  %0 = call fast float @llvm.vector.reduce.fmul.v16f32(float 1.000000e+00, <16 x float> %a)1005  ret float %01006}1007 1008declare float @llvm.vector.reduce.fmul.v2f32(float, <2 x float>) #01009declare float @llvm.vector.reduce.fmul.v4f32(float, <4 x float>) #01010declare float @llvm.vector.reduce.fmul.v8f32(float, <8 x float>) #01011declare float @llvm.vector.reduce.fmul.v16f32(float, <16 x float>) #01012 1013;;1014;; Vectors of f641015;;1016define dso_local double @v2f64(<2 x double> %a) local_unnamed_addr #0 {1017; PWR9LE-LABEL: v2f64:1018; PWR9LE:       # %bb.0: # %entry1019; PWR9LE-NEXT:    xxswapd vs0, v21020; PWR9LE-NEXT:    xsmuldp f1, f0, v21021; PWR9LE-NEXT:    blr1022;1023; PWR9BE-LABEL: v2f64:1024; PWR9BE:       # %bb.0: # %entry1025; PWR9BE-NEXT:    xxswapd vs0, v21026; PWR9BE-NEXT:    xsmuldp f1, v2, f01027; PWR9BE-NEXT:    blr1028;1029; PWR10LE-LABEL: v2f64:1030; PWR10LE:       # %bb.0: # %entry1031; PWR10LE-NEXT:    xxswapd vs0, v21032; PWR10LE-NEXT:    xsmuldp f1, f0, v21033; PWR10LE-NEXT:    blr1034;1035; PWR10BE-LABEL: v2f64:1036; PWR10BE:       # %bb.0: # %entry1037; PWR10BE-NEXT:    xxswapd vs0, v21038; PWR10BE-NEXT:    xsmuldp f1, v2, f01039; PWR10BE-NEXT:    blr1040entry:1041  %0 = call double @llvm.vector.reduce.fmul.v2f64(double 1.000000e+00, <2 x double> %a)1042  ret double %01043}1044 1045define dso_local double @v2f64_b(<2 x double> %a, double %b) local_unnamed_addr #0 {1046; PWR9LE-LABEL: v2f64_b:1047; PWR9LE:       # %bb.0: # %entry1048; PWR9LE-NEXT:    xxswapd vs0, v21049; PWR9LE-NEXT:    xsmuldp f0, f1, f01050; PWR9LE-NEXT:    xsmuldp f1, f0, v21051; PWR9LE-NEXT:    blr1052;1053; PWR9BE-LABEL: v2f64_b:1054; PWR9BE:       # %bb.0: # %entry1055; PWR9BE-NEXT:    xsmuldp f0, f1, v21056; PWR9BE-NEXT:    xxswapd vs1, v21057; PWR9BE-NEXT:    xsmuldp f1, f0, f11058; PWR9BE-NEXT:    blr1059;1060; PWR10LE-LABEL: v2f64_b:1061; PWR10LE:       # %bb.0: # %entry1062; PWR10LE-NEXT:    xxswapd vs0, v21063; PWR10LE-NEXT:    xsmuldp f0, f1, f01064; PWR10LE-NEXT:    xsmuldp f1, f0, v21065; PWR10LE-NEXT:    blr1066;1067; PWR10BE-LABEL: v2f64_b:1068; PWR10BE:       # %bb.0: # %entry1069; PWR10BE-NEXT:    xsmuldp f0, f1, v21070; PWR10BE-NEXT:    xxswapd vs1, v21071; PWR10BE-NEXT:    xsmuldp f1, f0, f11072; PWR10BE-NEXT:    blr1073entry:1074  %0 = call double @llvm.vector.reduce.fmul.v2f64(double %b, <2 x double> %a)1075  ret double %01076}1077 1078define dso_local double @v2f64_fast(<2 x double> %a) local_unnamed_addr #0 {1079; PWR9LE-LABEL: v2f64_fast:1080; PWR9LE:       # %bb.0: # %entry1081; PWR9LE-NEXT:    xxswapd vs0, v21082; PWR9LE-NEXT:    xvmuldp vs0, v2, vs01083; PWR9LE-NEXT:    xxswapd vs1, vs01084; PWR9LE-NEXT:    blr1085;1086; PWR9BE-LABEL: v2f64_fast:1087; PWR9BE:       # %bb.0: # %entry1088; PWR9BE-NEXT:    xxswapd vs0, v21089; PWR9BE-NEXT:    xvmuldp vs1, v2, vs01090; PWR9BE-NEXT:    blr1091;1092; PWR10LE-LABEL: v2f64_fast:1093; PWR10LE:       # %bb.0: # %entry1094; PWR10LE-NEXT:    xxswapd vs0, v21095; PWR10LE-NEXT:    xvmuldp vs0, v2, vs01096; PWR10LE-NEXT:    xxswapd vs1, vs01097; PWR10LE-NEXT:    blr1098;1099; PWR10BE-LABEL: v2f64_fast:1100; PWR10BE:       # %bb.0: # %entry1101; PWR10BE-NEXT:    xxswapd vs0, v21102; PWR10BE-NEXT:    xvmuldp vs1, v2, vs01103; PWR10BE-NEXT:    blr1104entry:1105  %0 = call fast double @llvm.vector.reduce.fmul.v2f64(double 1.000000e+00, <2 x double> %a)1106  ret double %01107}1108 1109define dso_local double @v4f64(<4 x double> %a) local_unnamed_addr #0 {1110; PWR9LE-LABEL: v4f64:1111; PWR9LE:       # %bb.0: # %entry1112; PWR9LE-NEXT:    xxswapd vs0, v21113; PWR9LE-NEXT:    xxswapd vs1, v31114; PWR9LE-NEXT:    xsmuldp f0, f0, v21115; PWR9LE-NEXT:    xsmuldp f0, f0, f11116; PWR9LE-NEXT:    xsmuldp f1, f0, v31117; PWR9LE-NEXT:    blr1118;1119; PWR9BE-LABEL: v4f64:1120; PWR9BE:       # %bb.0: # %entry1121; PWR9BE-NEXT:    xxswapd vs0, v21122; PWR9BE-NEXT:    xxswapd vs1, v31123; PWR9BE-NEXT:    xsmuldp f0, v2, f01124; PWR9BE-NEXT:    xsmuldp f0, f0, v31125; PWR9BE-NEXT:    xsmuldp f1, f0, f11126; PWR9BE-NEXT:    blr1127;1128; PWR10LE-LABEL: v4f64:1129; PWR10LE:       # %bb.0: # %entry1130; PWR10LE-NEXT:    xxswapd vs0, v21131; PWR10LE-NEXT:    xxswapd vs1, v31132; PWR10LE-NEXT:    xsmuldp f0, f0, v21133; PWR10LE-NEXT:    xsmuldp f0, f0, f11134; PWR10LE-NEXT:    xsmuldp f1, f0, v31135; PWR10LE-NEXT:    blr1136;1137; PWR10BE-LABEL: v4f64:1138; PWR10BE:       # %bb.0: # %entry1139; PWR10BE-NEXT:    xxswapd vs0, v21140; PWR10BE-NEXT:    xxswapd vs1, v31141; PWR10BE-NEXT:    xsmuldp f0, v2, f01142; PWR10BE-NEXT:    xsmuldp f0, f0, v31143; PWR10BE-NEXT:    xsmuldp f1, f0, f11144; PWR10BE-NEXT:    blr1145entry:1146  %0 = call double @llvm.vector.reduce.fmul.v4f64(double 1.000000e+00, <4 x double> %a)1147  ret double %01148}1149 1150define dso_local double @v4f64_b(<4 x double> %a, double %b) local_unnamed_addr #0 {1151; PWR9LE-LABEL: v4f64_b:1152; PWR9LE:       # %bb.0: # %entry1153; PWR9LE-NEXT:    xxswapd vs0, v21154; PWR9LE-NEXT:    xsmuldp f0, f1, f01155; PWR9LE-NEXT:    xxswapd vs1, v31156; PWR9LE-NEXT:    xsmuldp f0, f0, v21157; PWR9LE-NEXT:    xsmuldp f0, f0, f11158; PWR9LE-NEXT:    xsmuldp f1, f0, v31159; PWR9LE-NEXT:    blr1160;1161; PWR9BE-LABEL: v4f64_b:1162; PWR9BE:       # %bb.0: # %entry1163; PWR9BE-NEXT:    xsmuldp f0, f1, v21164; PWR9BE-NEXT:    xxswapd vs1, v21165; PWR9BE-NEXT:    xsmuldp f0, f0, f11166; PWR9BE-NEXT:    xxswapd vs1, v31167; PWR9BE-NEXT:    xsmuldp f0, f0, v31168; PWR9BE-NEXT:    xsmuldp f1, f0, f11169; PWR9BE-NEXT:    blr1170;1171; PWR10LE-LABEL: v4f64_b:1172; PWR10LE:       # %bb.0: # %entry1173; PWR10LE-NEXT:    xxswapd vs0, v21174; PWR10LE-NEXT:    xsmuldp f0, f1, f01175; PWR10LE-NEXT:    xxswapd vs1, v31176; PWR10LE-NEXT:    xsmuldp f0, f0, v21177; PWR10LE-NEXT:    xsmuldp f0, f0, f11178; PWR10LE-NEXT:    xsmuldp f1, f0, v31179; PWR10LE-NEXT:    blr1180;1181; PWR10BE-LABEL: v4f64_b:1182; PWR10BE:       # %bb.0: # %entry1183; PWR10BE-NEXT:    xsmuldp f0, f1, v21184; PWR10BE-NEXT:    xxswapd vs1, v21185; PWR10BE-NEXT:    xsmuldp f0, f0, f11186; PWR10BE-NEXT:    xxswapd vs1, v31187; PWR10BE-NEXT:    xsmuldp f0, f0, v31188; PWR10BE-NEXT:    xsmuldp f1, f0, f11189; PWR10BE-NEXT:    blr1190entry:1191  %0 = call double @llvm.vector.reduce.fmul.v4f64(double %b, <4 x double> %a)1192  ret double %01193}1194 1195define dso_local double @v4f64_fast(<4 x double> %a) local_unnamed_addr #0 {1196; PWR9LE-LABEL: v4f64_fast:1197; PWR9LE:       # %bb.0: # %entry1198; PWR9LE-NEXT:    xvmuldp vs0, v2, v31199; PWR9LE-NEXT:    xxswapd vs1, vs01200; PWR9LE-NEXT:    xvmuldp vs0, vs0, vs11201; PWR9LE-NEXT:    xxswapd vs1, vs01202; PWR9LE-NEXT:    blr1203;1204; PWR9BE-LABEL: v4f64_fast:1205; PWR9BE:       # %bb.0: # %entry1206; PWR9BE-NEXT:    xvmuldp vs0, v2, v31207; PWR9BE-NEXT:    xxswapd vs1, vs01208; PWR9BE-NEXT:    xvmuldp vs1, vs0, vs11209; PWR9BE-NEXT:    blr1210;1211; PWR10LE-LABEL: v4f64_fast:1212; PWR10LE:       # %bb.0: # %entry1213; PWR10LE-NEXT:    xvmuldp vs0, v2, v31214; PWR10LE-NEXT:    xxswapd vs1, vs01215; PWR10LE-NEXT:    xvmuldp vs0, vs0, vs11216; PWR10LE-NEXT:    xxswapd vs1, vs01217; PWR10LE-NEXT:    blr1218;1219; PWR10BE-LABEL: v4f64_fast:1220; PWR10BE:       # %bb.0: # %entry1221; PWR10BE-NEXT:    xvmuldp vs0, v2, v31222; PWR10BE-NEXT:    xxswapd vs1, vs01223; PWR10BE-NEXT:    xvmuldp vs1, vs0, vs11224; PWR10BE-NEXT:    blr1225entry:1226  %0 = call fast double @llvm.vector.reduce.fmul.v4f64(double 1.000000e+00, <4 x double> %a)1227  ret double %01228}1229 1230define dso_local double @v8f64(<8 x double> %a) local_unnamed_addr #0 {1231; PWR9LE-LABEL: v8f64:1232; PWR9LE:       # %bb.0: # %entry1233; PWR9LE-NEXT:    xxswapd vs0, v21234; PWR9LE-NEXT:    xxswapd vs1, v31235; PWR9LE-NEXT:    xsmuldp f0, f0, v21236; PWR9LE-NEXT:    xsmuldp f0, f0, f11237; PWR9LE-NEXT:    xxswapd vs1, v41238; PWR9LE-NEXT:    xsmuldp f0, f0, v31239; PWR9LE-NEXT:    xsmuldp f0, f0, f11240; PWR9LE-NEXT:    xxswapd vs1, v51241; PWR9LE-NEXT:    xsmuldp f0, f0, v41242; PWR9LE-NEXT:    xsmuldp f0, f0, f11243; PWR9LE-NEXT:    xsmuldp f1, f0, v51244; PWR9LE-NEXT:    blr1245;1246; PWR9BE-LABEL: v8f64:1247; PWR9BE:       # %bb.0: # %entry1248; PWR9BE-NEXT:    xxswapd vs0, v21249; PWR9BE-NEXT:    xxswapd vs1, v31250; PWR9BE-NEXT:    xsmuldp f0, v2, f01251; PWR9BE-NEXT:    xsmuldp f0, f0, v31252; PWR9BE-NEXT:    xsmuldp f0, f0, f11253; PWR9BE-NEXT:    xxswapd vs1, v41254; PWR9BE-NEXT:    xsmuldp f0, f0, v41255; PWR9BE-NEXT:    xsmuldp f0, f0, f11256; PWR9BE-NEXT:    xxswapd vs1, v51257; PWR9BE-NEXT:    xsmuldp f0, f0, v51258; PWR9BE-NEXT:    xsmuldp f1, f0, f11259; PWR9BE-NEXT:    blr1260;1261; PWR10LE-LABEL: v8f64:1262; PWR10LE:       # %bb.0: # %entry1263; PWR10LE-NEXT:    xxswapd vs0, v21264; PWR10LE-NEXT:    xxswapd vs1, v31265; PWR10LE-NEXT:    xsmuldp f0, f0, v21266; PWR10LE-NEXT:    xsmuldp f0, f0, f11267; PWR10LE-NEXT:    xxswapd vs1, v41268; PWR10LE-NEXT:    xsmuldp f0, f0, v31269; PWR10LE-NEXT:    xsmuldp f0, f0, f11270; PWR10LE-NEXT:    xxswapd vs1, v51271; PWR10LE-NEXT:    xsmuldp f0, f0, v41272; PWR10LE-NEXT:    xsmuldp f0, f0, f11273; PWR10LE-NEXT:    xsmuldp f1, f0, v51274; PWR10LE-NEXT:    blr1275;1276; PWR10BE-LABEL: v8f64:1277; PWR10BE:       # %bb.0: # %entry1278; PWR10BE-NEXT:    xxswapd vs0, v21279; PWR10BE-NEXT:    xxswapd vs1, v31280; PWR10BE-NEXT:    xsmuldp f0, v2, f01281; PWR10BE-NEXT:    xsmuldp f0, f0, v31282; PWR10BE-NEXT:    xsmuldp f0, f0, f11283; PWR10BE-NEXT:    xxswapd vs1, v41284; PWR10BE-NEXT:    xsmuldp f0, f0, v41285; PWR10BE-NEXT:    xsmuldp f0, f0, f11286; PWR10BE-NEXT:    xxswapd vs1, v51287; PWR10BE-NEXT:    xsmuldp f0, f0, v51288; PWR10BE-NEXT:    xsmuldp f1, f0, f11289; PWR10BE-NEXT:    blr1290entry:1291  %0 = call double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %a)1292  ret double %01293}1294 1295define dso_local double @v8f64_b(<8 x double> %a, double %b) local_unnamed_addr #0 {1296; PWR9LE-LABEL: v8f64_b:1297; PWR9LE:       # %bb.0: # %entry1298; PWR9LE-NEXT:    xxswapd vs0, v21299; PWR9LE-NEXT:    xsmuldp f0, f1, f01300; PWR9LE-NEXT:    xxswapd vs1, v31301; PWR9LE-NEXT:    xsmuldp f0, f0, v21302; PWR9LE-NEXT:    xsmuldp f0, f0, f11303; PWR9LE-NEXT:    xxswapd vs1, v41304; PWR9LE-NEXT:    xsmuldp f0, f0, v31305; PWR9LE-NEXT:    xsmuldp f0, f0, f11306; PWR9LE-NEXT:    xxswapd vs1, v51307; PWR9LE-NEXT:    xsmuldp f0, f0, v41308; PWR9LE-NEXT:    xsmuldp f0, f0, f11309; PWR9LE-NEXT:    xsmuldp f1, f0, v51310; PWR9LE-NEXT:    blr1311;1312; PWR9BE-LABEL: v8f64_b:1313; PWR9BE:       # %bb.0: # %entry1314; PWR9BE-NEXT:    xsmuldp f0, f1, v21315; PWR9BE-NEXT:    xxswapd vs1, v21316; PWR9BE-NEXT:    xsmuldp f0, f0, f11317; PWR9BE-NEXT:    xxswapd vs1, v31318; PWR9BE-NEXT:    xsmuldp f0, f0, v31319; PWR9BE-NEXT:    xsmuldp f0, f0, f11320; PWR9BE-NEXT:    xxswapd vs1, v41321; PWR9BE-NEXT:    xsmuldp f0, f0, v41322; PWR9BE-NEXT:    xsmuldp f0, f0, f11323; PWR9BE-NEXT:    xxswapd vs1, v51324; PWR9BE-NEXT:    xsmuldp f0, f0, v51325; PWR9BE-NEXT:    xsmuldp f1, f0, f11326; PWR9BE-NEXT:    blr1327;1328; PWR10LE-LABEL: v8f64_b:1329; PWR10LE:       # %bb.0: # %entry1330; PWR10LE-NEXT:    xxswapd vs0, v21331; PWR10LE-NEXT:    xsmuldp f0, f1, f01332; PWR10LE-NEXT:    xxswapd vs1, v31333; PWR10LE-NEXT:    xsmuldp f0, f0, v21334; PWR10LE-NEXT:    xsmuldp f0, f0, f11335; PWR10LE-NEXT:    xxswapd vs1, v41336; PWR10LE-NEXT:    xsmuldp f0, f0, v31337; PWR10LE-NEXT:    xsmuldp f0, f0, f11338; PWR10LE-NEXT:    xxswapd vs1, v51339; PWR10LE-NEXT:    xsmuldp f0, f0, v41340; PWR10LE-NEXT:    xsmuldp f0, f0, f11341; PWR10LE-NEXT:    xsmuldp f1, f0, v51342; PWR10LE-NEXT:    blr1343;1344; PWR10BE-LABEL: v8f64_b:1345; PWR10BE:       # %bb.0: # %entry1346; PWR10BE-NEXT:    xsmuldp f0, f1, v21347; PWR10BE-NEXT:    xxswapd vs1, v21348; PWR10BE-NEXT:    xsmuldp f0, f0, f11349; PWR10BE-NEXT:    xxswapd vs1, v31350; PWR10BE-NEXT:    xsmuldp f0, f0, v31351; PWR10BE-NEXT:    xsmuldp f0, f0, f11352; PWR10BE-NEXT:    xxswapd vs1, v41353; PWR10BE-NEXT:    xsmuldp f0, f0, v41354; PWR10BE-NEXT:    xsmuldp f0, f0, f11355; PWR10BE-NEXT:    xxswapd vs1, v51356; PWR10BE-NEXT:    xsmuldp f0, f0, v51357; PWR10BE-NEXT:    xsmuldp f1, f0, f11358; PWR10BE-NEXT:    blr1359entry:1360  %0 = call double @llvm.vector.reduce.fmul.v8f64(double %b, <8 x double> %a)1361  ret double %01362}1363 1364define dso_local double @v8f64_fast(<8 x double> %a) local_unnamed_addr #0 {1365; PWR9LE-LABEL: v8f64_fast:1366; PWR9LE:       # %bb.0: # %entry1367; PWR9LE-NEXT:    xvmuldp vs0, v3, v51368; PWR9LE-NEXT:    xvmuldp vs1, v2, v41369; PWR9LE-NEXT:    xvmuldp vs0, vs1, vs01370; PWR9LE-NEXT:    xxswapd vs1, vs01371; PWR9LE-NEXT:    xvmuldp vs0, vs0, vs11372; PWR9LE-NEXT:    xxswapd vs1, vs01373; PWR9LE-NEXT:    blr1374;1375; PWR9BE-LABEL: v8f64_fast:1376; PWR9BE:       # %bb.0: # %entry1377; PWR9BE-NEXT:    xvmuldp vs0, v3, v51378; PWR9BE-NEXT:    xvmuldp vs1, v2, v41379; PWR9BE-NEXT:    xvmuldp vs0, vs1, vs01380; PWR9BE-NEXT:    xxswapd vs1, vs01381; PWR9BE-NEXT:    xvmuldp vs1, vs0, vs11382; PWR9BE-NEXT:    blr1383;1384; PWR10LE-LABEL: v8f64_fast:1385; PWR10LE:       # %bb.0: # %entry1386; PWR10LE-NEXT:    xvmuldp vs0, v3, v51387; PWR10LE-NEXT:    xvmuldp vs1, v2, v41388; PWR10LE-NEXT:    xvmuldp vs0, vs1, vs01389; PWR10LE-NEXT:    xxswapd vs1, vs01390; PWR10LE-NEXT:    xvmuldp vs0, vs0, vs11391; PWR10LE-NEXT:    xxswapd vs1, vs01392; PWR10LE-NEXT:    blr1393;1394; PWR10BE-LABEL: v8f64_fast:1395; PWR10BE:       # %bb.0: # %entry1396; PWR10BE-NEXT:    xvmuldp vs0, v3, v51397; PWR10BE-NEXT:    xvmuldp vs1, v2, v41398; PWR10BE-NEXT:    xvmuldp vs0, vs1, vs01399; PWR10BE-NEXT:    xxswapd vs1, vs01400; PWR10BE-NEXT:    xvmuldp vs1, vs0, vs11401; PWR10BE-NEXT:    blr1402entry:1403  %0 = call fast double @llvm.vector.reduce.fmul.v8f64(double 1.000000e+00, <8 x double> %a)1404  ret double %01405}1406 1407define dso_local double @v16f64(<16 x double> %a) local_unnamed_addr #0 {1408; PWR9LE-LABEL: v16f64:1409; PWR9LE:       # %bb.0: # %entry1410; PWR9LE-NEXT:    xxswapd vs0, v21411; PWR9LE-NEXT:    xxswapd vs1, v31412; PWR9LE-NEXT:    xsmuldp f0, f0, v21413; PWR9LE-NEXT:    xsmuldp f0, f0, f11414; PWR9LE-NEXT:    xxswapd vs1, v41415; PWR9LE-NEXT:    xsmuldp f0, f0, v31416; PWR9LE-NEXT:    xsmuldp f0, f0, f11417; PWR9LE-NEXT:    xxswapd vs1, v51418; PWR9LE-NEXT:    xsmuldp f0, f0, v41419; PWR9LE-NEXT:    xsmuldp f0, f0, f11420; PWR9LE-NEXT:    xxswapd vs1, v61421; PWR9LE-NEXT:    xsmuldp f0, f0, v51422; PWR9LE-NEXT:    xsmuldp f0, f0, f11423; PWR9LE-NEXT:    xxswapd vs1, v71424; PWR9LE-NEXT:    xsmuldp f0, f0, v61425; PWR9LE-NEXT:    xsmuldp f0, f0, f11426; PWR9LE-NEXT:    xxswapd vs1, v81427; PWR9LE-NEXT:    xsmuldp f0, f0, v71428; PWR9LE-NEXT:    xsmuldp f0, f0, f11429; PWR9LE-NEXT:    xxswapd vs1, v91430; PWR9LE-NEXT:    xsmuldp f0, f0, v81431; PWR9LE-NEXT:    xsmuldp f0, f0, f11432; PWR9LE-NEXT:    xsmuldp f1, f0, v91433; PWR9LE-NEXT:    blr1434;1435; PWR9BE-LABEL: v16f64:1436; PWR9BE:       # %bb.0: # %entry1437; PWR9BE-NEXT:    xxswapd vs0, v21438; PWR9BE-NEXT:    xxswapd vs1, v31439; PWR9BE-NEXT:    xsmuldp f0, v2, f01440; PWR9BE-NEXT:    xsmuldp f0, f0, v31441; PWR9BE-NEXT:    xsmuldp f0, f0, f11442; PWR9BE-NEXT:    xxswapd vs1, v41443; PWR9BE-NEXT:    xsmuldp f0, f0, v41444; PWR9BE-NEXT:    xsmuldp f0, f0, f11445; PWR9BE-NEXT:    xxswapd vs1, v51446; PWR9BE-NEXT:    xsmuldp f0, f0, v51447; PWR9BE-NEXT:    xsmuldp f0, f0, f11448; PWR9BE-NEXT:    xxswapd vs1, v61449; PWR9BE-NEXT:    xsmuldp f0, f0, v61450; PWR9BE-NEXT:    xsmuldp f0, f0, f11451; PWR9BE-NEXT:    xxswapd vs1, v71452; PWR9BE-NEXT:    xsmuldp f0, f0, v71453; PWR9BE-NEXT:    xsmuldp f0, f0, f11454; PWR9BE-NEXT:    xxswapd vs1, v81455; PWR9BE-NEXT:    xsmuldp f0, f0, v81456; PWR9BE-NEXT:    xsmuldp f0, f0, f11457; PWR9BE-NEXT:    xxswapd vs1, v91458; PWR9BE-NEXT:    xsmuldp f0, f0, v91459; PWR9BE-NEXT:    xsmuldp f1, f0, f11460; PWR9BE-NEXT:    blr1461;1462; PWR10LE-LABEL: v16f64:1463; PWR10LE:       # %bb.0: # %entry1464; PWR10LE-NEXT:    xxswapd vs0, v21465; PWR10LE-NEXT:    xxswapd vs1, v31466; PWR10LE-NEXT:    xsmuldp f0, f0, v21467; PWR10LE-NEXT:    xsmuldp f0, f0, f11468; PWR10LE-NEXT:    xxswapd vs1, v41469; PWR10LE-NEXT:    xsmuldp f0, f0, v31470; PWR10LE-NEXT:    xsmuldp f0, f0, f11471; PWR10LE-NEXT:    xxswapd vs1, v51472; PWR10LE-NEXT:    xsmuldp f0, f0, v41473; PWR10LE-NEXT:    xsmuldp f0, f0, f11474; PWR10LE-NEXT:    xxswapd vs1, v61475; PWR10LE-NEXT:    xsmuldp f0, f0, v51476; PWR10LE-NEXT:    xsmuldp f0, f0, f11477; PWR10LE-NEXT:    xxswapd vs1, v71478; PWR10LE-NEXT:    xsmuldp f0, f0, v61479; PWR10LE-NEXT:    xsmuldp f0, f0, f11480; PWR10LE-NEXT:    xxswapd vs1, v81481; PWR10LE-NEXT:    xsmuldp f0, f0, v71482; PWR10LE-NEXT:    xsmuldp f0, f0, f11483; PWR10LE-NEXT:    xxswapd vs1, v91484; PWR10LE-NEXT:    xsmuldp f0, f0, v81485; PWR10LE-NEXT:    xsmuldp f0, f0, f11486; PWR10LE-NEXT:    xsmuldp f1, f0, v91487; PWR10LE-NEXT:    blr1488;1489; PWR10BE-LABEL: v16f64:1490; PWR10BE:       # %bb.0: # %entry1491; PWR10BE-NEXT:    xxswapd vs0, v21492; PWR10BE-NEXT:    xxswapd vs1, v31493; PWR10BE-NEXT:    xsmuldp f0, v2, f01494; PWR10BE-NEXT:    xsmuldp f0, f0, v31495; PWR10BE-NEXT:    xsmuldp f0, f0, f11496; PWR10BE-NEXT:    xxswapd vs1, v41497; PWR10BE-NEXT:    xsmuldp f0, f0, v41498; PWR10BE-NEXT:    xsmuldp f0, f0, f11499; PWR10BE-NEXT:    xxswapd vs1, v51500; PWR10BE-NEXT:    xsmuldp f0, f0, v51501; PWR10BE-NEXT:    xsmuldp f0, f0, f11502; PWR10BE-NEXT:    xxswapd vs1, v61503; PWR10BE-NEXT:    xsmuldp f0, f0, v61504; PWR10BE-NEXT:    xsmuldp f0, f0, f11505; PWR10BE-NEXT:    xxswapd vs1, v71506; PWR10BE-NEXT:    xsmuldp f0, f0, v71507; PWR10BE-NEXT:    xsmuldp f0, f0, f11508; PWR10BE-NEXT:    xxswapd vs1, v81509; PWR10BE-NEXT:    xsmuldp f0, f0, v81510; PWR10BE-NEXT:    xsmuldp f0, f0, f11511; PWR10BE-NEXT:    xxswapd vs1, v91512; PWR10BE-NEXT:    xsmuldp f0, f0, v91513; PWR10BE-NEXT:    xsmuldp f1, f0, f11514; PWR10BE-NEXT:    blr1515entry:1516  %0 = call double @llvm.vector.reduce.fmul.v16f64(double 1.000000e+00, <16 x double> %a)1517  ret double %01518}1519 1520define dso_local double @v16f64_b(<16 x double> %a, double %b) local_unnamed_addr #0 {1521; PWR9LE-LABEL: v16f64_b:1522; PWR9LE:       # %bb.0: # %entry1523; PWR9LE-NEXT:    xxswapd vs0, v21524; PWR9LE-NEXT:    xsmuldp f0, f1, f01525; PWR9LE-NEXT:    xxswapd vs1, v31526; PWR9LE-NEXT:    xsmuldp f0, f0, v21527; PWR9LE-NEXT:    xsmuldp f0, f0, f11528; PWR9LE-NEXT:    xxswapd vs1, v41529; PWR9LE-NEXT:    xsmuldp f0, f0, v31530; PWR9LE-NEXT:    xsmuldp f0, f0, f11531; PWR9LE-NEXT:    xxswapd vs1, v51532; PWR9LE-NEXT:    xsmuldp f0, f0, v41533; PWR9LE-NEXT:    xsmuldp f0, f0, f11534; PWR9LE-NEXT:    xxswapd vs1, v61535; PWR9LE-NEXT:    xsmuldp f0, f0, v51536; PWR9LE-NEXT:    xsmuldp f0, f0, f11537; PWR9LE-NEXT:    xxswapd vs1, v71538; PWR9LE-NEXT:    xsmuldp f0, f0, v61539; PWR9LE-NEXT:    xsmuldp f0, f0, f11540; PWR9LE-NEXT:    xxswapd vs1, v81541; PWR9LE-NEXT:    xsmuldp f0, f0, v71542; PWR9LE-NEXT:    xsmuldp f0, f0, f11543; PWR9LE-NEXT:    xxswapd vs1, v91544; PWR9LE-NEXT:    xsmuldp f0, f0, v81545; PWR9LE-NEXT:    xsmuldp f0, f0, f11546; PWR9LE-NEXT:    xsmuldp f1, f0, v91547; PWR9LE-NEXT:    blr1548;1549; PWR9BE-LABEL: v16f64_b:1550; PWR9BE:       # %bb.0: # %entry1551; PWR9BE-NEXT:    xsmuldp f0, f1, v21552; PWR9BE-NEXT:    xxswapd vs1, v21553; PWR9BE-NEXT:    xsmuldp f0, f0, f11554; PWR9BE-NEXT:    xxswapd vs1, v31555; PWR9BE-NEXT:    xsmuldp f0, f0, v31556; PWR9BE-NEXT:    xsmuldp f0, f0, f11557; PWR9BE-NEXT:    xxswapd vs1, v41558; PWR9BE-NEXT:    xsmuldp f0, f0, v41559; PWR9BE-NEXT:    xsmuldp f0, f0, f11560; PWR9BE-NEXT:    xxswapd vs1, v51561; PWR9BE-NEXT:    xsmuldp f0, f0, v51562; PWR9BE-NEXT:    xsmuldp f0, f0, f11563; PWR9BE-NEXT:    xxswapd vs1, v61564; PWR9BE-NEXT:    xsmuldp f0, f0, v61565; PWR9BE-NEXT:    xsmuldp f0, f0, f11566; PWR9BE-NEXT:    xxswapd vs1, v71567; PWR9BE-NEXT:    xsmuldp f0, f0, v71568; PWR9BE-NEXT:    xsmuldp f0, f0, f11569; PWR9BE-NEXT:    xxswapd vs1, v81570; PWR9BE-NEXT:    xsmuldp f0, f0, v81571; PWR9BE-NEXT:    xsmuldp f0, f0, f11572; PWR9BE-NEXT:    xxswapd vs1, v91573; PWR9BE-NEXT:    xsmuldp f0, f0, v91574; PWR9BE-NEXT:    xsmuldp f1, f0, f11575; PWR9BE-NEXT:    blr1576;1577; PWR10LE-LABEL: v16f64_b:1578; PWR10LE:       # %bb.0: # %entry1579; PWR10LE-NEXT:    xxswapd vs0, v21580; PWR10LE-NEXT:    xsmuldp f0, f1, f01581; PWR10LE-NEXT:    xxswapd vs1, v31582; PWR10LE-NEXT:    xsmuldp f0, f0, v21583; PWR10LE-NEXT:    xsmuldp f0, f0, f11584; PWR10LE-NEXT:    xxswapd vs1, v41585; PWR10LE-NEXT:    xsmuldp f0, f0, v31586; PWR10LE-NEXT:    xsmuldp f0, f0, f11587; PWR10LE-NEXT:    xxswapd vs1, v51588; PWR10LE-NEXT:    xsmuldp f0, f0, v41589; PWR10LE-NEXT:    xsmuldp f0, f0, f11590; PWR10LE-NEXT:    xxswapd vs1, v61591; PWR10LE-NEXT:    xsmuldp f0, f0, v51592; PWR10LE-NEXT:    xsmuldp f0, f0, f11593; PWR10LE-NEXT:    xxswapd vs1, v71594; PWR10LE-NEXT:    xsmuldp f0, f0, v61595; PWR10LE-NEXT:    xsmuldp f0, f0, f11596; PWR10LE-NEXT:    xxswapd vs1, v81597; PWR10LE-NEXT:    xsmuldp f0, f0, v71598; PWR10LE-NEXT:    xsmuldp f0, f0, f11599; PWR10LE-NEXT:    xxswapd vs1, v91600; PWR10LE-NEXT:    xsmuldp f0, f0, v81601; PWR10LE-NEXT:    xsmuldp f0, f0, f11602; PWR10LE-NEXT:    xsmuldp f1, f0, v91603; PWR10LE-NEXT:    blr1604;1605; PWR10BE-LABEL: v16f64_b:1606; PWR10BE:       # %bb.0: # %entry1607; PWR10BE-NEXT:    xsmuldp f0, f1, v21608; PWR10BE-NEXT:    xxswapd vs1, v21609; PWR10BE-NEXT:    xsmuldp f0, f0, f11610; PWR10BE-NEXT:    xxswapd vs1, v31611; PWR10BE-NEXT:    xsmuldp f0, f0, v31612; PWR10BE-NEXT:    xsmuldp f0, f0, f11613; PWR10BE-NEXT:    xxswapd vs1, v41614; PWR10BE-NEXT:    xsmuldp f0, f0, v41615; PWR10BE-NEXT:    xsmuldp f0, f0, f11616; PWR10BE-NEXT:    xxswapd vs1, v51617; PWR10BE-NEXT:    xsmuldp f0, f0, v51618; PWR10BE-NEXT:    xsmuldp f0, f0, f11619; PWR10BE-NEXT:    xxswapd vs1, v61620; PWR10BE-NEXT:    xsmuldp f0, f0, v61621; PWR10BE-NEXT:    xsmuldp f0, f0, f11622; PWR10BE-NEXT:    xxswapd vs1, v71623; PWR10BE-NEXT:    xsmuldp f0, f0, v71624; PWR10BE-NEXT:    xsmuldp f0, f0, f11625; PWR10BE-NEXT:    xxswapd vs1, v81626; PWR10BE-NEXT:    xsmuldp f0, f0, v81627; PWR10BE-NEXT:    xsmuldp f0, f0, f11628; PWR10BE-NEXT:    xxswapd vs1, v91629; PWR10BE-NEXT:    xsmuldp f0, f0, v91630; PWR10BE-NEXT:    xsmuldp f1, f0, f11631; PWR10BE-NEXT:    blr1632entry:1633  %0 = call double @llvm.vector.reduce.fmul.v16f64(double %b, <16 x double> %a)1634  ret double %01635}1636 1637define dso_local double @v16f64_fast(<16 x double> %a) local_unnamed_addr #0 {1638; PWR9LE-LABEL: v16f64_fast:1639; PWR9LE:       # %bb.0: # %entry1640; PWR9LE-NEXT:    xvmuldp vs0, v4, v81641; PWR9LE-NEXT:    xvmuldp vs1, v2, v61642; PWR9LE-NEXT:    xvmuldp vs2, v5, v91643; PWR9LE-NEXT:    xvmuldp vs3, v3, v71644; PWR9LE-NEXT:    xvmuldp vs2, vs3, vs21645; PWR9LE-NEXT:    xvmuldp vs0, vs1, vs01646; PWR9LE-NEXT:    xvmuldp vs0, vs0, vs21647; PWR9LE-NEXT:    xxswapd vs1, vs01648; PWR9LE-NEXT:    xvmuldp vs0, vs0, vs11649; PWR9LE-NEXT:    xxswapd vs1, vs01650; PWR9LE-NEXT:    blr1651;1652; PWR9BE-LABEL: v16f64_fast:1653; PWR9BE:       # %bb.0: # %entry1654; PWR9BE-NEXT:    xvmuldp vs0, v4, v81655; PWR9BE-NEXT:    xvmuldp vs1, v2, v61656; PWR9BE-NEXT:    xvmuldp vs2, v5, v91657; PWR9BE-NEXT:    xvmuldp vs3, v3, v71658; PWR9BE-NEXT:    xvmuldp vs2, vs3, vs21659; PWR9BE-NEXT:    xvmuldp vs0, vs1, vs01660; PWR9BE-NEXT:    xvmuldp vs0, vs0, vs21661; PWR9BE-NEXT:    xxswapd vs1, vs01662; PWR9BE-NEXT:    xvmuldp vs1, vs0, vs11663; PWR9BE-NEXT:    blr1664;1665; PWR10LE-LABEL: v16f64_fast:1666; PWR10LE:       # %bb.0: # %entry1667; PWR10LE-NEXT:    xvmuldp vs0, v4, v81668; PWR10LE-NEXT:    xvmuldp vs1, v2, v61669; PWR10LE-NEXT:    xvmuldp vs2, v5, v91670; PWR10LE-NEXT:    xvmuldp vs3, v3, v71671; PWR10LE-NEXT:    xvmuldp vs2, vs3, vs21672; PWR10LE-NEXT:    xvmuldp vs0, vs1, vs01673; PWR10LE-NEXT:    xvmuldp vs0, vs0, vs21674; PWR10LE-NEXT:    xxswapd vs1, vs01675; PWR10LE-NEXT:    xvmuldp vs0, vs0, vs11676; PWR10LE-NEXT:    xxswapd vs1, vs01677; PWR10LE-NEXT:    blr1678;1679; PWR10BE-LABEL: v16f64_fast:1680; PWR10BE:       # %bb.0: # %entry1681; PWR10BE-NEXT:    xvmuldp vs0, v4, v81682; PWR10BE-NEXT:    xvmuldp vs1, v2, v61683; PWR10BE-NEXT:    xvmuldp vs2, v5, v91684; PWR10BE-NEXT:    xvmuldp vs3, v3, v71685; PWR10BE-NEXT:    xvmuldp vs2, vs3, vs21686; PWR10BE-NEXT:    xvmuldp vs0, vs1, vs01687; PWR10BE-NEXT:    xvmuldp vs0, vs0, vs21688; PWR10BE-NEXT:    xxswapd vs1, vs01689; PWR10BE-NEXT:    xvmuldp vs1, vs0, vs11690; PWR10BE-NEXT:    blr1691entry:1692  %0 = call fast double @llvm.vector.reduce.fmul.v16f64(double 1.000000e+00, <16 x double> %a)1693  ret double %01694}1695 1696declare double @llvm.vector.reduce.fmul.v2f64(double, <2 x double>) #01697declare double @llvm.vector.reduce.fmul.v4f64(double, <4 x double>) #01698declare double @llvm.vector.reduce.fmul.v8f64(double, <8 x double>) #01699declare double @llvm.vector.reduce.fmul.v16f64(double, <16 x double>) #01700 1701attributes #0 = { nounwind }1702