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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc -verify-machineinstrs -mcpu=pwr10 \3; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s4; RUN: llc -verify-machineinstrs -mcpu=future \5; RUN: -mtriple=powerpc64le-unknown-unknown < %s | FileCheck -check-prefix=FUTURE %s6 7; RUN: llc -verify-machineinstrs -mcpu=pwr10 \8; RUN: -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s9; RUN: llc -verify-machineinstrs -mcpu=future \10; RUN: -mtriple=powerpc64-unknown-unknown < %s | FileCheck --check-prefix=FUTURE %s11 12; Function Attrs: nounwind readnone13define void @stxvl1(<16 x i8> %a, ptr %b, i64 %c) {14; CHECK-LABEL: stxvl1:15; CHECK: # %bb.0: # %entry16; CHECK-NEXT: sldi 3, 6, 5617; CHECK-NEXT: stxvl 34, 5, 318; CHECK-NEXT: blr19;20; FUTURE-LABEL: stxvl1:21; FUTURE: # %bb.0: # %entry22; FUTURE-NEXT: stxvrl 34, 5, 623; FUTURE-NEXT: blr24entry:25 %cconv = trunc i64 %c to i3226 tail call void @llvm.vp.store.v16i8.p0(<16 x i8> %a, ptr %b, <16 x i1> splat (i1 true), i32 %cconv)27 ret void28}29 30; Function Attrs: nounwind readnone31define void @stxvl2(<8 x i16> %a, ptr %b, i64 %c) {32; CHECK-LABEL: stxvl2:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: sldi 3, 6, 5735; CHECK-NEXT: stxvl 34, 5, 336; CHECK-NEXT: blr37;38; FUTURE-LABEL: stxvl2:39; FUTURE: # %bb.0: # %entry40; FUTURE-NEXT: sldi 3, 6, 141; FUTURE-NEXT: stxvrl 34, 5, 342; FUTURE-NEXT: blr43entry:44 %cconv = trunc i64 %c to i3245 tail call void @llvm.vp.store.v8i16.p0(<8 x i16> %a, ptr %b, <8 x i1> splat (i1 true), i32 %cconv)46 ret void47}48 49; Function Attrs: nounwind readnone50define void @stxvl4(<4 x i32> %a, ptr %b, i64 %c) {51; CHECK-LABEL: stxvl4:52; CHECK: # %bb.0: # %entry53; CHECK-NEXT: sldi 3, 6, 5854; CHECK-NEXT: stxvl 34, 5, 355; CHECK-NEXT: blr56;57; FUTURE-LABEL: stxvl4:58; FUTURE: # %bb.0: # %entry59; FUTURE-NEXT: sldi 3, 6, 260; FUTURE-NEXT: stxvrl 34, 5, 361; FUTURE-NEXT: blr62entry:63 %cconv = trunc i64 %c to i3264 tail call void @llvm.vp.store.v4i32.p0(<4 x i32> %a, ptr %b, <4 x i1> splat (i1 true), i32 %cconv)65 ret void66}67 68; Function Attrs: nounwind readnone69define void @stxvl8(<2 x i64> %a, ptr %b, i64 %c) {70; CHECK-LABEL: stxvl8:71; CHECK: # %bb.0: # %entry72; CHECK-NEXT: sldi 3, 6, 5973; CHECK-NEXT: stxvl 34, 5, 374; CHECK-NEXT: blr75;76; FUTURE-LABEL: stxvl8:77; FUTURE: # %bb.0: # %entry78; FUTURE-NEXT: sldi 3, 6, 379; FUTURE-NEXT: stxvrl 34, 5, 380; FUTURE-NEXT: blr81entry:82 %cconv = trunc i64 %c to i3283 tail call void @llvm.vp.store.v2i64.p0(<2 x i64> %a, ptr %b, <2 x i1> splat (i1 true), i32 %cconv)84 ret void85}86 87; Function Attrs: nounwind readnone88define <16 x i8> @lxvl1(ptr %a, i64 %b) {89; CHECK-LABEL: lxvl1:90; CHECK: # %bb.0: # %entry91; CHECK-NEXT: sldi 4, 4, 5692; CHECK-NEXT: lxvl 34, 3, 493; CHECK-NEXT: blr94;95; FUTURE-LABEL: lxvl1:96; FUTURE: # %bb.0: # %entry97; FUTURE-NEXT: lxvrl 34, 3, 498; FUTURE-NEXT: blr99entry:100 %bconv = trunc i64 %b to i32101 %0 = tail call <16 x i8> @llvm.vp.load.v16i8.p0(ptr %a, <16 x i1> splat (i1 true), i32 %bconv)102 ret <16 x i8> %0103}104 105; Function Attrs: nounwind readnone106define <8 x i16> @lxvl2(ptr %a, i64 %b) {107; CHECK-LABEL: lxvl2:108; CHECK: # %bb.0: # %entry109; CHECK-NEXT: sldi 4, 4, 57110; CHECK-NEXT: lxvl 34, 3, 4111; CHECK-NEXT: blr112;113; FUTURE-LABEL: lxvl2:114; FUTURE: # %bb.0: # %entry115; FUTURE-NEXT: sldi 4, 4, 1116; FUTURE-NEXT: lxvrl 34, 3, 4117; FUTURE-NEXT: blr118entry:119 %bconv = trunc i64 %b to i32120 %0 = tail call <8 x i16> @llvm.vp.load.v8i16.p0(ptr %a, <8 x i1> splat (i1 true), i32 %bconv)121 ret <8 x i16> %0122}123 124; Function Attrs: nounwind readnone125define <4 x i32> @lxvl4(ptr %a, i64 %b) {126; CHECK-LABEL: lxvl4:127; CHECK: # %bb.0: # %entry128; CHECK-NEXT: sldi 4, 4, 58129; CHECK-NEXT: lxvl 34, 3, 4130; CHECK-NEXT: blr131;132; FUTURE-LABEL: lxvl4:133; FUTURE: # %bb.0: # %entry134; FUTURE-NEXT: sldi 4, 4, 2135; FUTURE-NEXT: lxvrl 34, 3, 4136; FUTURE-NEXT: blr137entry:138 %bconv = trunc i64 %b to i32139 %0 = tail call <4 x i32> @llvm.vp.load.v4i32.p0(ptr %a, <4 x i1> splat (i1 true), i32 %bconv)140 ret <4 x i32> %0141}142 143; Function Attrs: nounwind readnone144define <2 x i64> @lxvl8(ptr %a, i64 %b) {145; CHECK-LABEL: lxvl8:146; CHECK: # %bb.0: # %entry147; CHECK-NEXT: sldi 4, 4, 59148; CHECK-NEXT: lxvl 34, 3, 4149; CHECK-NEXT: blr150;151; FUTURE-LABEL: lxvl8:152; FUTURE: # %bb.0: # %entry153; FUTURE-NEXT: sldi 4, 4, 3154; FUTURE-NEXT: lxvrl 34, 3, 4155; FUTURE-NEXT: blr156entry:157 %bconv = trunc i64 %b to i32158 %0 = tail call <2 x i64> @llvm.vp.load.v2i64.p0(ptr %a, <2 x i1> splat (i1 true), i32 %bconv)159 ret <2 x i64> %0160}161