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1;; Tests that the ppc-vsx-fma-mutate pass with the schedule-ppc-vsx-fma-mutation-early pass does not hoist xxspltiw out of loops.2; RUN: llc -verify-machineinstrs -mcpu=pwr10 -disable-ppc-vsx-fma-mutation=false \3; RUN: -ppc-asm-full-reg-names -schedule-ppc-vsx-fma-mutation-early \4; RUN: -mtriple powerpc64-ibm-aix < %s | FileCheck --check-prefixes=CHECK64,AIX64 %s5 6; RUN: llc -verify-machineinstrs -mcpu=pwr10 -disable-ppc-vsx-fma-mutation=false \7; RUN: -ppc-asm-full-reg-names -schedule-ppc-vsx-fma-mutation-early \8; RUN: -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck --check-prefixes=CHECK64,LINUX64 %s9 10; RUN: llc -verify-machineinstrs -mcpu=pwr10 -disable-ppc-vsx-fma-mutation=false \11; RUN: -ppc-asm-full-reg-names -schedule-ppc-vsx-fma-mutation-early \12; RUN: -mtriple powerpc-ibm-aix < %s | FileCheck --check-prefix=CHECK32 %s13 14define void @bar(ptr noalias nocapture noundef writeonly %__output_a, ptr noalias nocapture noundef readonly %var1321In_a, ptr noalias nocapture noundef readonly %n) {15entry:16 %0 = load i32, ptr %n, align 417 %cmp11 = icmp sgt i32 %0, 018 br i1 %cmp11, label %for.body.preheader, label %for.end19 20for.body.preheader:21 %wide.trip.count = zext i32 %0 to i6422 br label %for.body23 24for.body:25 %indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]26 %1 = shl nsw i64 %indvars.iv, 227 %add.ptr = getelementptr inbounds float, ptr %var1321In_a, i64 %128 %add.ptr.val = load <4 x float>, ptr %add.ptr, align 129 %2 = tail call contract <4 x float> @llvm.fma.v4f32(<4 x float> %add.ptr.val, <4 x float> <float 0x3FF7154760000000, float 0x3FF7154760000000, float 0x3FF7154760000000, float 0x3FF7154760000000>, <4 x float> <float 6.270500e+03, float 6.270500e+03, float 6.270500e+03, float 6.270500e+03>)30 %add.ptr6 = getelementptr inbounds float, ptr %__output_a, i64 %131 store <4 x float> %2, ptr %add.ptr6, align 1 32 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 133 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count34 br i1 %exitcond.not, label %for.end, label %for.body35 36for.end:37 ret void38}39 40define void @foo(i1 %cmp97) #0 {41entry:42 br i1 %cmp97, label %for.body, label %for.end43 44for.body: ; preds = %for.body, %entry45 %0 = phi float [ %vecext.i, %for.body ], [ 0.000000e+00, %entry ]46 %splat.splatinsert.i = insertelement <4 x float> zeroinitializer, float %0, i64 047 %1 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %splat.splatinsert.i, <4 x float> zeroinitializer, <4 x float> splat (float 6.270500e+03))48 %2 = tail call <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float> zeroinitializer, <4 x float> %splat.splatinsert.i)49 %3 = bitcast <4 x float> %1 to <4 x i32>50 %and1.i8896 = and <4 x i32> %2, %351 %4 = bitcast <4 x i32> %and1.i8896 to <4 x float>52 %vecext.i = extractelement <4 x float> %4, i64 053 br label %for.body54 55for.end: ; preds = %entry56 ret void57}58 59; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)60declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) 61 62; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)63declare <4 x i32> @llvm.ppc.vsx.xvcmpgtsp(<4 x float>, <4 x float>)64 65; CHECK64: bar:66; CHECK64: # %bb.0: # %entry67; CHECK64-NEXT: lwz r5, 0(r5)68; CHECK64-NEXT: cmpwi r5, 169; CHECK64-NEXT: bltlr cr070; CHECK64-NEXT: # %bb.1: # %for.body.preheader71; CHECK64-NEXT: xxspltiw vs0, 106906681172; CHECK64-NEXT: xxspltiw vs1, 117046988873; CHECK64-NEXT: mtctr r574; CHECK64-NEXT: li r5, 075; CHECK64-NEXT: {{.*}}align 576; CHECK64-NEXT: [[L2_bar:.*]]: # %for.body77; CHECK64-NEXT: # =>This Inner Loop Header: Depth=178; CHECK64-NEXT: lxvx vs2, r4, r579; CHECK64-NEXT: xvmaddmsp vs2, vs0, vs180; CHECK64-NEXT: stxvx vs2, r3, r581; CHECK64-NEXT: addi r5, r5, 1682; CHECK64-NEXT: bdnz [[L2_bar]]83; CHECK64-NEXT: # %bb.3: # %for.end84; CHECK64-NEXT: blr85 86; AIX64: .foo:87; AIX64-NEXT: # %bb.0: # %entry88; AIX64-NEXT: andi. r3, r3, 189; AIX64-NEXT: bclr 4, gt, 090; AIX64-NEXT: # %bb.1: # %for.body.preheader91; AIX64-NEXT: xxlxor f0, f0, f092; AIX64-NEXT: xxlxor vs1, vs1, vs193; AIX64-NEXT: xxlxor f2, f2, f294; AIX64-NEXT: .align 495; AIX64-NEXT: L..BB1_2: # %for.body96; AIX64-NEXT: # =>This Inner Loop Header: Depth=197; AIX64-NEXT: xxmrghd vs2, vs2, vs098; AIX64-NEXT: xvcvdpsp vs34, vs299; AIX64-NEXT: xxmrghd vs2, vs0, vs0100; AIX64-NEXT: xvcvdpsp vs35, vs2101; AIX64-NEXT: xxspltiw vs2, 1170469888102; AIX64-NEXT: vmrgew v2, v2, v3103; AIX64-NEXT: xvcmpgtsp vs3, vs1, vs34104; AIX64-NEXT: xvmaddasp vs2, vs34, vs1105; AIX64-NEXT: xxland vs2, vs3, vs2106; AIX64-NEXT: xscvspdpn f2, vs2107; AIX64-NEXT: b L..BB1_2108 109; LINUX64: foo: # @foo110; LINUX64-NEXT: .Lfunc_begin1:111; LINUX64-NEXT: .cfi_startproc112; LINUX64-NEXT: # %bb.0: # %entry113; LINUX64-NEXT: andi. r3, r3, 1114; LINUX64-NEXT: bclr 4, gt, 0115; LINUX64-NEXT: # %bb.1: # %for.body.preheader116; LINUX64-NEXT: xxlxor f0, f0, f0117; LINUX64-NEXT: xxlxor vs1, vs1, vs1118; LINUX64-NEXT: xxlxor f2, f2, f2119; LINUX64-NEXT: .p2align 4120; LINUX64-NEXT: .LBB1_2: # %for.body121; LINUX64-NEXT: # =>This Inner Loop Header: Depth=1122; LINUX64-NEXT: xxmrghd vs2, vs0, vs2123; LINUX64-NEXT: xvcvdpsp vs34, vs2124; LINUX64-NEXT: xxspltd vs2, vs0, 0125; LINUX64-NEXT: xvcvdpsp vs35, vs2126; LINUX64-NEXT: xxspltiw vs2, 1170469888127; LINUX64-NEXT: vmrgew v2, v3, v2128; LINUX64-NEXT: xvcmpgtsp vs3, vs1, vs34129; LINUX64-NEXT: xvmaddasp vs2, vs34, vs1130; LINUX64-NEXT: xxland vs2, vs3, vs2131; LINUX64-NEXT: xxsldwi vs2, vs2, vs2, 3132; LINUX64-NEXT: xscvspdpn f2, vs2133; LINUX64-NEXT: b .LBB1_2134 135; CHECK32: .bar:136; CHECK32-NEXT: # %bb.0: # %entry137; CHECK32-NEXT: lwz r5, 0(r5)138; CHECK32-NEXT: cmpwi r5, 0139; CHECK32-NEXT: blelr cr0140; CHECK32-NEXT: # %bb.1: # %for.body.preheader141; CHECK32-NEXT: xxspltiw vs0, 1069066811142; CHECK32-NEXT: xxspltiw vs1, 1170469888143; CHECK32-NEXT: li r6, 0144; CHECK32-NEXT: li r7, 0145; CHECK32-NEXT: .align 4146; CHECK32-NEXT: [[L2_foo:.*]]: # %for.body147; CHECK32-NEXT: # =>This Inner Loop Header: Depth=1148; CHECK32-NEXT: slwi r8, r6, 4149; CHECK32-NEXT: addic r6, r6, 1150; CHECK32-NEXT: addze r7, r7151; CHECK32-NEXT: lxvx vs2, r4, r8152; CHECK32-NEXT: xvmaddmsp vs2, vs0, vs1153; CHECK32-NEXT: stxvx vs2, r3, r8154; CHECK32-NEXT: xor r8, r6, r5155; CHECK32-NEXT: or. r8, r8, r7156; CHECK32-NEXT: bne cr0, [[L2_foo]]157 158; CHECK32: .foo:159; CHECK32-NEXT: # %bb.0: # %entry160; CHECK32-NEXT: andi. r3, r3, 1161; CHECK32-NEXT: bclr 4, gt, 0162; CHECK32-NEXT: # %bb.1: # %for.body.preheader163; CHECK32-NEXT: lwz r3, L..C0(r2) # %const.0164; CHECK32-NEXT: xxlxor f1, f1, f1165; CHECK32-NEXT: xxlxor vs0, vs0, vs0166; CHECK32-NEXT: xscvdpspn vs35, f1167; CHECK32-NEXT: lxv vs34, 0(r3)168; CHECK32-NEXT: .align 4169; CHECK32-NEXT: L..BB1_2: # %for.body170; CHECK32-NEXT: # =>This Inner Loop Header: Depth=1171; CHECK32-NEXT: xscvdpspn vs36, f1172; CHECK32-NEXT: xxspltiw vs1, 1170469888173; CHECK32-NEXT: vperm v4, v4, v3, v2174; CHECK32-NEXT: xvcmpgtsp vs2, vs0, vs36175; CHECK32-NEXT: xvmaddasp vs1, vs36, vs0176; CHECK32-NEXT: xxland vs1, vs2, vs1177; CHECK32-NEXT: xscvspdpn f1, vs1178; CHECK32-NEXT: b L..BB1_2179