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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=future < %s | \4; RUN: FileCheck %s5; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix-xcoff \6; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=future < %s | \7; RUN: FileCheck %s --check-prefix=AIX8 9; Test for load/store to/from v4i32.10 11define <4 x i32> @testLXVRL(ptr %a, i64 %b) {12; CHECK-LABEL: testLXVRL:13; CHECK: # %bb.0: # %entry14; CHECK-NEXT: lxvrl v2, r3, r415; CHECK-NEXT: blr16;17; AIX-LABEL: testLXVRL:18; AIX: # %bb.0: # %entry19; AIX-NEXT: lxvrl v2, r3, r420; AIX-NEXT: blr21entry:22 %0 = tail call <4 x i32> @llvm.ppc.vsx.lxvrl(ptr %a, i64 %b)23 ret <4 x i32> %024}25declare <4 x i32> @llvm.ppc.vsx.lxvrl(ptr, i64)26 27define <4 x i32> @testLXVRLL(ptr %a, i64 %b) {28; CHECK-LABEL: testLXVRLL:29; CHECK: # %bb.0: # %entry30; CHECK-NEXT: lxvrll v2, r3, r431; CHECK-NEXT: blr32;33; AIX-LABEL: testLXVRLL:34; AIX: # %bb.0: # %entry35; AIX-NEXT: lxvrll v2, r3, r436; AIX-NEXT: blr37entry:38 %0 = tail call <4 x i32> @llvm.ppc.vsx.lxvrll(ptr %a, i64 %b)39 ret <4 x i32> %040}41declare <4 x i32> @llvm.ppc.vsx.lxvrll(ptr, i64)42 43define void @testSTXVRL(<4 x i32> %a, ptr %b, i64 %c) {44; CHECK-LABEL: testSTXVRL:45; CHECK: # %bb.0: # %entry46; CHECK-NEXT: stxvrl v2, r5, r647; CHECK-NEXT: blr48;49; AIX-LABEL: testSTXVRL:50; AIX: # %bb.0: # %entry51; AIX-NEXT: stxvrl v2, r3, r452; AIX-NEXT: blr53entry:54 tail call void @llvm.ppc.vsx.stxvrl(<4 x i32> %a, ptr %b, i64 %c)55 ret void56}57declare void @llvm.ppc.vsx.stxvrl(<4 x i32>, ptr, i64)58 59define void @testSTXVRLL(<4 x i32> %a, ptr %b, i64 %c) {60; CHECK-LABEL: testSTXVRLL:61; CHECK: # %bb.0: # %entry62; CHECK-NEXT: stxvrll v2, r5, r663; CHECK-NEXT: blr64;65; AIX-LABEL: testSTXVRLL:66; AIX: # %bb.0: # %entry67; AIX-NEXT: stxvrll v2, r3, r468; AIX-NEXT: blr69entry:70 tail call void @llvm.ppc.vsx.stxvrll(<4 x i32> %a, ptr %b, i64 %c)71 ret void72}73declare void @llvm.ppc.vsx.stxvrll(<4 x i32>, ptr, i64)74 75; Test for load/store vectore pair.76 77define <256 x i1> @testLXVPRL(ptr %vpp, i64 %b) {78; CHECK-LABEL: testLXVPRL:79; CHECK: # %bb.0: # %entry80; CHECK-NEXT: lxvprl vsp34, r4, r581; CHECK-NEXT: stxv v2, 16(r3)82; CHECK-NEXT: stxv v3, 0(r3)83; CHECK-NEXT: blr84;85; AIX-LABEL: testLXVPRL:86; AIX: # %bb.0: # %entry87; AIX-NEXT: lxvprl vsp34, r4, r588; AIX-NEXT: stxv v3, 16(r3)89; AIX-NEXT: stxv v2, 0(r3)90; AIX-NEXT: blr91entry:92 %0 = tail call <256 x i1> @llvm.ppc.vsx.lxvprl(ptr %vpp, i64 %b)93 ret <256 x i1> %094}95declare <256 x i1> @llvm.ppc.vsx.lxvprl(ptr, i64)96 97define <256 x i1> @testLXVPRLL(ptr %vpp, i64 %b) {98; CHECK-LABEL: testLXVPRLL:99; CHECK: # %bb.0: # %entry100; CHECK-NEXT: lxvprll vsp34, r4, r5101; CHECK-NEXT: stxv v2, 16(r3)102; CHECK-NEXT: stxv v3, 0(r3)103; CHECK-NEXT: blr104;105; AIX-LABEL: testLXVPRLL:106; AIX: # %bb.0: # %entry107; AIX-NEXT: lxvprll vsp34, r4, r5108; AIX-NEXT: stxv v3, 16(r3)109; AIX-NEXT: stxv v2, 0(r3)110; AIX-NEXT: blr111entry:112 %0 = tail call <256 x i1> @llvm.ppc.vsx.lxvprll(ptr %vpp, i64 %b)113 ret <256 x i1> %0114}115declare <256 x i1> @llvm.ppc.vsx.lxvprll(ptr, i64)116 117define void @testSTXVPRL(ptr %v, ptr %vp, i64 %len) {118; CHECK-LABEL: testSTXVPRL:119; CHECK: # %bb.0: # %entry120; CHECK-NEXT: lxv v2, 16(r3)121; CHECK-NEXT: lxv v3, 0(r3)122; CHECK-NEXT: stxvprl vsp34, r4, r5123; CHECK-NEXT: blr124;125; AIX-LABEL: testSTXVPRL:126; AIX: # %bb.0: # %entry127; AIX-NEXT: lxv v2, 0(r3)128; AIX-NEXT: lxv v3, 16(r3)129; AIX-NEXT: stxvprl vsp34, r4, r5130; AIX-NEXT: blr131entry:132 %0 = load <256 x i1>, ptr %v, align 32133 tail call void @llvm.ppc.vsx.stxvprl(<256 x i1> %0, ptr %vp, i64 %len)134 ret void135}136declare void @llvm.ppc.vsx.stxvprl(<256 x i1>, ptr, i64)137 138define void @testSTXVPRLL(ptr %v, ptr %vp, i64 %len) {139; CHECK-LABEL: testSTXVPRLL:140; CHECK: # %bb.0: # %entry141; CHECK-NEXT: lxv v2, 16(r3)142; CHECK-NEXT: lxv v3, 0(r3)143; CHECK-NEXT: stxvprll vsp34, r4, r5144; CHECK-NEXT: blr145;146; AIX-LABEL: testSTXVPRLL:147; AIX: # %bb.0: # %entry148; AIX-NEXT: lxv v2, 0(r3)149; AIX-NEXT: lxv v3, 16(r3)150; AIX-NEXT: stxvprll vsp34, r4, r5151; AIX-NEXT: blr152entry:153 %0 = load <256 x i1>, ptr %v, align 32154 tail call void @llvm.ppc.vsx.stxvprll(<256 x i1> %0, ptr %vp, i64 %len)155 ret void156}157declare void @llvm.ppc.vsx.stxvprll(<256 x i1>, ptr, i64)158