1133 lines · plain
1; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s2; RUN: llc -mcpu=pwr9 -mtriple=powerpc64-unknown-unknown < %s | FileCheck %s \3; RUN: --check-prefix=CHECK-BE4; Function Attrs: norecurse nounwind readonly5define <16 x i8> @vecucuc(ptr nocapture readonly %ptr) {6entry:7 %0 = load i8, ptr %ptr, align 18 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 09 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer10 ret <16 x i8> %splat.splat11; CHECK-LABEL: vecucuc12; CHECK: lxsibzx 34, 0, 313; CHECK-NEXT: vspltb 2, 2, 714; CHECK-BE-LABEL: vecucuc15; CHECK-BE: lxsibzx 34, 0, 316; CHECK-BE-NEXT: vspltb 2, 2, 717}18 19; Function Attrs: norecurse nounwind readonly20define <8 x i16> @vecusuc(ptr nocapture readonly %ptr) {21entry:22 %0 = load i8, ptr %ptr, align 123 %conv = zext i8 %0 to i1624 %splat.splatinsert = insertelement <8 x i16> undef, i16 %conv, i32 025 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer26 ret <8 x i16> %splat.splat27; CHECK-LABEL: vecusuc28; CHECK: lxsibzx 34, 0, 329; CHECK-NEXT: vsplth 2, 2, 330; CHECK-BE-LABEL: vecusuc31; CHECK-BE: lxsibzx 34, 0, 332; CHECK-BE-NEXT: vsplth 2, 2, 333}34 35; Function Attrs: norecurse nounwind readonly36define <4 x i32> @vecuiuc(ptr nocapture readonly %ptr) {37entry:38 %0 = load i8, ptr %ptr, align 139 %conv = zext i8 %0 to i3240 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 041 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer42 ret <4 x i32> %splat.splat43; CHECK-LABEL: vecuiuc44; CHECK: lxsibzx 0, 0, 345; CHECK-NEXT: xxspltw 34, 0, 146; CHECK-BE-LABEL: vecuiuc47; CHECK-BE: lxsibzx 0, 0, 348; CHECK-BE-NEXT: xxspltw 34, 0, 149}50 51; Function Attrs: norecurse nounwind readonly52define <2 x i64> @veculuc(ptr nocapture readonly %ptr) {53entry:54 %0 = load i8, ptr %ptr, align 155 %conv = zext i8 %0 to i6456 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 057 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer58 ret <2 x i64> %splat.splat59; CHECK-LABEL: veculuc60; CHECK: lxsibzx 0, 0, 361; CHECK-NEXT: xxspltd 34, 0, 062; CHECK-BE-LABEL: veculuc63; CHECK-BE: lxsibzx 0, 0, 364; CHECK-BE-NEXT: xxspltd 34, 0, 065}66 67; Function Attrs: norecurse nounwind readonly68define <16 x i8> @vecscuc(ptr nocapture readonly %ptr) {69entry:70 %0 = load i8, ptr %ptr, align 171 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 072 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer73 ret <16 x i8> %splat.splat74; CHECK-LABEL: vecscuc75; CHECK: lxsibzx 34, 0, 376; CHECK-NEXT: vspltb 2, 2, 777; CHECK-BE-LABEL: vecscuc78; CHECK-BE: lxsibzx 34, 0, 379; CHECK-BE-NEXT: vspltb 2, 2, 780}81 82; Function Attrs: norecurse nounwind readonly83define <8 x i16> @vecssuc(ptr nocapture readonly %ptr) {84entry:85 %0 = load i8, ptr %ptr, align 186 %conv = zext i8 %0 to i1687 %splat.splatinsert = insertelement <8 x i16> undef, i16 %conv, i32 088 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer89 ret <8 x i16> %splat.splat90; CHECK-LABEL: vecssuc91; CHECK: lxsibzx 34, 0, 392; CHECK-NEXT: vsplth 2, 2, 393; CHECK-BE-LABEL: vecssuc94; CHECK-BE: lxsibzx 34, 0, 395; CHECK-BE-NEXT: vsplth 2, 2, 396}97 98; Function Attrs: norecurse nounwind readonly99define <4 x i32> @vecsiuc(ptr nocapture readonly %ptr) {100entry:101 %0 = load i8, ptr %ptr, align 1102 %conv = zext i8 %0 to i32103 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0104 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer105 ret <4 x i32> %splat.splat106; CHECK-LABEL: vecsiuc107; CHECK: lxsibzx 0, 0, 3108; CHECK-NEXT: xxspltw 34, 0, 1109; CHECK-BE-LABEL: vecsiuc110; CHECK-BE: lxsibzx 0, 0, 3111; CHECK-BE-NEXT: xxspltw 34, 0, 1112}113 114; Function Attrs: norecurse nounwind readonly115define <2 x i64> @vecsluc(ptr nocapture readonly %ptr) {116entry:117 %0 = load i8, ptr %ptr, align 1118 %conv = zext i8 %0 to i64119 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0120 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer121 ret <2 x i64> %splat.splat122; CHECK-LABEL: vecsluc123; CHECK: lxsibzx 0, 0, 3124; CHECK-NEXT: xxspltd 34, 0, 0125; CHECK-BE-LABEL: vecsluc126; CHECK-BE: lxsibzx 0, 0, 3127; CHECK-BE-NEXT: xxspltd 34, 0, 0128}129 130; Function Attrs: norecurse nounwind readonly131define <4 x float> @vecfuc(ptr nocapture readonly %ptr) {132entry:133 %0 = load i8, ptr %ptr, align 1134 %conv = uitofp i8 %0 to float135 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0136 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer137 ret <4 x float> %splat.splat138; CHECK-LABEL: vecfuc139; CHECK: lxsibzx [[LD:[0-9]+]], 0, 3140; CHECK-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]]141; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]142; CHECK-NEXT: xxspltw 34, [[CONVS]], 0143; CHECK-BE-LABEL: vecfuc144; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3145; CHECK-BE-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]]146; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]147; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0148}149 150; Function Attrs: norecurse nounwind readonly151define <2 x double> @vecduc(ptr nocapture readonly %ptr) {152entry:153 %0 = load i8, ptr %ptr, align 1154 %conv = uitofp i8 %0 to double155 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0156 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer157 ret <2 x double> %splat.splat158; CHECK-LABEL: vecduc159; CHECK: lxsibzx [[LD:[0-9]+]], 0, 3160; CHECK-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]]161; CHECK-NEXT: xxspltd 34, [[CONVD]], 0162; CHECK-BE-LABEL: vecduc163; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3164; CHECK-BE-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]]165; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0166}167 168; Function Attrs: norecurse nounwind readonly169define <16 x i8> @vecucsc(ptr nocapture readonly %ptr) {170entry:171 %0 = load i8, ptr %ptr, align 1172 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0173 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer174 ret <16 x i8> %splat.splat175; CHECK-LABEL: vecucsc176; CHECK: lxsibzx 34, 0, 3177; CHECK-NEXT: vspltb 2, 2, 7178; CHECK-BE-LABEL: vecucsc179; CHECK-BE: lxsibzx 34, 0, 3180; CHECK-BE-NEXT: vspltb 2, 2, 7181}182 183; Function Attrs: norecurse nounwind readonly184define <4 x i32> @vecuisc(ptr nocapture readonly %ptr) {185entry:186 %0 = load i8, ptr %ptr, align 1187 %conv = sext i8 %0 to i32188 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0189 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer190 ret <4 x i32> %splat.splat191; CHECK-LABEL: vecuisc192; CHECK: lxsibzx 34, 0, 3193; CHECK-NEXT: vextsb2w 2, 2194; CHECK-NEXT: xxspltw 34, 34, 1195; CHECK-BE-LABEL: vecuisc196; CHECK-BE: lxsibzx 34, 0, 3197; CHECK-BE-NEXT: vextsb2w 2, 2198; CHECK-BE-NEXT: xxspltw 34, 34, 1199}200 201; Function Attrs: norecurse nounwind readonly202define <2 x i64> @veculsc(ptr nocapture readonly %ptr) {203entry:204 %0 = load i8, ptr %ptr, align 1205 %conv = sext i8 %0 to i64206 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0207 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer208 ret <2 x i64> %splat.splat209; CHECK-LABEL: veculsc210; CHECK: lxsibzx 34, 0, 3211; CHECK-NEXT: vextsb2d 2, 2212; CHECK-NEXT: xxspltd 34, 34, 0213; CHECK-BE-LABEL: veculsc214; CHECK-BE: lxsibzx 34, 0, 3215; CHECK-BE-NEXT: vextsb2d 2, 2216; CHECK-BE-NEXT: xxspltd 34, 34, 0217}218 219; Function Attrs: norecurse nounwind readonly220define <16 x i8> @vecscsc(ptr nocapture readonly %ptr) {221entry:222 %0 = load i8, ptr %ptr, align 1223 %splat.splatinsert = insertelement <16 x i8> undef, i8 %0, i32 0224 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer225 ret <16 x i8> %splat.splat226; CHECK-LABEL: vecscsc227; CHECK: lxsibzx 34, 0, 3228; CHECK-NEXT: vspltb 2, 2, 7229; CHECK-BE-LABEL: vecscsc230; CHECK-BE: lxsibzx 34, 0, 3231; CHECK-BE-NEXT: vspltb 2, 2, 7232}233 234; Function Attrs: norecurse nounwind readonly235define <4 x i32> @vecsisc(ptr nocapture readonly %ptr) {236entry:237 %0 = load i8, ptr %ptr, align 1238 %conv = sext i8 %0 to i32239 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0240 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer241 ret <4 x i32> %splat.splat242; CHECK-LABEL: vecsisc243; CHECK: lxsibzx 34, 0, 3244; CHECK-NEXT: vextsb2w 2, 2245; CHECK-NEXT: xxspltw 34, 34, 1246; CHECK-BE-LABEL: vecsisc247; CHECK-BE: lxsibzx 34, 0, 3248; CHECK-BE-NEXT: vextsb2w 2, 2249; CHECK-BE-NEXT: xxspltw 34, 34, 1250}251 252; Function Attrs: norecurse nounwind readonly253define <2 x i64> @vecslsc(ptr nocapture readonly %ptr) {254entry:255 %0 = load i8, ptr %ptr, align 1256 %conv = sext i8 %0 to i64257 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0258 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer259 ret <2 x i64> %splat.splat260; CHECK-LABEL: vecslsc261; CHECK: lxsibzx 34, 0, 3262; CHECK-NEXT: vextsb2d 2, 2263; CHECK-NEXT: xxspltd 34, 34, 0264; CHECK-BE-LABEL: vecslsc265; CHECK-BE: lxsibzx 34, 0, 3266; CHECK-BE-NEXT: vextsb2d 2, 2267; CHECK-BE-NEXT: xxspltd 34, 34, 0268}269 270; Function Attrs: norecurse nounwind readonly271define <4 x float> @vecfsc(ptr nocapture readonly %ptr) {272entry:273 %0 = load i8, ptr %ptr, align 1274 %conv = sitofp i8 %0 to float275 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0276 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer277 ret <4 x float> %splat.splat278; CHECK-LABEL: vecfsc279; CHECK: lxsibzx280; CHECK-NEXT: vextsb2d281; CHECK-NEXT: xscvsxdsp [[CONVD:[0-9]+]],282; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]283; CHECK-NEXT: xxspltw 34, [[CONVS]], 0284; CHECK-BE-LABEL: vecfsc285; CHECK-BE: lxsibzx [[LD:[0-9]+]], 0, 3286; CHECK-BE-NEXT: vextsb2d287; CHECK-BE-NEXT: xscvsxdsp [[CONVD:[0-9]+]],288; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]289; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0290}291 292; Function Attrs: norecurse nounwind readonly293define <2 x double> @vecdsc(ptr nocapture readonly %ptr) {294entry:295 %0 = load i8, ptr %ptr, align 1296 %conv = sitofp i8 %0 to double297 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0298 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer299 ret <2 x double> %splat.splat300; CHECK-LABEL: vecdsc301; CHECK: lxsibzx302; CHECK-NEXT: vextsb2d303; CHECK-NEXT: xscvsxddp [[CONVD:[0-9]+]],304; CHECK-NEXT: xxspltd 34, [[CONVD]], 0305; CHECK-BE-LABEL: vecdsc306; CHECK-BE: lxsibzx307; CHECK-BE-NEXT: vextsb2d308; CHECK-BE-NEXT: xscvsxddp [[CONVD:[0-9]+]],309; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0310}311 312; Function Attrs: norecurse nounwind readonly313define <16 x i8> @vecucus(ptr nocapture readonly %ptr) {314entry:315 %0 = load i16, ptr %ptr, align 2316 %conv = trunc i16 %0 to i8317 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0318 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer319 ret <16 x i8> %splat.splat320; CHECK-LABEL: vecucus321; CHECK: lxsibzx 34, 0, 3322; CHECK-NEXT: vspltb 2, 2, 7323; CHECK-BE-LABEL: vecucus324; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1325; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]]326; CHECK-BE-NEXT: vspltb 2, 2, 7327}328 329; Function Attrs: norecurse nounwind readonly330define <8 x i16> @vecusus(ptr nocapture readonly %ptr) {331entry:332 %0 = load i16, ptr %ptr, align 2333 %splat.splatinsert = insertelement <8 x i16> undef, i16 %0, i32 0334 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer335 ret <8 x i16> %splat.splat336; CHECK-LABEL: vecusus337; CHECK: lxsihzx 34, 0, 3338; CHECK-NEXT: vsplth 2, 2, 3339; CHECK-BE-LABEL: vecusus340; CHECK-BE: lxsihzx 34, 0, 3341; CHECK-BE-NEXT: vsplth 2, 2, 3342}343 344; Function Attrs: norecurse nounwind readonly345define <4 x i32> @vecuius(ptr nocapture readonly %ptr) {346entry:347 %0 = load i16, ptr %ptr, align 2348 %conv = zext i16 %0 to i32349 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0350 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer351 ret <4 x i32> %splat.splat352; CHECK-LABEL: vecuius353; CHECK: lxsihzx 0, 0, 3354; CHECK-NEXT: xxspltw 34, 0, 1355; CHECK-BE-LABEL: vecuius356; CHECK-BE: lxsihzx 0, 0, 3357; CHECK-BE-NEXT: xxspltw 34, 0, 1358}359 360; Function Attrs: norecurse nounwind readonly361define <2 x i64> @veculus(ptr nocapture readonly %ptr) {362entry:363 %0 = load i16, ptr %ptr, align 2364 %conv = zext i16 %0 to i64365 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0366 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer367 ret <2 x i64> %splat.splat368; CHECK-LABEL: veculus369; CHECK: lxsihzx 0, 0, 3370; CHECK-NEXT: xxspltd 34, 0, 0371; CHECK-BE-LABEL: veculus372; CHECK-BE: lxsihzx 0, 0, 3373; CHECK-BE-NEXT: xxspltd 34, 0, 0374}375 376; Function Attrs: norecurse nounwind readonly377define <16 x i8> @vecscus(ptr nocapture readonly %ptr) {378entry:379 %0 = load i16, ptr %ptr, align 2380 %conv = trunc i16 %0 to i8381 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0382 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer383 ret <16 x i8> %splat.splat384; CHECK-LABEL: vecscus385; CHECK: lxsibzx 34, 0, 3386; CHECK-NEXT: vspltb 2, 2, 7387; CHECK-BE-LABEL: vecscus388; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1389; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]]390; CHECK-BE-NEXT: vspltb 2, 2, 7391}392 393; Function Attrs: norecurse nounwind readonly394define <8 x i16> @vecssus(ptr nocapture readonly %ptr) {395entry:396 %0 = load i16, ptr %ptr, align 2397 %splat.splatinsert = insertelement <8 x i16> undef, i16 %0, i32 0398 %splat.splat = shufflevector <8 x i16> %splat.splatinsert, <8 x i16> undef, <8 x i32> zeroinitializer399 ret <8 x i16> %splat.splat400; CHECK-LABEL: vecssus401; CHECK: lxsihzx 34, 0, 3402; CHECK-NEXT: vsplth 2, 2, 3403; CHECK-BE-LABEL: vecssus404; CHECK-BE: lxsihzx 34, 0, 3405; CHECK-BE-NEXT: vsplth 2, 2, 3406}407 408; Function Attrs: norecurse nounwind readonly409define <4 x i32> @vecsius(ptr nocapture readonly %ptr) {410entry:411 %0 = load i16, ptr %ptr, align 2412 %conv = zext i16 %0 to i32413 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0414 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer415 ret <4 x i32> %splat.splat416; CHECK-LABEL: vecsius417; CHECK: lxsihzx 0, 0, 3418; CHECK-NEXT: xxspltw 34, 0, 1419; CHECK-BE-LABEL: vecsius420; CHECK-BE: lxsihzx 0, 0, 3421; CHECK-BE-NEXT: xxspltw 34, 0, 1422}423 424; Function Attrs: norecurse nounwind readonly425define <2 x i64> @vecslus(ptr nocapture readonly %ptr) {426entry:427 %0 = load i16, ptr %ptr, align 2428 %conv = zext i16 %0 to i64429 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0430 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer431 ret <2 x i64> %splat.splat432; CHECK-LABEL: vecslus433; CHECK: lxsihzx 0, 0, 3434; CHECK-NEXT: xxspltd 34, 0, 0435; CHECK-BE-LABEL: vecslus436; CHECK-BE: lxsihzx 0, 0, 3437; CHECK-BE-NEXT: xxspltd 34, 0, 0438}439 440; Function Attrs: norecurse nounwind readonly441define <4 x float> @vecfus(ptr nocapture readonly %ptr) {442entry:443 %0 = load i16, ptr %ptr, align 2444 %conv = uitofp i16 %0 to float445 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0446 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer447 ret <4 x float> %splat.splat448; CHECK-LABEL: vecfus449; CHECK: lxsihzx [[LD:[0-9]+]], 0, 3450; CHECK-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]]451; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]452; CHECK-NEXT: xxspltw 34, [[CONVS]], 0453; CHECK-BE-LABEL: vecfus454; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3455; CHECK-BE-NEXT: xscvuxdsp [[CONVD:[0-9]+]], [[LD]]456; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]457; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0458}459 460; Function Attrs: norecurse nounwind readonly461define <2 x double> @vecdus(ptr nocapture readonly %ptr) {462entry:463 %0 = load i16, ptr %ptr, align 2464 %conv = uitofp i16 %0 to double465 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0466 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer467 ret <2 x double> %splat.splat468; CHECK-LABEL: vecdus469; CHECK: lxsihzx [[LD:[0-9]+]], 0, 3470; CHECK-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]]471; CHECK-NEXT: xxspltd 34, [[CONVD]], 0472; CHECK-BE-LABEL: vecdus473; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3474; CHECK-BE-NEXT: xscvuxddp [[CONVD:[0-9]+]], [[LD]]475; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0476}477 478; Function Attrs: norecurse nounwind readonly479define <16 x i8> @vecucss(ptr nocapture readonly %ptr) {480entry:481 %0 = load i16, ptr %ptr, align 2482 %conv = trunc i16 %0 to i8483 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0484 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer485 ret <16 x i8> %splat.splat486; CHECK-LABEL: vecucss487; CHECK: lxsibzx 34, 0, 3488; CHECK-NEXT: vspltb 2, 2, 7489; CHECK-BE-LABEL: vecucss490; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1491; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]]492; CHECK-BE-NEXT: vspltb 2, 2, 7493}494 495; Function Attrs: norecurse nounwind readonly496define <4 x i32> @vecuiss(ptr nocapture readonly %ptr) {497entry:498 %0 = load i16, ptr %ptr, align 2499 %conv = sext i16 %0 to i32500 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0501 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer502 ret <4 x i32> %splat.splat503; CHECK-LABEL: vecuiss504; CHECK: lxsihzx 34, 0, 3505; CHECK-NEXT: vextsh2w 2, 2506; CHECK-NEXT: xxspltw 34, 34, 1507; CHECK-BE-LABEL: vecuiss508; CHECK-BE: lxsihzx 34, 0, 3509; CHECK-BE-NEXT: vextsh2w 2, 2510; CHECK-BE-NEXT: xxspltw 34, 34, 1511}512 513; Function Attrs: norecurse nounwind readonly514define <2 x i64> @veculss(ptr nocapture readonly %ptr) {515entry:516 %0 = load i16, ptr %ptr, align 2517 %conv = sext i16 %0 to i64518 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0519 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer520 ret <2 x i64> %splat.splat521; CHECK-LABEL: veculss522; CHECK: lxsihzx 34, 0, 3523; CHECK-NEXT: vextsh2d 2, 2524; CHECK-NEXT: xxspltd 34, 34, 0525; CHECK-BE-LABEL: veculss526; CHECK-BE: lxsihzx 34, 0, 3527; CHECK-BE-NEXT: vextsh2d 2, 2528; CHECK-BE-NEXT: xxspltd 34, 34, 0529}530 531; Function Attrs: norecurse nounwind readonly532define <16 x i8> @vecscss(ptr nocapture readonly %ptr) {533entry:534 %0 = load i16, ptr %ptr, align 2535 %conv = trunc i16 %0 to i8536 %splat.splatinsert = insertelement <16 x i8> undef, i8 %conv, i32 0537 %splat.splat = shufflevector <16 x i8> %splat.splatinsert, <16 x i8> undef, <16 x i32> zeroinitializer538 ret <16 x i8> %splat.splat539; CHECK-LABEL: vecscss540; CHECK: lxsibzx 34, 0, 3541; CHECK-NEXT: vspltb 2, 2, 7542; CHECK-BE-LABEL: vecscss543; CHECK-BE: addi [[OFFSET:[0-9]+]], [[OFFSET]], 1544; CHECK-BE-NEXT: lxsibzx 34, 0, [[OFFSET]]545; CHECK-BE-NEXT: vspltb 2, 2, 7546}547 548; Function Attrs: norecurse nounwind readonly549define <4 x i32> @vecsiss(ptr nocapture readonly %ptr) {550entry:551 %0 = load i16, ptr %ptr, align 2552 %conv = sext i16 %0 to i32553 %splat.splatinsert = insertelement <4 x i32> undef, i32 %conv, i32 0554 %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer555 ret <4 x i32> %splat.splat556; CHECK-LABEL: vecsiss557; CHECK: lxsihzx 34, 0, 3558; CHECK-NEXT: vextsh2w 2, 2559; CHECK-NEXT: xxspltw 34, 34, 1560; CHECK-BE-LABEL: vecsiss561; CHECK-BE: lxsihzx 34, 0, 3562; CHECK-BE-NEXT: vextsh2w 2, 2563; CHECK-BE-NEXT: xxspltw 34, 34, 1564}565 566; Function Attrs: norecurse nounwind readonly567define <2 x i64> @vecslss(ptr nocapture readonly %ptr) {568entry:569 %0 = load i16, ptr %ptr, align 2570 %conv = sext i16 %0 to i64571 %splat.splatinsert = insertelement <2 x i64> undef, i64 %conv, i32 0572 %splat.splat = shufflevector <2 x i64> %splat.splatinsert, <2 x i64> undef, <2 x i32> zeroinitializer573 ret <2 x i64> %splat.splat574; CHECK-LABEL: vecslss575; CHECK: lxsihzx 34, 0, 3576; CHECK-NEXT: vextsh2d 2, 2577; CHECK-NEXT: xxspltd 34, 34, 0578; CHECK-BE-LABEL: vecslss579; CHECK-BE: lxsihzx 34, 0, 3580; CHECK-BE-NEXT: vextsh2d 2, 2581; CHECK-BE-NEXT: xxspltd 34, 34, 0582}583 584; Function Attrs: norecurse nounwind readonly585define <4 x float> @vecfss(ptr nocapture readonly %ptr) {586entry:587 %0 = load i16, ptr %ptr, align 2588 %conv = sitofp i16 %0 to float589 %splat.splatinsert = insertelement <4 x float> undef, float %conv, i32 0590 %splat.splat = shufflevector <4 x float> %splat.splatinsert, <4 x float> undef, <4 x i32> zeroinitializer591 ret <4 x float> %splat.splat592; CHECK-LABEL: vecfss593; CHECK: lxsihzx594; CHECK-NEXT: vextsh2d595; CHECK-NEXT: xscvsxdsp [[CONVD:[0-9]+]],596; CHECK-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]597; CHECK-NEXT: xxspltw 34, [[CONVS]], 0598; CHECK-BE-LABEL: vecfss599; CHECK-BE: lxsihzx [[LD:[0-9]+]], 0, 3600; CHECK-BE-NEXT: vextsh2d601; CHECK-BE-NEXT: xscvsxdsp [[CONVD:[0-9]+]],602; CHECK-BE-NEXT: xscvdpspn [[CONVS:[0-9]+]], [[CONVD]]603; CHECK-BE-NEXT: xxspltw 34, [[CONVS]], 0604}605 606; Function Attrs: norecurse nounwind readonly607define <2 x double> @vecdss(ptr nocapture readonly %ptr) {608entry:609 %0 = load i16, ptr %ptr, align 2610 %conv = sitofp i16 %0 to double611 %splat.splatinsert = insertelement <2 x double> undef, double %conv, i32 0612 %splat.splat = shufflevector <2 x double> %splat.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer613 ret <2 x double> %splat.splat614; CHECK-LABEL: vecdss615; CHECK: lxsihzx616; CHECK-NEXT: vextsh2d617; CHECK-NEXT: xscvsxddp [[CONVD:[0-9]+]],618; CHECK-NEXT: xxspltd 34, [[CONVD]], 0619; CHECK-BE-LABEL: vecdss620; CHECK-BE: lxsihzx621; CHECK-BE-NEXT: vextsh2d622; CHECK-BE-NEXT: xscvsxddp [[CONVD:[0-9]+]],623; CHECK-BE-NEXT: xxspltd 34, [[CONVD]], 0624}625 626; Function Attrs: norecurse nounwind627define void @storefsc(float %f, ptr nocapture %ptr) {628entry:629 %conv = fptosi float %f to i8630 store i8 %conv, ptr %ptr, align 1631 ret void632; CHECK-LABEL: storefsc633; CHECK: xscvdpsxds 0, 1634; CHECK: stxsibx 0, 0, 4635; CHECK-BE-LABEL: storefsc636; CHECK-BE: xscvdpsxds 0, 1637; CHECK-BE: stxsibx 0, 0, 4638}639 640; Function Attrs: norecurse nounwind641define void @storedsc(double %d, ptr nocapture %ptr) {642entry:643 %conv = fptosi double %d to i8644 store i8 %conv, ptr %ptr, align 1645 ret void646; CHECK-LABEL: storedsc647; CHECK: xscvdpsxds 0, 1648; CHECK: stxsibx 0, 0, 4649; CHECK-BE-LABEL: storedsc650; CHECK-BE: xscvdpsxds 0, 1651; CHECK-BE: stxsibx 0, 0, 4652}653 654; Function Attrs: norecurse nounwind655define void @storevcsc0(<16 x i8> %v, ptr nocapture %ptr) {656entry:657 %vecext = extractelement <16 x i8> %v, i32 0658 store i8 %vecext, ptr %ptr, align 1659 ret void660; CHECK-LABEL: storevcsc0661; CHECK: vsldoi 2, 2, 2, 8662; CHECK-NEXT: stxsibx 34, 0, 5663; CHECK-BE-LABEL: storevcsc0664; CHECK-BE: vsldoi 2, 2, 2, 9665; CHECK-BE-NEXT: stxsibx 34, 0, 5666}667 668; Function Attrs: norecurse nounwind669define void @storevcsc1(<16 x i8> %v, ptr nocapture %ptr) {670entry:671 %vecext = extractelement <16 x i8> %v, i32 1672 store i8 %vecext, ptr %ptr, align 1673 ret void674; CHECK-LABEL: storevcsc1675; CHECK: vsldoi 2, 2, 2, 7676; CHECK-NEXT: stxsibx 34, 0, 5677; CHECK-BE-LABEL: storevcsc1678; CHECK-BE: vsldoi 2, 2, 2, 10679; CHECK-BE-NEXT: stxsibx 34, 0, 5680}681 682; Function Attrs: norecurse nounwind683define void @storevcsc2(<16 x i8> %v, ptr nocapture %ptr) {684entry:685 %vecext = extractelement <16 x i8> %v, i32 2686 store i8 %vecext, ptr %ptr, align 1687 ret void688; CHECK-LABEL: storevcsc2689; CHECK: vsldoi 2, 2, 2, 6690; CHECK-NEXT: stxsibx 34, 0, 5691; CHECK-BE-LABEL: storevcsc2692; CHECK-BE: vsldoi 2, 2, 2, 11693; CHECK-BE-NEXT: stxsibx 34, 0, 5694}695 696; Function Attrs: norecurse nounwind697define void @storevcsc3(<16 x i8> %v, ptr nocapture %ptr) {698entry:699 %vecext = extractelement <16 x i8> %v, i32 3700 store i8 %vecext, ptr %ptr, align 1701 ret void702; CHECK-LABEL: storevcsc3703; CHECK: vsldoi 2, 2, 2, 5704; CHECK-NEXT: stxsibx 34, 0, 5705; CHECK-BE-LABEL: storevcsc3706; CHECK-BE: vsldoi 2, 2, 2, 12707; CHECK-BE-NEXT: stxsibx 34, 0, 5708}709 710; Function Attrs: norecurse nounwind711define void @storevcsc4(<16 x i8> %v, ptr nocapture %ptr) {712entry:713 %vecext = extractelement <16 x i8> %v, i32 4714 store i8 %vecext, ptr %ptr, align 1715 ret void716; CHECK-LABEL: storevcsc4717; CHECK: vsldoi 2, 2, 2, 4718; CHECK-NEXT: stxsibx 34, 0, 5719; CHECK-BE-LABEL: storevcsc4720; CHECK-BE: vsldoi 2, 2, 2, 13721; CHECK-BE-NEXT: stxsibx 34, 0, 5722}723 724; Function Attrs: norecurse nounwind725define void @storevcsc5(<16 x i8> %v, ptr nocapture %ptr) {726entry:727 %vecext = extractelement <16 x i8> %v, i32 5728 store i8 %vecext, ptr %ptr, align 1729 ret void730; CHECK-LABEL: storevcsc5731; CHECK: vsldoi 2, 2, 2, 3732; CHECK-NEXT: stxsibx 34, 0, 5733; CHECK-BE-LABEL: storevcsc5734; CHECK-BE: vsldoi 2, 2, 2, 14735; CHECK-BE-NEXT: stxsibx 34, 0, 5736}737 738; Function Attrs: norecurse nounwind739define void @storevcsc6(<16 x i8> %v, ptr nocapture %ptr) {740entry:741 %vecext = extractelement <16 x i8> %v, i32 6742 store i8 %vecext, ptr %ptr, align 1743 ret void744; CHECK-LABEL: storevcsc6745; CHECK: vsldoi 2, 2, 2, 2746; CHECK-NEXT: stxsibx 34, 0, 5747; CHECK-BE-LABEL: storevcsc6748; CHECK-BE: vsldoi 2, 2, 2, 15749; CHECK-BE-NEXT: stxsibx 34, 0, 5750}751 752; Function Attrs: norecurse nounwind753define void @storevcsc7(<16 x i8> %v, ptr nocapture %ptr) {754entry:755 %vecext = extractelement <16 x i8> %v, i32 7756 store i8 %vecext, ptr %ptr, align 1757 ret void758; CHECK-LABEL: storevcsc7759; CHECK: vsldoi 2, 2, 2, 1760; CHECK-NEXT: stxsibx 34, 0, 5761; CHECK-BE-LABEL: storevcsc7762; CHECK-BE: stxsibx 34, 0, 5763}764 765; Function Attrs: norecurse nounwind766define void @storevcsc8(<16 x i8> %v, ptr nocapture %ptr) {767entry:768 %vecext = extractelement <16 x i8> %v, i32 8769 store i8 %vecext, ptr %ptr, align 1770 ret void771; CHECK-LABEL: storevcsc8772; CHECK: stxsibx 34, 0, 5773; CHECK-BE-LABEL: storevcsc8774; CHECK-BE: vsldoi 2, 2, 2, 1775; CHECK-BE-NEXT: stxsibx 34, 0, 5776}777 778; Function Attrs: norecurse nounwind779define void @storevcsc9(<16 x i8> %v, ptr nocapture %ptr) {780entry:781 %vecext = extractelement <16 x i8> %v, i32 9782 store i8 %vecext, ptr %ptr, align 1783 ret void784; CHECK-LABEL: storevcsc9785; CHECK: vsldoi 2, 2, 2, 15786; CHECK-NEXT: stxsibx 34, 0, 5787; CHECK-BE-LABEL: storevcsc9788; CHECK-BE: vsldoi 2, 2, 2, 2789; CHECK-BE-NEXT: stxsibx 34, 0, 5790}791 792; Function Attrs: norecurse nounwind793define void @storevcsc10(<16 x i8> %v, ptr nocapture %ptr) {794entry:795 %vecext = extractelement <16 x i8> %v, i32 10796 store i8 %vecext, ptr %ptr, align 1797 ret void798; CHECK-LABEL: storevcsc10799; CHECK: vsldoi 2, 2, 2, 14800; CHECK-NEXT: stxsibx 34, 0, 5801; CHECK-BE-LABEL: storevcsc10802; CHECK-BE: vsldoi 2, 2, 2, 3803; CHECK-BE-NEXT: stxsibx 34, 0, 5804}805 806; Function Attrs: norecurse nounwind807define void @storevcsc11(<16 x i8> %v, ptr nocapture %ptr) {808entry:809 %vecext = extractelement <16 x i8> %v, i32 11810 store i8 %vecext, ptr %ptr, align 1811 ret void812; CHECK-LABEL: storevcsc11813; CHECK: vsldoi 2, 2, 2, 13814; CHECK-NEXT: stxsibx 34, 0, 5815; CHECK-BE-LABEL: storevcsc11816; CHECK-BE: vsldoi 2, 2, 2, 4817; CHECK-BE-NEXT: stxsibx 34, 0, 5818}819 820; Function Attrs: norecurse nounwind821define void @storevcsc12(<16 x i8> %v, ptr nocapture %ptr) {822entry:823 %vecext = extractelement <16 x i8> %v, i32 12824 store i8 %vecext, ptr %ptr, align 1825 ret void826; CHECK-LABEL: storevcsc12827; CHECK: vsldoi 2, 2, 2, 12828; CHECK-NEXT: stxsibx 34, 0, 5829; CHECK-BE-LABEL: storevcsc12830; CHECK-BE: vsldoi 2, 2, 2, 5831; CHECK-BE-NEXT: stxsibx 34, 0, 5832}833 834; Function Attrs: norecurse nounwind835define void @storevcsc13(<16 x i8> %v, ptr nocapture %ptr) {836entry:837 %vecext = extractelement <16 x i8> %v, i32 13838 store i8 %vecext, ptr %ptr, align 1839 ret void840; CHECK-LABEL: storevcsc13841; CHECK: vsldoi 2, 2, 2, 11842; CHECK-NEXT: stxsibx 34, 0, 5843; CHECK-BE-LABEL: storevcsc13844; CHECK-BE: vsldoi 2, 2, 2, 6845; CHECK-BE-NEXT: stxsibx 34, 0, 5846}847 848; Function Attrs: norecurse nounwind849define void @storevcsc14(<16 x i8> %v, ptr nocapture %ptr) {850entry:851 %vecext = extractelement <16 x i8> %v, i32 14852 store i8 %vecext, ptr %ptr, align 1853 ret void854; CHECK-LABEL: storevcsc14855; CHECK: vsldoi 2, 2, 2, 10856; CHECK-NEXT: stxsibx 34, 0, 5857; CHECK-BE-LABEL: storevcsc14858; CHECK-BE: vsldoi 2, 2, 2, 7859; CHECK-BE-NEXT: stxsibx 34, 0, 5860}861 862; Function Attrs: norecurse nounwind863define void @storevcsc15(<16 x i8> %v, ptr nocapture %ptr) {864entry:865 %vecext = extractelement <16 x i8> %v, i32 15866 store i8 %vecext, ptr %ptr, align 1867 ret void868; CHECK-LABEL: storevcsc15869; CHECK: vsldoi 2, 2, 2, 9870; CHECK-NEXT: stxsibx 34, 0, 5871; CHECK-BE-LABEL: storevcsc15872; CHECK-BE: vsldoi 2, 2, 2, 8873; CHECK-BE-NEXT: stxsibx 34, 0, 5874}875 876; Function Attrs: norecurse nounwind877define void @storefss(float %f, ptr nocapture %ptr) {878entry:879 %conv = fptosi float %f to i16880 store i16 %conv, ptr %ptr, align 2881 ret void882; CHECK-LABEL: storefss883; CHECK: xscvdpsxds 0, 1884; CHECK: stxsihx 0, 0, 4885; CHECK-BE-LABEL: storefss886; CHECK-BE: xscvdpsxds 0, 1887; CHECK-BE: stxsihx 0, 0, 4888}889 890; Function Attrs: norecurse nounwind891define void @storedss(double %d, ptr nocapture %ptr) {892entry:893 %conv = fptosi double %d to i16894 store i16 %conv, ptr %ptr, align 2895 ret void896; CHECK-LABEL: storedss897; CHECK: xscvdpsxds 0, 1898; CHECK: stxsihx 0, 0, 4899; CHECK-BE-LABEL: storedss900; CHECK-BE: xscvdpsxds 0, 1901; CHECK-BE: stxsihx 0, 0, 4902}903 904; Function Attrs: norecurse nounwind905define void @storevsss0(<8 x i16> %v, ptr nocapture %ptr) {906entry:907 %vecext = extractelement <8 x i16> %v, i32 0908 store i16 %vecext, ptr %ptr, align 2909 ret void910; CHECK-LABEL: storevsss0911; CHECK: vsldoi 2, 2, 2, 8912; CHECK-NEXT: stxsihx 34, 0, 5913; CHECK-BE-LABEL: storevsss0914; CHECK-BE: vsldoi 2, 2, 2, 10915; CHECK-BE-NEXT: stxsihx 34, 0, 5916}917 918; Function Attrs: norecurse nounwind919define void @storevsss1(<8 x i16> %v, ptr nocapture %ptr) {920entry:921 %vecext = extractelement <8 x i16> %v, i32 1922 store i16 %vecext, ptr %ptr, align 2923 ret void924; CHECK-LABEL: storevsss1925; CHECK: vsldoi 2, 2, 2, 6926; CHECK-NEXT: stxsihx 34, 0, 5927; CHECK-BE-LABEL: storevsss1928; CHECK-BE: vsldoi 2, 2, 2, 12929; CHECK-BE-NEXT: stxsihx 34, 0, 5930}931 932; Function Attrs: norecurse nounwind933define void @storevsss2(<8 x i16> %v, ptr nocapture %ptr) {934entry:935 %vecext = extractelement <8 x i16> %v, i32 2936 store i16 %vecext, ptr %ptr, align 2937 ret void938; CHECK-LABEL: storevsss2939; CHECK: vsldoi 2, 2, 2, 4940; CHECK-NEXT: stxsihx 34, 0, 5941; CHECK-BE-LABEL: storevsss2942; CHECK-BE: vsldoi 2, 2, 2, 14943; CHECK-BE-NEXT: stxsihx 34, 0, 5944}945 946; Function Attrs: norecurse nounwind947define void @storevsss3(<8 x i16> %v, ptr nocapture %ptr) {948entry:949 %vecext = extractelement <8 x i16> %v, i32 3950 store i16 %vecext, ptr %ptr, align 2951 ret void952; CHECK-LABEL: storevsss3953; CHECK: vsldoi 2, 2, 2, 2954; CHECK-NEXT: stxsihx 34, 0, 5955; CHECK-BE-LABEL: storevsss3956; CHECK-BE: stxsihx 34, 0, 5957}958 959; Function Attrs: norecurse nounwind960define void @storevsss4(<8 x i16> %v, ptr nocapture %ptr) {961entry:962 %vecext = extractelement <8 x i16> %v, i32 4963 store i16 %vecext, ptr %ptr, align 2964 ret void965; CHECK-LABEL: storevsss4966; CHECK: stxsihx 34, 0, 5967; CHECK-BE-LABEL: storevsss4968; CHECK-BE: vsldoi 2, 2, 2, 2969; CHECK-BE-NEXT: stxsihx 34, 0, 5970}971 972; Function Attrs: norecurse nounwind973define void @storevsss5(<8 x i16> %v, ptr nocapture %ptr) {974entry:975 %vecext = extractelement <8 x i16> %v, i32 5976 store i16 %vecext, ptr %ptr, align 2977 ret void978; CHECK-LABEL: storevsss5979; CHECK: vsldoi 2, 2, 2, 14980; CHECK-NEXT: stxsihx 34, 0, 5981; CHECK-BE-LABEL: storevsss5982; CHECK-BE: vsldoi 2, 2, 2, 4983; CHECK-BE-NEXT: stxsihx 34, 0, 5984}985 986; Function Attrs: norecurse nounwind987define void @storevsss6(<8 x i16> %v, ptr nocapture %ptr) {988entry:989 %vecext = extractelement <8 x i16> %v, i32 6990 store i16 %vecext, ptr %ptr, align 2991 ret void992; CHECK-LABEL: storevsss6993; CHECK: vsldoi 2, 2, 2, 12994; CHECK-NEXT: stxsihx 34, 0, 5995; CHECK-BE-LABEL: storevsss6996; CHECK-BE: vsldoi 2, 2, 2, 6997; CHECK-BE-NEXT: stxsihx 34, 0, 5998}999 1000; Function Attrs: norecurse nounwind1001define void @storevsss7(<8 x i16> %v, ptr nocapture %ptr) {1002entry:1003 %vecext = extractelement <8 x i16> %v, i32 71004 store i16 %vecext, ptr %ptr, align 21005 ret void1006; CHECK-LABEL: storevsss71007; CHECK: vsldoi 2, 2, 2, 101008; CHECK-NEXT: stxsihx 34, 0, 51009; CHECK-BE-LABEL: storevsss71010; CHECK-BE: vsldoi 2, 2, 2, 81011; CHECK-BE-NEXT: stxsihx 34, 0, 51012}1013 1014; Function Attrs: norecurse nounwind readonly1015define float @convscf(ptr nocapture readonly %ptr) {1016entry:1017 %0 = load i8, ptr %ptr, align 11018 %conv = sitofp i8 %0 to float1019 ret float %conv1020; CHECK-LABEL: convscf1021; CHECK: lxsibzx 34, 0, 31022; CHECK-NEXT: vextsb2d 2, 21023; CHECK-NEXT: xscvsxdsp 1, 341024; CHECK-BE-LABEL: convscf1025; CHECK-BE: lxsibzx 34, 0, 31026; CHECK-BE-NEXT: vextsb2d 2, 21027; CHECK-BE-NEXT: xscvsxdsp 1, 341028}1029 1030; Function Attrs: norecurse nounwind readonly1031define float @convucf(ptr nocapture readonly %ptr) {1032entry:1033 %0 = load i8, ptr %ptr, align 11034 %conv = uitofp i8 %0 to float1035 ret float %conv1036; CHECK-LABEL: convucf1037; CHECK: lxsibzx 0, 0, 31038; CHECK-NEXT: xscvuxdsp 1, 01039; CHECK-BE-LABEL: convucf1040; CHECK-BE: lxsibzx 0, 0, 31041; CHECK-BE-NEXT: xscvuxdsp 1, 01042}1043 1044; Function Attrs: norecurse nounwind readonly1045define double @convscd(ptr nocapture readonly %ptr) {1046entry:1047 %0 = load i8, ptr %ptr, align 11048 %conv = sitofp i8 %0 to double1049; CHECK-LABEL: convscd1050; CHECK: lxsibzx 34, 0, 31051; CHECK-NEXT: vextsb2d 2, 21052; CHECK-NEXT: xscvsxddp 1, 341053; CHECK-BE-LABEL: convscd1054; CHECK-BE: lxsibzx 34, 0, 31055; CHECK-BE-NEXT: vextsb2d 2, 21056; CHECK-BE-NEXT: xscvsxddp 1, 341057 ret double %conv1058}1059 1060; Function Attrs: norecurse nounwind readonly1061define double @convucd(ptr nocapture readonly %ptr) {1062entry:1063 %0 = load i8, ptr %ptr, align 11064 %conv = uitofp i8 %0 to double1065 ret double %conv1066; CHECK-LABEL: convucd1067; CHECK: lxsibzx 0, 0, 31068; CHECK-NEXT: xscvuxddp 1, 01069; CHECK-BE-LABEL: convucd1070; CHECK-BE: lxsibzx 0, 0, 31071; CHECK-BE-NEXT: xscvuxddp 1, 01072}1073 1074; Function Attrs: norecurse nounwind readonly1075define float @convssf(ptr nocapture readonly %ptr) {1076entry:1077 %0 = load i16, ptr %ptr, align 21078 %conv = sitofp i16 %0 to float1079 ret float %conv1080; CHECK-LABEL: convssf1081; CHECK: lxsihzx 34, 0, 31082; CHECK-NEXT: vextsh2d 2, 21083; CHECK-NEXT: xscvsxdsp 1, 341084; CHECK-BE-LABEL: convssf1085; CHECK-BE: lxsihzx 34, 0, 31086; CHECK-BE-NEXT: vextsh2d 2, 21087; CHECK-BE-NEXT: xscvsxdsp 1, 341088}1089 1090; Function Attrs: norecurse nounwind readonly1091define float @convusf(ptr nocapture readonly %ptr) {1092entry:1093 %0 = load i16, ptr %ptr, align 21094 %conv = uitofp i16 %0 to float1095 ret float %conv1096; CHECK-LABEL: convusf1097; CHECK: lxsihzx 0, 0, 31098; CHECK-NEXT: xscvuxdsp 1, 01099; CHECK-BE-LABEL: convusf1100; CHECK-BE: lxsihzx 0, 0, 31101; CHECK-BE-NEXT: xscvuxdsp 1, 01102}1103 1104; Function Attrs: norecurse nounwind readonly1105define double @convssd(ptr nocapture readonly %ptr) {1106entry:1107 %0 = load i16, ptr %ptr, align 21108 %conv = sitofp i16 %0 to double1109 ret double %conv1110; CHECK-LABEL: convssd1111; CHECK: lxsihzx 34, 0, 31112; CHECK-NEXT: vextsh2d 2, 21113; CHECK-NEXT: xscvsxddp 1, 341114; CHECK-BE-LABEL: convssd1115; CHECK-BE: lxsihzx 34, 0, 31116; CHECK-BE-NEXT: vextsh2d 2, 21117; CHECK-BE-NEXT: xscvsxddp 1, 341118}1119 1120; Function Attrs: norecurse nounwind readonly1121define double @convusd(ptr nocapture readonly %ptr) {1122entry:1123 %0 = load i16, ptr %ptr, align 21124 %conv = uitofp i16 %0 to double1125 ret double %conv1126; CHECK-LABEL: convusd1127; CHECK: lxsihzx 0, 0, 31128; CHECK-NEXT: xscvuxddp 1, 01129; CHECK-BE-LABEL: convusd1130; CHECK-BE: lxsihzx 0, 0, 31131; CHECK-BE-NEXT: xscvuxddp 1, 01132}1133