brintos

brintos / llvm-project-archived public Read only

0
0
Text · 3.9 KiB · 056e903 Raw
148 lines · plain
1; RUN: llc -relocation-model=pic -verify-machineinstrs < %s -mtriple=powerpc64-unknown-linux-gnu \2; RUN:   -mcpu=pwr8 -mattr=-direct-move | FileCheck %s3; RUN: llc -relocation-model=pic -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu \4; RUN:   -mcpu=pwr8 -mattr=-direct-move | FileCheck %s5; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-unknown-linux-gnu \6; RUN:   -mcpu=pwr9 -mattr=-direct-move | FileCheck %s -check-prefix=CHECK-P97 8@d = common global double 0.000000e+00, align 89@f = common global float 0.000000e+00, align 410@i = common global i32 0, align 411@ui = common global i32 0, align 412 13; Function Attrs: nounwind14define void @dblToInt() #0 {15entry:16  %ii = alloca i32, align 417  %0 = load double, ptr @d, align 818  %conv = fptosi double %0 to i3219  store volatile i32 %conv, ptr %ii, align 420  ret void21; CHECK-LABEL: @dblToInt22; CHECK: xscvdpsxws [[REGCONV1:[0-9]+]],23; CHECK: stfiwx [[REGCONV1]],24}25 26; Function Attrs: nounwind27define void @fltToInt() #0 {28entry:29  %ii = alloca i32, align 430  %0 = load float, ptr @f, align 431  %conv = fptosi float %0 to i3232  store volatile i32 %conv, ptr %ii, align 433  ret void34; CHECK-LABEL: @fltToInt35; CHECK: xscvdpsxws [[REGCONV2:[0-9]+]],36; CHECK: stfiwx [[REGCONV2]],37}38 39; Function Attrs: nounwind40define void @intToDbl() #0 {41entry:42  %dd = alloca double, align 843  %0 = load i32, ptr @i, align 444  %conv = sitofp i32 %0 to double45  store volatile double %conv, ptr %dd, align 846  ret void47; CHECK-LABEL: @intToDbl48; CHECK: lfiwax [[REGLD1:[0-9]+]],49; CHECK: xscvsxddp {{[0-9]+}}, [[REGLD1]]50}51 52; Function Attrs: nounwind53define void @intToFlt() #0 {54entry:55  %ff = alloca float, align 456  %0 = load i32, ptr @i, align 457  %conv = sitofp i32 %0 to float58  store volatile float %conv, ptr %ff, align 459  ret void60; CHECK-LABEL: @intToFlt61; CHECK: lfiwax [[REGLD2:[0-9]+]],62; CHECK: xscvsxdsp {{[0-9]}}, [[REGLD2]]63}64 65; Function Attrs: nounwind66define void @dblToUInt() #0 {67entry:68  %uiui = alloca i32, align 469  %0 = load double, ptr @d, align 870  %conv = fptoui double %0 to i3271  store volatile i32 %conv, ptr %uiui, align 472  ret void73; CHECK-LABEL: @dblToUInt74; CHECK: xscvdpuxws [[REGCONV3:[0-9]+]],75; CHECK: stfiwx [[REGCONV3]],76}77 78; Function Attrs: nounwind79define void @fltToUInt() #0 {80entry:81  %uiui = alloca i32, align 482  %0 = load float, ptr @f, align 483  %conv = fptoui float %0 to i3284  store volatile i32 %conv, ptr %uiui, align 485  ret void86; CHECK-LABEL: @fltToUInt87; CHECK: xscvdpuxws [[REGCONV4:[0-9]+]],88; CHECK: stfiwx [[REGCONV4]],89}90 91; Function Attrs: nounwind92define void @uIntToDbl() #0 {93entry:94  %dd = alloca double, align 895  %0 = load i32, ptr @ui, align 496  %conv = uitofp i32 %0 to double97  store volatile double %conv, ptr %dd, align 898  ret void99; CHECK-LABEL: @uIntToDbl100; CHECK: lfiwzx [[REGLD3:[0-9]+]],101; CHECK: xscvuxddp {{[0-9]+}}, [[REGLD3]]102}103 104; Function Attrs: nounwind105define void @uIntToFlt() #0 {106entry:107  %ff = alloca float, align 4108  %0 = load i32, ptr @ui, align 4109  %conv = uitofp i32 %0 to float110  store volatile float %conv, ptr %ff, align 4111  ret void112; CHECK-LABEL: @uIntToFlt113; CHECK: lfiwzx [[REGLD4:[0-9]+]],114; CHECK: xscvuxdsp {{[0-9]+}}, [[REGLD4]]115}116 117; Function Attrs: nounwind118define void @dblToFloat() #0 {119entry:120  %ff = alloca float, align 4121  %0 = load double, ptr @d, align 8122  %conv = fptrunc double %0 to float123  store volatile float %conv, ptr %ff, align 4124  ret void125; CHECK-LABEL: @dblToFloat126; CHECK: lfd [[REGLD5:[0-9]+]],127; CHECK: stfs [[REGLD5]],128; CHECK-P9-LABEL: @dblToFloat129; CHECK-P9: lfd [[REGLD5:[0-9]+]],130; CHECK-P9: stfs [[REGLD5]],131}132 133; Function Attrs: nounwind134define void @floatToDbl() #0 {135entry:136  %dd = alloca double, align 8137  %0 = load float, ptr @f, align 4138  %conv = fpext float %0 to double139  store volatile double %conv, ptr %dd, align 8140  ret void141; CHECK-LABEL: @floatToDbl142; CHECK: lfs [[REGLD5:[0-9]+]],143; CHECK: stfd [[REGLD5]],144; CHECK-P9-LABEL: @floatToDbl145; CHECK-P9: lfs [[REGLD5:[0-9]+]],146; CHECK-P9: stfd [[REGLD5]],147}148