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1; Check the miscellaneous logical vector operations added in P82; 3; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s5; Test x eqv y6define <4 x i32> @test_xxleqv(<4 x i32> %x, <4 x i32> %y) nounwind {7 %tmp = xor <4 x i32> %x, %y8 %ret_val = xor <4 x i32> %tmp, < i32 -1, i32 -1, i32 -1, i32 -1>9 ret <4 x i32> %ret_val10; CHECK: xxleqv 34, 34, 3511}12 13; Test x xxlnand y14define <4 x i32> @test_xxlnand(<4 x i32> %x, <4 x i32> %y) nounwind {15 %tmp = and <4 x i32> %x, %y16 %ret_val = xor <4 x i32> %tmp, <i32 -1, i32 -1, i32 -1, i32 -1>17 ret <4 x i32> %ret_val18; CHECK: xxlnand 34, 34, 3519}20 21; Test x xxlorc y22define <4 x i32> @test_xxlorc(<4 x i32> %x, <4 x i32> %y) nounwind {23 %tmp = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>24 %ret_val = or <4 x i32> %x, %tmp25 ret <4 x i32> %ret_val26; CHECK: xxlorc 34, 34, 3527}28 29; Test x eqv y30define <8 x i16> @test_xxleqvv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {31 %tmp = xor <8 x i16> %x, %y32 %ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>33 ret <8 x i16> %ret_val34; CHECK: xxleqv 34, 34, 3535}36 37; Test x xxlnand y38define <8 x i16> @test_xxlnandv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {39 %tmp = and <8 x i16> %x, %y40 %ret_val = xor <8 x i16> %tmp, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>41 ret <8 x i16> %ret_val42; CHECK: xxlnand 34, 34, 3543}44 45; Test x xxlorc y46define <8 x i16> @test_xxlorcv8i16(<8 x i16> %x, <8 x i16> %y) nounwind {47 %tmp = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>48 %ret_val = or <8 x i16> %x, %tmp49 ret <8 x i16> %ret_val50; CHECK: xxlorc 34, 34, 3551}52 53