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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s --check-prefixes=RV323; RUN: llc -mtriple=riscv64 -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s --check-prefixes=RV644 5define i2 @bitreverse_i2(i2 %x) {6; RV32-LABEL: bitreverse_i2:7; RV32: # %bb.0:8; RV32-NEXT: slli a1, a0, 19; RV32-NEXT: andi a0, a0, 310; RV32-NEXT: andi a1, a1, 211; RV32-NEXT: srli a0, a0, 112; RV32-NEXT: or a0, a1, a013; RV32-NEXT: ret14;15; RV64-LABEL: bitreverse_i2:16; RV64: # %bb.0:17; RV64-NEXT: slli a1, a0, 118; RV64-NEXT: andi a0, a0, 319; RV64-NEXT: andi a1, a1, 220; RV64-NEXT: srli a0, a0, 121; RV64-NEXT: or a0, a1, a022; RV64-NEXT: ret23 %rev = call i2 @llvm.bitreverse.i2(i2 %x)24 ret i2 %rev25}26 27define i3 @bitreverse_i3(i3 %x) {28; RV32-LABEL: bitreverse_i3:29; RV32: # %bb.0:30; RV32-NEXT: slli a1, a0, 231; RV32-NEXT: andi a0, a0, 732; RV32-NEXT: andi a1, a1, 433; RV32-NEXT: andi a2, a0, 234; RV32-NEXT: or a1, a1, a235; RV32-NEXT: srli a0, a0, 236; RV32-NEXT: or a0, a1, a037; RV32-NEXT: ret38;39; RV64-LABEL: bitreverse_i3:40; RV64: # %bb.0:41; RV64-NEXT: slli a1, a0, 242; RV64-NEXT: andi a0, a0, 743; RV64-NEXT: andi a1, a1, 444; RV64-NEXT: andi a2, a0, 245; RV64-NEXT: or a1, a1, a246; RV64-NEXT: srli a0, a0, 247; RV64-NEXT: or a0, a1, a048; RV64-NEXT: ret49 %rev = call i3 @llvm.bitreverse.i3(i3 %x)50 ret i3 %rev51}52 53define i4 @bitreverse_i4(i4 %x) {54; RV32-LABEL: bitreverse_i4:55; RV32: # %bb.0:56; RV32-NEXT: slli a1, a0, 357; RV32-NEXT: slli a2, a0, 158; RV32-NEXT: andi a0, a0, 1559; RV32-NEXT: andi a1, a1, 860; RV32-NEXT: andi a2, a2, 461; RV32-NEXT: or a1, a1, a262; RV32-NEXT: srli a2, a0, 163; RV32-NEXT: andi a2, a2, 264; RV32-NEXT: or a1, a1, a265; RV32-NEXT: srli a0, a0, 366; RV32-NEXT: or a0, a1, a067; RV32-NEXT: ret68;69; RV64-LABEL: bitreverse_i4:70; RV64: # %bb.0:71; RV64-NEXT: slli a1, a0, 372; RV64-NEXT: slli a2, a0, 173; RV64-NEXT: andi a0, a0, 1574; RV64-NEXT: andi a1, a1, 875; RV64-NEXT: andi a2, a2, 476; RV64-NEXT: or a1, a1, a277; RV64-NEXT: srli a2, a0, 178; RV64-NEXT: andi a2, a2, 279; RV64-NEXT: or a1, a1, a280; RV64-NEXT: srli a0, a0, 381; RV64-NEXT: or a0, a1, a082; RV64-NEXT: ret83 %rev = call i4 @llvm.bitreverse.i4(i4 %x)84 ret i4 %rev85}86 87define i7 @bitreverse_i7(i7 %x) {88; RV32-LABEL: bitreverse_i7:89; RV32: # %bb.0:90; RV32-NEXT: slli a1, a0, 691; RV32-NEXT: slli a2, a0, 492; RV32-NEXT: slli a3, a0, 293; RV32-NEXT: andi a0, a0, 12794; RV32-NEXT: andi a1, a1, 6495; RV32-NEXT: andi a2, a2, 3296; RV32-NEXT: andi a3, a3, 1697; RV32-NEXT: or a1, a1, a298; RV32-NEXT: andi a2, a0, 899; RV32-NEXT: or a2, a3, a2100; RV32-NEXT: srli a3, a0, 2101; RV32-NEXT: or a1, a1, a2102; RV32-NEXT: srli a2, a0, 4103; RV32-NEXT: andi a3, a3, 4104; RV32-NEXT: andi a2, a2, 2105; RV32-NEXT: or a2, a3, a2106; RV32-NEXT: or a1, a1, a2107; RV32-NEXT: srli a0, a0, 6108; RV32-NEXT: or a0, a1, a0109; RV32-NEXT: ret110;111; RV64-LABEL: bitreverse_i7:112; RV64: # %bb.0:113; RV64-NEXT: slli a1, a0, 6114; RV64-NEXT: slli a2, a0, 4115; RV64-NEXT: slli a3, a0, 2116; RV64-NEXT: andi a0, a0, 127117; RV64-NEXT: andi a1, a1, 64118; RV64-NEXT: andi a2, a2, 32119; RV64-NEXT: andi a3, a3, 16120; RV64-NEXT: or a1, a1, a2121; RV64-NEXT: andi a2, a0, 8122; RV64-NEXT: or a2, a3, a2123; RV64-NEXT: srli a3, a0, 2124; RV64-NEXT: or a1, a1, a2125; RV64-NEXT: srli a2, a0, 4126; RV64-NEXT: andi a3, a3, 4127; RV64-NEXT: andi a2, a2, 2128; RV64-NEXT: or a2, a3, a2129; RV64-NEXT: or a1, a1, a2130; RV64-NEXT: srli a0, a0, 6131; RV64-NEXT: or a0, a1, a0132; RV64-NEXT: ret133 %rev = call i7 @llvm.bitreverse.i7(i7 %x)134 ret i7 %rev135}136 137define i24 @bitreverse_i24(i24 %x) {138; RV32-LABEL: bitreverse_i24:139; RV32: # %bb.0:140; RV32-NEXT: slli a1, a0, 16141; RV32-NEXT: lui a2, 4096142; RV32-NEXT: lui a3, 1048335143; RV32-NEXT: addi a2, a2, -1144; RV32-NEXT: addi a3, a3, 240145; RV32-NEXT: and a0, a0, a2146; RV32-NEXT: srli a0, a0, 16147; RV32-NEXT: or a0, a0, a1148; RV32-NEXT: and a1, a3, a2149; RV32-NEXT: and a1, a0, a1150; RV32-NEXT: slli a0, a0, 4151; RV32-NEXT: and a0, a0, a3152; RV32-NEXT: lui a3, 1047757153; RV32-NEXT: addi a3, a3, -820154; RV32-NEXT: srli a1, a1, 4155; RV32-NEXT: or a0, a1, a0156; RV32-NEXT: and a1, a3, a2157; RV32-NEXT: and a1, a0, a1158; RV32-NEXT: slli a0, a0, 2159; RV32-NEXT: and a0, a0, a3160; RV32-NEXT: lui a3, 1047211161; RV32-NEXT: addi a3, a3, -1366162; RV32-NEXT: and a2, a3, a2163; RV32-NEXT: srli a1, a1, 2164; RV32-NEXT: or a0, a1, a0165; RV32-NEXT: and a2, a0, a2166; RV32-NEXT: slli a0, a0, 1167; RV32-NEXT: srli a2, a2, 1168; RV32-NEXT: and a0, a0, a3169; RV32-NEXT: or a0, a2, a0170; RV32-NEXT: ret171;172; RV64-LABEL: bitreverse_i24:173; RV64: # %bb.0:174; RV64-NEXT: slli a1, a0, 16175; RV64-NEXT: lui a2, 4096176; RV64-NEXT: lui a3, 1048335177; RV64-NEXT: addi a2, a2, -1178; RV64-NEXT: addi a3, a3, 240179; RV64-NEXT: and a0, a0, a2180; RV64-NEXT: srli a0, a0, 16181; RV64-NEXT: or a0, a0, a1182; RV64-NEXT: and a1, a3, a2183; RV64-NEXT: and a1, a0, a1184; RV64-NEXT: slli a0, a0, 4185; RV64-NEXT: and a0, a0, a3186; RV64-NEXT: lui a3, 1047757187; RV64-NEXT: addi a3, a3, -820188; RV64-NEXT: srli a1, a1, 4189; RV64-NEXT: or a0, a1, a0190; RV64-NEXT: and a1, a3, a2191; RV64-NEXT: and a1, a0, a1192; RV64-NEXT: slli a0, a0, 2193; RV64-NEXT: and a0, a0, a3194; RV64-NEXT: lui a3, 1047211195; RV64-NEXT: addi a3, a3, -1366196; RV64-NEXT: and a2, a3, a2197; RV64-NEXT: srli a1, a1, 2198; RV64-NEXT: or a0, a1, a0199; RV64-NEXT: and a2, a0, a2200; RV64-NEXT: slli a0, a0, 1201; RV64-NEXT: srli a2, a2, 1202; RV64-NEXT: and a0, a0, a3203; RV64-NEXT: or a0, a2, a0204; RV64-NEXT: ret205 %rev = call i24 @llvm.bitreverse.i24(i24 %x)206 ret i24 %rev207}208 209define i2 @test_ctpop_i2(i2 %a) {210; RV32-LABEL: test_ctpop_i2:211; RV32: # %bb.0:212; RV32-NEXT: addi sp, sp, -16213; RV32-NEXT: .cfi_def_cfa_offset 16214; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill215; RV32-NEXT: .cfi_offset ra, -4216; RV32-NEXT: andi a0, a0, 3217; RV32-NEXT: srli a1, a0, 1218; RV32-NEXT: sub a0, a0, a1219; RV32-NEXT: zext.b a1, a0220; RV32-NEXT: srli a1, a1, 2221; RV32-NEXT: andi a1, a1, 51222; RV32-NEXT: andi a0, a0, 51223; RV32-NEXT: add a0, a1, a0224; RV32-NEXT: srli a1, a0, 4225; RV32-NEXT: add a0, a1, a0226; RV32-NEXT: andi a0, a0, 15227; RV32-NEXT: li a1, 1228; RV32-NEXT: call __mulsi3229; RV32-NEXT: zext.b a0, a0230; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload231; RV32-NEXT: .cfi_restore ra232; RV32-NEXT: addi sp, sp, 16233; RV32-NEXT: .cfi_def_cfa_offset 0234; RV32-NEXT: ret235;236; RV64-LABEL: test_ctpop_i2:237; RV64: # %bb.0:238; RV64-NEXT: addi sp, sp, -16239; RV64-NEXT: .cfi_def_cfa_offset 16240; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill241; RV64-NEXT: .cfi_offset ra, -8242; RV64-NEXT: andi a0, a0, 3243; RV64-NEXT: srli a1, a0, 1244; RV64-NEXT: sub a0, a0, a1245; RV64-NEXT: zext.b a1, a0246; RV64-NEXT: srli a1, a1, 2247; RV64-NEXT: andi a1, a1, 51248; RV64-NEXT: andi a0, a0, 51249; RV64-NEXT: add a0, a1, a0250; RV64-NEXT: srli a1, a0, 4251; RV64-NEXT: add a0, a1, a0252; RV64-NEXT: andi a0, a0, 15253; RV64-NEXT: li a1, 1254; RV64-NEXT: call __muldi3255; RV64-NEXT: zext.b a0, a0256; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload257; RV64-NEXT: .cfi_restore ra258; RV64-NEXT: addi sp, sp, 16259; RV64-NEXT: .cfi_def_cfa_offset 0260; RV64-NEXT: ret261 %1 = call i2 @llvm.ctpop.i2(i2 %a)262 ret i2 %1263}264 265define i11 @test_ctpop_i11(i11 %a) {266; RV32-LABEL: test_ctpop_i11:267; RV32: # %bb.0:268; RV32-NEXT: addi sp, sp, -16269; RV32-NEXT: .cfi_def_cfa_offset 16270; RV32-NEXT: sw ra, 12(sp) # 4-byte Folded Spill271; RV32-NEXT: sw s0, 8(sp) # 4-byte Folded Spill272; RV32-NEXT: .cfi_offset ra, -4273; RV32-NEXT: .cfi_offset s0, -8274; RV32-NEXT: andi a0, a0, 2047275; RV32-NEXT: lui a1, 5276; RV32-NEXT: lui a2, 16277; RV32-NEXT: srli a3, a0, 1278; RV32-NEXT: addi a1, a1, 1365279; RV32-NEXT: and a1, a3, a1280; RV32-NEXT: lui a3, 3281; RV32-NEXT: addi s0, a2, -1282; RV32-NEXT: addi a2, a3, 819283; RV32-NEXT: sub a0, a0, a1284; RV32-NEXT: and a1, a0, s0285; RV32-NEXT: and a0, a0, a2286; RV32-NEXT: srli a1, a1, 2287; RV32-NEXT: and a1, a1, a2288; RV32-NEXT: lui a2, 1289; RV32-NEXT: add a0, a1, a0290; RV32-NEXT: srli a1, a0, 4291; RV32-NEXT: add a0, a1, a0292; RV32-NEXT: addi a1, a2, -241293; RV32-NEXT: and a0, a0, a1294; RV32-NEXT: li a1, 257295; RV32-NEXT: call __mulsi3296; RV32-NEXT: and a0, a0, s0297; RV32-NEXT: srli a0, a0, 8298; RV32-NEXT: lw ra, 12(sp) # 4-byte Folded Reload299; RV32-NEXT: lw s0, 8(sp) # 4-byte Folded Reload300; RV32-NEXT: .cfi_restore ra301; RV32-NEXT: .cfi_restore s0302; RV32-NEXT: addi sp, sp, 16303; RV32-NEXT: .cfi_def_cfa_offset 0304; RV32-NEXT: ret305;306; RV64-LABEL: test_ctpop_i11:307; RV64: # %bb.0:308; RV64-NEXT: addi sp, sp, -16309; RV64-NEXT: .cfi_def_cfa_offset 16310; RV64-NEXT: sd ra, 8(sp) # 8-byte Folded Spill311; RV64-NEXT: sd s0, 0(sp) # 8-byte Folded Spill312; RV64-NEXT: .cfi_offset ra, -8313; RV64-NEXT: .cfi_offset s0, -16314; RV64-NEXT: andi a0, a0, 2047315; RV64-NEXT: lui a1, 5316; RV64-NEXT: lui a2, 16317; RV64-NEXT: srli a3, a0, 1318; RV64-NEXT: addi a1, a1, 1365319; RV64-NEXT: and a1, a3, a1320; RV64-NEXT: lui a3, 3321; RV64-NEXT: addi s0, a2, -1322; RV64-NEXT: addi a2, a3, 819323; RV64-NEXT: sub a0, a0, a1324; RV64-NEXT: and a1, a0, s0325; RV64-NEXT: and a0, a0, a2326; RV64-NEXT: srli a1, a1, 2327; RV64-NEXT: and a1, a1, a2328; RV64-NEXT: lui a2, 1329; RV64-NEXT: add a0, a1, a0330; RV64-NEXT: srli a1, a0, 4331; RV64-NEXT: add a0, a1, a0332; RV64-NEXT: addi a1, a2, -241333; RV64-NEXT: and a0, a0, a1334; RV64-NEXT: li a1, 257335; RV64-NEXT: call __muldi3336; RV64-NEXT: and a0, a0, s0337; RV64-NEXT: srli a0, a0, 8338; RV64-NEXT: ld ra, 8(sp) # 8-byte Folded Reload339; RV64-NEXT: ld s0, 0(sp) # 8-byte Folded Reload340; RV64-NEXT: .cfi_restore ra341; RV64-NEXT: .cfi_restore s0342; RV64-NEXT: addi sp, sp, 16343; RV64-NEXT: .cfi_def_cfa_offset 0344; RV64-NEXT: ret345 %1 = call i11 @llvm.ctpop.i11(i11 %a)346 ret i11 %1347}348