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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=riscv32 -global-isel -mattr=+d -verify-machineinstrs < %s \3; RUN: -target-abi=ilp32d | FileCheck -check-prefixes=CHECKIFD,RV32IFD %s4; RUN: llc -mtriple=riscv64 -global-isel -mattr=+d -verify-machineinstrs < %s \5; RUN: -target-abi=lp64d | FileCheck -check-prefixes=CHECKIFD,RV64IFD %s6; RUN: llc -mtriple=riscv32 -global-isel -verify-machineinstrs < %s \7; RUN: | FileCheck -check-prefix=RV32I %s8; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \9; RUN: | FileCheck -check-prefix=RV64I %s10 11define float @fcvt_s_d(double %a) nounwind {12; CHECKIFD-LABEL: fcvt_s_d:13; CHECKIFD: # %bb.0:14; CHECKIFD-NEXT: fcvt.s.d fa0, fa015; CHECKIFD-NEXT: ret16;17; RV32I-LABEL: fcvt_s_d:18; RV32I: # %bb.0:19; RV32I-NEXT: addi sp, sp, -1620; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill21; RV32I-NEXT: call __truncdfsf222; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload23; RV32I-NEXT: addi sp, sp, 1624; RV32I-NEXT: ret25;26; RV64I-LABEL: fcvt_s_d:27; RV64I: # %bb.0:28; RV64I-NEXT: addi sp, sp, -1629; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill30; RV64I-NEXT: call __truncdfsf231; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload32; RV64I-NEXT: addi sp, sp, 1633; RV64I-NEXT: ret34 %1 = fptrunc double %a to float35 ret float %136}37 38define double @fcvt_d_s(float %a) nounwind {39; CHECKIFD-LABEL: fcvt_d_s:40; CHECKIFD: # %bb.0:41; CHECKIFD-NEXT: fcvt.d.s fa0, fa042; CHECKIFD-NEXT: ret43;44; RV32I-LABEL: fcvt_d_s:45; RV32I: # %bb.0:46; RV32I-NEXT: addi sp, sp, -1647; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill48; RV32I-NEXT: call __extendsfdf249; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload50; RV32I-NEXT: addi sp, sp, 1651; RV32I-NEXT: ret52;53; RV64I-LABEL: fcvt_d_s:54; RV64I: # %bb.0:55; RV64I-NEXT: addi sp, sp, -1656; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill57; RV64I-NEXT: call __extendsfdf258; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload59; RV64I-NEXT: addi sp, sp, 1660; RV64I-NEXT: ret61 %1 = fpext float %a to double62 ret double %163}64 65define i32 @fcvt_w_d(double %a) nounwind {66; CHECKIFD-LABEL: fcvt_w_d:67; CHECKIFD: # %bb.0:68; CHECKIFD-NEXT: fcvt.w.d a0, fa0, rtz69; CHECKIFD-NEXT: ret70;71; RV32I-LABEL: fcvt_w_d:72; RV32I: # %bb.0:73; RV32I-NEXT: addi sp, sp, -1674; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill75; RV32I-NEXT: call __fixdfsi76; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload77; RV32I-NEXT: addi sp, sp, 1678; RV32I-NEXT: ret79;80; RV64I-LABEL: fcvt_w_d:81; RV64I: # %bb.0:82; RV64I-NEXT: addi sp, sp, -1683; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill84; RV64I-NEXT: call __fixdfsi85; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload86; RV64I-NEXT: addi sp, sp, 1687; RV64I-NEXT: ret88 %1 = fptosi double %a to i3289 ret i32 %190}91 92define i32 @fcvt_wu_d(double %a) nounwind {93; CHECKIFD-LABEL: fcvt_wu_d:94; CHECKIFD: # %bb.0:95; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz96; CHECKIFD-NEXT: ret97;98; RV32I-LABEL: fcvt_wu_d:99; RV32I: # %bb.0:100; RV32I-NEXT: addi sp, sp, -16101; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill102; RV32I-NEXT: call __fixunsdfsi103; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload104; RV32I-NEXT: addi sp, sp, 16105; RV32I-NEXT: ret106;107; RV64I-LABEL: fcvt_wu_d:108; RV64I: # %bb.0:109; RV64I-NEXT: addi sp, sp, -16110; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill111; RV64I-NEXT: call __fixunsdfsi112; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload113; RV64I-NEXT: addi sp, sp, 16114; RV64I-NEXT: ret115 %1 = fptoui double %a to i32116 ret i32 %1117}118 119define i32 @fcvt_wu_d_multiple_use(double %x, ptr %y) nounwind {120; CHECKIFD-LABEL: fcvt_wu_d_multiple_use:121; CHECKIFD: # %bb.0:122; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz123; CHECKIFD-NEXT: bnez a0, .LBB4_2124; CHECKIFD-NEXT: # %bb.1:125; CHECKIFD-NEXT: li a0, 1126; CHECKIFD-NEXT: .LBB4_2:127; CHECKIFD-NEXT: ret128;129; RV32I-LABEL: fcvt_wu_d_multiple_use:130; RV32I: # %bb.0:131; RV32I-NEXT: addi sp, sp, -16132; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill133; RV32I-NEXT: call __fixunsdfsi134; RV32I-NEXT: bnez a0, .LBB4_2135; RV32I-NEXT: # %bb.1:136; RV32I-NEXT: li a0, 1137; RV32I-NEXT: .LBB4_2:138; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload139; RV32I-NEXT: addi sp, sp, 16140; RV32I-NEXT: ret141;142; RV64I-LABEL: fcvt_wu_d_multiple_use:143; RV64I: # %bb.0:144; RV64I-NEXT: addi sp, sp, -16145; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill146; RV64I-NEXT: call __fixunsdfsi147; RV64I-NEXT: sext.w a1, a0148; RV64I-NEXT: bnez a1, .LBB4_2149; RV64I-NEXT: # %bb.1:150; RV64I-NEXT: li a0, 1151; RV64I-NEXT: .LBB4_2:152; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload153; RV64I-NEXT: addi sp, sp, 16154; RV64I-NEXT: ret155 %a = fptoui double %x to i32156 %b = icmp eq i32 %a, 0157 %c = select i1 %b, i32 1, i32 %a158 ret i32 %c159}160 161define double @fcvt_d_w(i32 %a) nounwind {162; CHECKIFD-LABEL: fcvt_d_w:163; CHECKIFD: # %bb.0:164; CHECKIFD-NEXT: fcvt.d.w fa0, a0165; CHECKIFD-NEXT: ret166;167; RV32I-LABEL: fcvt_d_w:168; RV32I: # %bb.0:169; RV32I-NEXT: addi sp, sp, -16170; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill171; RV32I-NEXT: call __floatsidf172; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload173; RV32I-NEXT: addi sp, sp, 16174; RV32I-NEXT: ret175;176; RV64I-LABEL: fcvt_d_w:177; RV64I: # %bb.0:178; RV64I-NEXT: addi sp, sp, -16179; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill180; RV64I-NEXT: sext.w a0, a0181; RV64I-NEXT: call __floatsidf182; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload183; RV64I-NEXT: addi sp, sp, 16184; RV64I-NEXT: ret185 %1 = sitofp i32 %a to double186 ret double %1187}188 189define double @fcvt_d_w_load(ptr %p) nounwind {190; CHECKIFD-LABEL: fcvt_d_w_load:191; CHECKIFD: # %bb.0:192; CHECKIFD-NEXT: lw a0, 0(a0)193; CHECKIFD-NEXT: fcvt.d.w fa0, a0194; CHECKIFD-NEXT: ret195;196; RV32I-LABEL: fcvt_d_w_load:197; RV32I: # %bb.0:198; RV32I-NEXT: addi sp, sp, -16199; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill200; RV32I-NEXT: lw a0, 0(a0)201; RV32I-NEXT: call __floatsidf202; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload203; RV32I-NEXT: addi sp, sp, 16204; RV32I-NEXT: ret205;206; RV64I-LABEL: fcvt_d_w_load:207; RV64I: # %bb.0:208; RV64I-NEXT: addi sp, sp, -16209; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill210; RV64I-NEXT: lw a0, 0(a0)211; RV64I-NEXT: call __floatsidf212; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload213; RV64I-NEXT: addi sp, sp, 16214; RV64I-NEXT: ret215 %a = load i32, ptr %p216 %1 = sitofp i32 %a to double217 ret double %1218}219 220define double @fcvt_d_wu(i32 %a) nounwind {221; CHECKIFD-LABEL: fcvt_d_wu:222; CHECKIFD: # %bb.0:223; CHECKIFD-NEXT: fcvt.d.wu fa0, a0224; CHECKIFD-NEXT: ret225;226; RV32I-LABEL: fcvt_d_wu:227; RV32I: # %bb.0:228; RV32I-NEXT: addi sp, sp, -16229; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill230; RV32I-NEXT: call __floatunsidf231; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload232; RV32I-NEXT: addi sp, sp, 16233; RV32I-NEXT: ret234;235; RV64I-LABEL: fcvt_d_wu:236; RV64I: # %bb.0:237; RV64I-NEXT: addi sp, sp, -16238; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill239; RV64I-NEXT: sext.w a0, a0240; RV64I-NEXT: call __floatunsidf241; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload242; RV64I-NEXT: addi sp, sp, 16243; RV64I-NEXT: ret244 %1 = uitofp i32 %a to double245 ret double %1246}247 248define double @fcvt_d_wu_load(ptr %p) nounwind {249; CHECKIFD-LABEL: fcvt_d_wu_load:250; CHECKIFD: # %bb.0:251; CHECKIFD-NEXT: lw a0, 0(a0)252; CHECKIFD-NEXT: fcvt.d.wu fa0, a0253; CHECKIFD-NEXT: ret254;255; RV32I-LABEL: fcvt_d_wu_load:256; RV32I: # %bb.0:257; RV32I-NEXT: addi sp, sp, -16258; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill259; RV32I-NEXT: lw a0, 0(a0)260; RV32I-NEXT: call __floatunsidf261; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload262; RV32I-NEXT: addi sp, sp, 16263; RV32I-NEXT: ret264;265; RV64I-LABEL: fcvt_d_wu_load:266; RV64I: # %bb.0:267; RV64I-NEXT: addi sp, sp, -16268; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill269; RV64I-NEXT: lw a0, 0(a0)270; RV64I-NEXT: call __floatunsidf271; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload272; RV64I-NEXT: addi sp, sp, 16273; RV64I-NEXT: ret274 %a = load i32, ptr %p275 %1 = uitofp i32 %a to double276 ret double %1277}278 279define i64 @fcvt_l_d(double %a) nounwind {280; RV32IFD-LABEL: fcvt_l_d:281; RV32IFD: # %bb.0:282; RV32IFD-NEXT: addi sp, sp, -16283; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill284; RV32IFD-NEXT: call __fixdfdi285; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload286; RV32IFD-NEXT: addi sp, sp, 16287; RV32IFD-NEXT: ret288;289; RV64IFD-LABEL: fcvt_l_d:290; RV64IFD: # %bb.0:291; RV64IFD-NEXT: fcvt.l.d a0, fa0, rtz292; RV64IFD-NEXT: ret293;294; RV32I-LABEL: fcvt_l_d:295; RV32I: # %bb.0:296; RV32I-NEXT: addi sp, sp, -16297; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill298; RV32I-NEXT: call __fixdfdi299; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload300; RV32I-NEXT: addi sp, sp, 16301; RV32I-NEXT: ret302;303; RV64I-LABEL: fcvt_l_d:304; RV64I: # %bb.0:305; RV64I-NEXT: addi sp, sp, -16306; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill307; RV64I-NEXT: call __fixdfdi308; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload309; RV64I-NEXT: addi sp, sp, 16310; RV64I-NEXT: ret311 %1 = fptosi double %a to i64312 ret i64 %1313}314 315define i64 @fcvt_lu_d(double %a) nounwind {316; RV32IFD-LABEL: fcvt_lu_d:317; RV32IFD: # %bb.0:318; RV32IFD-NEXT: addi sp, sp, -16319; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill320; RV32IFD-NEXT: call __fixunsdfdi321; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload322; RV32IFD-NEXT: addi sp, sp, 16323; RV32IFD-NEXT: ret324;325; RV64IFD-LABEL: fcvt_lu_d:326; RV64IFD: # %bb.0:327; RV64IFD-NEXT: fcvt.lu.d a0, fa0, rtz328; RV64IFD-NEXT: ret329;330; RV32I-LABEL: fcvt_lu_d:331; RV32I: # %bb.0:332; RV32I-NEXT: addi sp, sp, -16333; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill334; RV32I-NEXT: call __fixunsdfdi335; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload336; RV32I-NEXT: addi sp, sp, 16337; RV32I-NEXT: ret338;339; RV64I-LABEL: fcvt_lu_d:340; RV64I: # %bb.0:341; RV64I-NEXT: addi sp, sp, -16342; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill343; RV64I-NEXT: call __fixunsdfdi344; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload345; RV64I-NEXT: addi sp, sp, 16346; RV64I-NEXT: ret347 %1 = fptoui double %a to i64348 ret i64 %1349}350 351define i64 @fmv_x_d(double %a, double %b) nounwind {352; RV32IFD-LABEL: fmv_x_d:353; RV32IFD: # %bb.0:354; RV32IFD-NEXT: addi sp, sp, -16355; RV32IFD-NEXT: fadd.d fa5, fa0, fa1356; RV32IFD-NEXT: fsd fa5, 8(sp)357; RV32IFD-NEXT: lw a0, 8(sp)358; RV32IFD-NEXT: lw a1, 12(sp)359; RV32IFD-NEXT: addi sp, sp, 16360; RV32IFD-NEXT: ret361;362; RV64IFD-LABEL: fmv_x_d:363; RV64IFD: # %bb.0:364; RV64IFD-NEXT: fadd.d fa5, fa0, fa1365; RV64IFD-NEXT: fmv.x.d a0, fa5366; RV64IFD-NEXT: ret367;368; RV32I-LABEL: fmv_x_d:369; RV32I: # %bb.0:370; RV32I-NEXT: addi sp, sp, -16371; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill372; RV32I-NEXT: call __adddf3373; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload374; RV32I-NEXT: addi sp, sp, 16375; RV32I-NEXT: ret376;377; RV64I-LABEL: fmv_x_d:378; RV64I: # %bb.0:379; RV64I-NEXT: addi sp, sp, -16380; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill381; RV64I-NEXT: call __adddf3382; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload383; RV64I-NEXT: addi sp, sp, 16384; RV64I-NEXT: ret385 %1 = fadd double %a, %b386 %2 = bitcast double %1 to i64387 ret i64 %2388}389 390define double @fcvt_d_l(i64 %a) nounwind {391; RV32IFD-LABEL: fcvt_d_l:392; RV32IFD: # %bb.0:393; RV32IFD-NEXT: addi sp, sp, -16394; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill395; RV32IFD-NEXT: call __floatdidf396; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload397; RV32IFD-NEXT: addi sp, sp, 16398; RV32IFD-NEXT: ret399;400; RV64IFD-LABEL: fcvt_d_l:401; RV64IFD: # %bb.0:402; RV64IFD-NEXT: fcvt.d.l fa0, a0403; RV64IFD-NEXT: ret404;405; RV32I-LABEL: fcvt_d_l:406; RV32I: # %bb.0:407; RV32I-NEXT: addi sp, sp, -16408; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill409; RV32I-NEXT: call __floatdidf410; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload411; RV32I-NEXT: addi sp, sp, 16412; RV32I-NEXT: ret413;414; RV64I-LABEL: fcvt_d_l:415; RV64I: # %bb.0:416; RV64I-NEXT: addi sp, sp, -16417; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill418; RV64I-NEXT: call __floatdidf419; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload420; RV64I-NEXT: addi sp, sp, 16421; RV64I-NEXT: ret422 %1 = sitofp i64 %a to double423 ret double %1424}425 426define double @fcvt_d_lu(i64 %a) nounwind {427; RV32IFD-LABEL: fcvt_d_lu:428; RV32IFD: # %bb.0:429; RV32IFD-NEXT: addi sp, sp, -16430; RV32IFD-NEXT: sw ra, 12(sp) # 4-byte Folded Spill431; RV32IFD-NEXT: call __floatundidf432; RV32IFD-NEXT: lw ra, 12(sp) # 4-byte Folded Reload433; RV32IFD-NEXT: addi sp, sp, 16434; RV32IFD-NEXT: ret435;436; RV64IFD-LABEL: fcvt_d_lu:437; RV64IFD: # %bb.0:438; RV64IFD-NEXT: fcvt.d.lu fa0, a0439; RV64IFD-NEXT: ret440;441; RV32I-LABEL: fcvt_d_lu:442; RV32I: # %bb.0:443; RV32I-NEXT: addi sp, sp, -16444; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill445; RV32I-NEXT: call __floatundidf446; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload447; RV32I-NEXT: addi sp, sp, 16448; RV32I-NEXT: ret449;450; RV64I-LABEL: fcvt_d_lu:451; RV64I: # %bb.0:452; RV64I-NEXT: addi sp, sp, -16453; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill454; RV64I-NEXT: call __floatundidf455; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload456; RV64I-NEXT: addi sp, sp, 16457; RV64I-NEXT: ret458 %1 = uitofp i64 %a to double459 ret double %1460}461 462define double @fmv_d_x(i64 %a, i64 %b) nounwind {463; RV32IFD-LABEL: fmv_d_x:464; RV32IFD: # %bb.0:465; RV32IFD-NEXT: addi sp, sp, -16466; RV32IFD-NEXT: sw a0, 8(sp)467; RV32IFD-NEXT: sw a1, 12(sp)468; RV32IFD-NEXT: fld fa5, 8(sp)469; RV32IFD-NEXT: sw a2, 8(sp)470; RV32IFD-NEXT: sw a3, 12(sp)471; RV32IFD-NEXT: fld fa4, 8(sp)472; RV32IFD-NEXT: fadd.d fa0, fa5, fa4473; RV32IFD-NEXT: addi sp, sp, 16474; RV32IFD-NEXT: ret475;476; RV64IFD-LABEL: fmv_d_x:477; RV64IFD: # %bb.0:478; RV64IFD-NEXT: fmv.d.x fa5, a0479; RV64IFD-NEXT: fmv.d.x fa4, a1480; RV64IFD-NEXT: fadd.d fa0, fa5, fa4481; RV64IFD-NEXT: ret482;483; RV32I-LABEL: fmv_d_x:484; RV32I: # %bb.0:485; RV32I-NEXT: addi sp, sp, -16486; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill487; RV32I-NEXT: call __adddf3488; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload489; RV32I-NEXT: addi sp, sp, 16490; RV32I-NEXT: ret491;492; RV64I-LABEL: fmv_d_x:493; RV64I: # %bb.0:494; RV64I-NEXT: addi sp, sp, -16495; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill496; RV64I-NEXT: call __adddf3497; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload498; RV64I-NEXT: addi sp, sp, 16499; RV64I-NEXT: ret500 %1 = bitcast i64 %a to double501 %2 = bitcast i64 %b to double502 %3 = fadd double %1, %2503 ret double %3504}505 506define double @fcvt_d_w_i8(i8 signext %a) nounwind {507; CHECKIFD-LABEL: fcvt_d_w_i8:508; CHECKIFD: # %bb.0:509; CHECKIFD-NEXT: fcvt.d.w fa0, a0510; CHECKIFD-NEXT: ret511;512; RV32I-LABEL: fcvt_d_w_i8:513; RV32I: # %bb.0:514; RV32I-NEXT: addi sp, sp, -16515; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill516; RV32I-NEXT: call __floatsidf517; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload518; RV32I-NEXT: addi sp, sp, 16519; RV32I-NEXT: ret520;521; RV64I-LABEL: fcvt_d_w_i8:522; RV64I: # %bb.0:523; RV64I-NEXT: addi sp, sp, -16524; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill525; RV64I-NEXT: call __floatsidf526; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload527; RV64I-NEXT: addi sp, sp, 16528; RV64I-NEXT: ret529 %1 = sitofp i8 %a to double530 ret double %1531}532 533define double @fcvt_d_wu_i8(i8 zeroext %a) nounwind {534; CHECKIFD-LABEL: fcvt_d_wu_i8:535; CHECKIFD: # %bb.0:536; CHECKIFD-NEXT: fcvt.d.wu fa0, a0537; CHECKIFD-NEXT: ret538;539; RV32I-LABEL: fcvt_d_wu_i8:540; RV32I: # %bb.0:541; RV32I-NEXT: addi sp, sp, -16542; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill543; RV32I-NEXT: call __floatunsidf544; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload545; RV32I-NEXT: addi sp, sp, 16546; RV32I-NEXT: ret547;548; RV64I-LABEL: fcvt_d_wu_i8:549; RV64I: # %bb.0:550; RV64I-NEXT: addi sp, sp, -16551; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill552; RV64I-NEXT: call __floatunsidf553; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload554; RV64I-NEXT: addi sp, sp, 16555; RV64I-NEXT: ret556 %1 = uitofp i8 %a to double557 ret double %1558}559 560define double @fcvt_d_w_i16(i16 signext %a) nounwind {561; CHECKIFD-LABEL: fcvt_d_w_i16:562; CHECKIFD: # %bb.0:563; CHECKIFD-NEXT: fcvt.d.w fa0, a0564; CHECKIFD-NEXT: ret565;566; RV32I-LABEL: fcvt_d_w_i16:567; RV32I: # %bb.0:568; RV32I-NEXT: addi sp, sp, -16569; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill570; RV32I-NEXT: call __floatsidf571; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload572; RV32I-NEXT: addi sp, sp, 16573; RV32I-NEXT: ret574;575; RV64I-LABEL: fcvt_d_w_i16:576; RV64I: # %bb.0:577; RV64I-NEXT: addi sp, sp, -16578; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill579; RV64I-NEXT: call __floatsidf580; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload581; RV64I-NEXT: addi sp, sp, 16582; RV64I-NEXT: ret583 %1 = sitofp i16 %a to double584 ret double %1585}586 587define double @fcvt_d_wu_i16(i16 zeroext %a) nounwind {588; CHECKIFD-LABEL: fcvt_d_wu_i16:589; CHECKIFD: # %bb.0:590; CHECKIFD-NEXT: fcvt.d.wu fa0, a0591; CHECKIFD-NEXT: ret592;593; RV32I-LABEL: fcvt_d_wu_i16:594; RV32I: # %bb.0:595; RV32I-NEXT: addi sp, sp, -16596; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill597; RV32I-NEXT: call __floatunsidf598; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload599; RV32I-NEXT: addi sp, sp, 16600; RV32I-NEXT: ret601;602; RV64I-LABEL: fcvt_d_wu_i16:603; RV64I: # %bb.0:604; RV64I-NEXT: addi sp, sp, -16605; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill606; RV64I-NEXT: call __floatunsidf607; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload608; RV64I-NEXT: addi sp, sp, 16609; RV64I-NEXT: ret610 %1 = uitofp i16 %a to double611 ret double %1612}613 614define signext i32 @fcvt_d_w_demanded_bits(i32 signext %0, ptr %1) nounwind {615; RV32IFD-LABEL: fcvt_d_w_demanded_bits:616; RV32IFD: # %bb.0:617; RV32IFD-NEXT: addi a0, a0, 1618; RV32IFD-NEXT: fcvt.d.w fa5, a0619; RV32IFD-NEXT: fsd fa5, 0(a1)620; RV32IFD-NEXT: ret621;622; RV64IFD-LABEL: fcvt_d_w_demanded_bits:623; RV64IFD: # %bb.0:624; RV64IFD-NEXT: addiw a0, a0, 1625; RV64IFD-NEXT: fcvt.d.w fa5, a0626; RV64IFD-NEXT: fsd fa5, 0(a1)627; RV64IFD-NEXT: ret628;629; RV32I-LABEL: fcvt_d_w_demanded_bits:630; RV32I: # %bb.0:631; RV32I-NEXT: addi sp, sp, -16632; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill633; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill634; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill635; RV32I-NEXT: mv s0, a1636; RV32I-NEXT: addi s1, a0, 1637; RV32I-NEXT: mv a0, s1638; RV32I-NEXT: call __floatsidf639; RV32I-NEXT: sw a0, 0(s0)640; RV32I-NEXT: sw a1, 4(s0)641; RV32I-NEXT: mv a0, s1642; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload643; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload644; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload645; RV32I-NEXT: addi sp, sp, 16646; RV32I-NEXT: ret647;648; RV64I-LABEL: fcvt_d_w_demanded_bits:649; RV64I: # %bb.0:650; RV64I-NEXT: addi sp, sp, -32651; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill652; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill653; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill654; RV64I-NEXT: mv s0, a1655; RV64I-NEXT: addiw s1, a0, 1656; RV64I-NEXT: mv a0, s1657; RV64I-NEXT: call __floatsidf658; RV64I-NEXT: sd a0, 0(s0)659; RV64I-NEXT: mv a0, s1660; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload661; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload662; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload663; RV64I-NEXT: addi sp, sp, 32664; RV64I-NEXT: ret665 %3 = add i32 %0, 1666 %4 = sitofp i32 %3 to double667 store double %4, ptr %1, align 8668 ret i32 %3669}670 671define signext i32 @fcvt_d_wu_demanded_bits(i32 signext %0, ptr %1) nounwind {672; RV32IFD-LABEL: fcvt_d_wu_demanded_bits:673; RV32IFD: # %bb.0:674; RV32IFD-NEXT: addi a0, a0, 1675; RV32IFD-NEXT: fcvt.d.wu fa5, a0676; RV32IFD-NEXT: fsd fa5, 0(a1)677; RV32IFD-NEXT: ret678;679; RV64IFD-LABEL: fcvt_d_wu_demanded_bits:680; RV64IFD: # %bb.0:681; RV64IFD-NEXT: addiw a0, a0, 1682; RV64IFD-NEXT: fcvt.d.wu fa5, a0683; RV64IFD-NEXT: fsd fa5, 0(a1)684; RV64IFD-NEXT: ret685;686; RV32I-LABEL: fcvt_d_wu_demanded_bits:687; RV32I: # %bb.0:688; RV32I-NEXT: addi sp, sp, -16689; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill690; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill691; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill692; RV32I-NEXT: mv s0, a1693; RV32I-NEXT: addi s1, a0, 1694; RV32I-NEXT: mv a0, s1695; RV32I-NEXT: call __floatunsidf696; RV32I-NEXT: sw a0, 0(s0)697; RV32I-NEXT: sw a1, 4(s0)698; RV32I-NEXT: mv a0, s1699; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload700; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload701; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload702; RV32I-NEXT: addi sp, sp, 16703; RV32I-NEXT: ret704;705; RV64I-LABEL: fcvt_d_wu_demanded_bits:706; RV64I: # %bb.0:707; RV64I-NEXT: addi sp, sp, -32708; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill709; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill710; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill711; RV64I-NEXT: mv s0, a1712; RV64I-NEXT: addiw s1, a0, 1713; RV64I-NEXT: mv a0, s1714; RV64I-NEXT: call __floatunsidf715; RV64I-NEXT: sd a0, 0(s0)716; RV64I-NEXT: mv a0, s1717; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload718; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload719; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload720; RV64I-NEXT: addi sp, sp, 32721; RV64I-NEXT: ret722 %3 = add i32 %0, 1723 %4 = uitofp i32 %3 to double724 store double %4, ptr %1, align 8725 ret i32 %3726}727 728define signext i16 @fcvt_w_s_i16(double %a) nounwind {729; RV32IFD-LABEL: fcvt_w_s_i16:730; RV32IFD: # %bb.0:731; RV32IFD-NEXT: fcvt.w.d a0, fa0, rtz732; RV32IFD-NEXT: slli a0, a0, 16733; RV32IFD-NEXT: srai a0, a0, 16734; RV32IFD-NEXT: ret735;736; RV64IFD-LABEL: fcvt_w_s_i16:737; RV64IFD: # %bb.0:738; RV64IFD-NEXT: fcvt.w.d a0, fa0, rtz739; RV64IFD-NEXT: slli a0, a0, 48740; RV64IFD-NEXT: srai a0, a0, 48741; RV64IFD-NEXT: ret742;743; RV32I-LABEL: fcvt_w_s_i16:744; RV32I: # %bb.0:745; RV32I-NEXT: addi sp, sp, -16746; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill747; RV32I-NEXT: call __fixdfsi748; RV32I-NEXT: slli a0, a0, 16749; RV32I-NEXT: srai a0, a0, 16750; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload751; RV32I-NEXT: addi sp, sp, 16752; RV32I-NEXT: ret753;754; RV64I-LABEL: fcvt_w_s_i16:755; RV64I: # %bb.0:756; RV64I-NEXT: addi sp, sp, -16757; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill758; RV64I-NEXT: call __fixdfsi759; RV64I-NEXT: slli a0, a0, 48760; RV64I-NEXT: srai a0, a0, 48761; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload762; RV64I-NEXT: addi sp, sp, 16763; RV64I-NEXT: ret764 %1 = fptosi double %a to i16765 ret i16 %1766}767 768define zeroext i16 @fcvt_wu_s_i16(double %a) nounwind {769; RV32IFD-LABEL: fcvt_wu_s_i16:770; RV32IFD: # %bb.0:771; RV32IFD-NEXT: fcvt.wu.d a0, fa0, rtz772; RV32IFD-NEXT: slli a0, a0, 16773; RV32IFD-NEXT: srli a0, a0, 16774; RV32IFD-NEXT: ret775;776; RV64IFD-LABEL: fcvt_wu_s_i16:777; RV64IFD: # %bb.0:778; RV64IFD-NEXT: fcvt.wu.d a0, fa0, rtz779; RV64IFD-NEXT: slli a0, a0, 48780; RV64IFD-NEXT: srli a0, a0, 48781; RV64IFD-NEXT: ret782;783; RV32I-LABEL: fcvt_wu_s_i16:784; RV32I: # %bb.0:785; RV32I-NEXT: addi sp, sp, -16786; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill787; RV32I-NEXT: call __fixunsdfsi788; RV32I-NEXT: slli a0, a0, 16789; RV32I-NEXT: srli a0, a0, 16790; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload791; RV32I-NEXT: addi sp, sp, 16792; RV32I-NEXT: ret793;794; RV64I-LABEL: fcvt_wu_s_i16:795; RV64I: # %bb.0:796; RV64I-NEXT: addi sp, sp, -16797; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill798; RV64I-NEXT: call __fixunsdfsi799; RV64I-NEXT: slli a0, a0, 48800; RV64I-NEXT: srli a0, a0, 48801; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload802; RV64I-NEXT: addi sp, sp, 16803; RV64I-NEXT: ret804 %1 = fptoui double %a to i16805 ret i16 %1806}807 808define signext i8 @fcvt_w_s_i8(double %a) nounwind {809; RV32IFD-LABEL: fcvt_w_s_i8:810; RV32IFD: # %bb.0:811; RV32IFD-NEXT: fcvt.w.d a0, fa0, rtz812; RV32IFD-NEXT: slli a0, a0, 24813; RV32IFD-NEXT: srai a0, a0, 24814; RV32IFD-NEXT: ret815;816; RV64IFD-LABEL: fcvt_w_s_i8:817; RV64IFD: # %bb.0:818; RV64IFD-NEXT: fcvt.w.d a0, fa0, rtz819; RV64IFD-NEXT: slli a0, a0, 56820; RV64IFD-NEXT: srai a0, a0, 56821; RV64IFD-NEXT: ret822;823; RV32I-LABEL: fcvt_w_s_i8:824; RV32I: # %bb.0:825; RV32I-NEXT: addi sp, sp, -16826; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill827; RV32I-NEXT: call __fixdfsi828; RV32I-NEXT: slli a0, a0, 24829; RV32I-NEXT: srai a0, a0, 24830; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload831; RV32I-NEXT: addi sp, sp, 16832; RV32I-NEXT: ret833;834; RV64I-LABEL: fcvt_w_s_i8:835; RV64I: # %bb.0:836; RV64I-NEXT: addi sp, sp, -16837; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill838; RV64I-NEXT: call __fixdfsi839; RV64I-NEXT: slli a0, a0, 56840; RV64I-NEXT: srai a0, a0, 56841; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload842; RV64I-NEXT: addi sp, sp, 16843; RV64I-NEXT: ret844 %1 = fptosi double %a to i8845 ret i8 %1846}847 848define zeroext i8 @fcvt_wu_s_i8(double %a) nounwind {849; CHECKIFD-LABEL: fcvt_wu_s_i8:850; CHECKIFD: # %bb.0:851; CHECKIFD-NEXT: fcvt.wu.d a0, fa0, rtz852; CHECKIFD-NEXT: zext.b a0, a0853; CHECKIFD-NEXT: ret854;855; RV32I-LABEL: fcvt_wu_s_i8:856; RV32I: # %bb.0:857; RV32I-NEXT: addi sp, sp, -16858; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill859; RV32I-NEXT: call __fixunsdfsi860; RV32I-NEXT: zext.b a0, a0861; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload862; RV32I-NEXT: addi sp, sp, 16863; RV32I-NEXT: ret864;865; RV64I-LABEL: fcvt_wu_s_i8:866; RV64I: # %bb.0:867; RV64I-NEXT: addi sp, sp, -16868; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill869; RV64I-NEXT: call __fixunsdfsi870; RV64I-NEXT: zext.b a0, a0871; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload872; RV64I-NEXT: addi sp, sp, 16873; RV64I-NEXT: ret874 %1 = fptoui double %a to i8875 ret i8 %1876}877