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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel -mattr=+f \3; RUN: -target-abi=ilp32f \4; RUN: | FileCheck -check-prefix=RV32IF %s5; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel -mattr=+d \6; RUN: -target-abi=ilp32f \7; RUN: | FileCheck -check-prefix=RV32IF %s8; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel -mattr=+f \9; RUN: -target-abi=lp64f \10; RUN: | FileCheck -check-prefix=RV64IF %s11; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel -mattr=+d \12; RUN: -target-abi=lp64d \13; RUN: | FileCheck -check-prefix=RV64IFD %s14; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -global-isel \15; RUN: | FileCheck -check-prefix=RV32I %s16; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -global-isel \17; RUN: | FileCheck -check-prefix=RV64I %s18 19define float @sqrt_f32(float %a) nounwind {20; RV32IF-LABEL: sqrt_f32:21; RV32IF: # %bb.0:22; RV32IF-NEXT: fsqrt.s fa0, fa023; RV32IF-NEXT: ret24;25; RV64IF-LABEL: sqrt_f32:26; RV64IF: # %bb.0:27; RV64IF-NEXT: fsqrt.s fa0, fa028; RV64IF-NEXT: ret29;30; RV64IFD-LABEL: sqrt_f32:31; RV64IFD: # %bb.0:32; RV64IFD-NEXT: fsqrt.s fa0, fa033; RV64IFD-NEXT: ret34;35; RV32I-LABEL: sqrt_f32:36; RV32I: # %bb.0:37; RV32I-NEXT: addi sp, sp, -1638; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill39; RV32I-NEXT: call sqrtf40; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload41; RV32I-NEXT: addi sp, sp, 1642; RV32I-NEXT: ret43;44; RV64I-LABEL: sqrt_f32:45; RV64I: # %bb.0:46; RV64I-NEXT: addi sp, sp, -1647; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill48; RV64I-NEXT: call sqrtf49; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload50; RV64I-NEXT: addi sp, sp, 1651; RV64I-NEXT: ret52 %1 = call float @llvm.sqrt.f32(float %a)53 ret float %154}55 56define float @powi_f32(float %a, i32 %b) nounwind {57; RV32IF-LABEL: powi_f32:58; RV32IF: # %bb.0:59; RV32IF-NEXT: addi sp, sp, -1660; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill61; RV32IF-NEXT: call __powisf262; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload63; RV32IF-NEXT: addi sp, sp, 1664; RV32IF-NEXT: ret65;66; RV64IF-LABEL: powi_f32:67; RV64IF: # %bb.0:68; RV64IF-NEXT: addi sp, sp, -1669; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill70; RV64IF-NEXT: sext.w a0, a071; RV64IF-NEXT: call __powisf272; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload73; RV64IF-NEXT: addi sp, sp, 1674; RV64IF-NEXT: ret75;76; RV64IFD-LABEL: powi_f32:77; RV64IFD: # %bb.0:78; RV64IFD-NEXT: addi sp, sp, -1679; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill80; RV64IFD-NEXT: sext.w a0, a081; RV64IFD-NEXT: call __powisf282; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload83; RV64IFD-NEXT: addi sp, sp, 1684; RV64IFD-NEXT: ret85;86; RV32I-LABEL: powi_f32:87; RV32I: # %bb.0:88; RV32I-NEXT: addi sp, sp, -1689; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill90; RV32I-NEXT: call __powisf291; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload92; RV32I-NEXT: addi sp, sp, 1693; RV32I-NEXT: ret94;95; RV64I-LABEL: powi_f32:96; RV64I: # %bb.0:97; RV64I-NEXT: addi sp, sp, -1698; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill99; RV64I-NEXT: sext.w a1, a1100; RV64I-NEXT: call __powisf2101; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload102; RV64I-NEXT: addi sp, sp, 16103; RV64I-NEXT: ret104 %1 = call float @llvm.powi.f32.i32(float %a, i32 %b)105 ret float %1106}107 108define float @sin_f32(float %a) nounwind {109; RV32IF-LABEL: sin_f32:110; RV32IF: # %bb.0:111; RV32IF-NEXT: addi sp, sp, -16112; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill113; RV32IF-NEXT: call sinf114; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload115; RV32IF-NEXT: addi sp, sp, 16116; RV32IF-NEXT: ret117;118; RV64IF-LABEL: sin_f32:119; RV64IF: # %bb.0:120; RV64IF-NEXT: addi sp, sp, -16121; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill122; RV64IF-NEXT: call sinf123; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload124; RV64IF-NEXT: addi sp, sp, 16125; RV64IF-NEXT: ret126;127; RV64IFD-LABEL: sin_f32:128; RV64IFD: # %bb.0:129; RV64IFD-NEXT: addi sp, sp, -16130; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill131; RV64IFD-NEXT: call sinf132; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload133; RV64IFD-NEXT: addi sp, sp, 16134; RV64IFD-NEXT: ret135;136; RV32I-LABEL: sin_f32:137; RV32I: # %bb.0:138; RV32I-NEXT: addi sp, sp, -16139; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill140; RV32I-NEXT: call sinf141; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload142; RV32I-NEXT: addi sp, sp, 16143; RV32I-NEXT: ret144;145; RV64I-LABEL: sin_f32:146; RV64I: # %bb.0:147; RV64I-NEXT: addi sp, sp, -16148; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill149; RV64I-NEXT: call sinf150; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload151; RV64I-NEXT: addi sp, sp, 16152; RV64I-NEXT: ret153 %1 = call float @llvm.sin.f32(float %a)154 ret float %1155}156 157define float @cos_f32(float %a) nounwind {158; RV32IF-LABEL: cos_f32:159; RV32IF: # %bb.0:160; RV32IF-NEXT: addi sp, sp, -16161; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill162; RV32IF-NEXT: call cosf163; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload164; RV32IF-NEXT: addi sp, sp, 16165; RV32IF-NEXT: ret166;167; RV64IF-LABEL: cos_f32:168; RV64IF: # %bb.0:169; RV64IF-NEXT: addi sp, sp, -16170; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill171; RV64IF-NEXT: call cosf172; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload173; RV64IF-NEXT: addi sp, sp, 16174; RV64IF-NEXT: ret175;176; RV64IFD-LABEL: cos_f32:177; RV64IFD: # %bb.0:178; RV64IFD-NEXT: addi sp, sp, -16179; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill180; RV64IFD-NEXT: call cosf181; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload182; RV64IFD-NEXT: addi sp, sp, 16183; RV64IFD-NEXT: ret184;185; RV32I-LABEL: cos_f32:186; RV32I: # %bb.0:187; RV32I-NEXT: addi sp, sp, -16188; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill189; RV32I-NEXT: call cosf190; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload191; RV32I-NEXT: addi sp, sp, 16192; RV32I-NEXT: ret193;194; RV64I-LABEL: cos_f32:195; RV64I: # %bb.0:196; RV64I-NEXT: addi sp, sp, -16197; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill198; RV64I-NEXT: call cosf199; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload200; RV64I-NEXT: addi sp, sp, 16201; RV64I-NEXT: ret202 %1 = call float @llvm.cos.f32(float %a)203 ret float %1204}205 206; The sin+cos combination results in an FSINCOS SelectionDAG node.207define float @sincos_f32(float %a) nounwind {208; RV32IF-LABEL: sincos_f32:209; RV32IF: # %bb.0:210; RV32IF-NEXT: addi sp, sp, -16211; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill212; RV32IF-NEXT: fsw fs0, 8(sp) # 4-byte Folded Spill213; RV32IF-NEXT: fsw fs1, 4(sp) # 4-byte Folded Spill214; RV32IF-NEXT: fmv.s fs0, fa0215; RV32IF-NEXT: call sinf216; RV32IF-NEXT: fmv.s fs1, fa0217; RV32IF-NEXT: fmv.s fa0, fs0218; RV32IF-NEXT: call cosf219; RV32IF-NEXT: fadd.s fa0, fs1, fa0220; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload221; RV32IF-NEXT: flw fs0, 8(sp) # 4-byte Folded Reload222; RV32IF-NEXT: flw fs1, 4(sp) # 4-byte Folded Reload223; RV32IF-NEXT: addi sp, sp, 16224; RV32IF-NEXT: ret225;226; RV64IF-LABEL: sincos_f32:227; RV64IF: # %bb.0:228; RV64IF-NEXT: addi sp, sp, -16229; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill230; RV64IF-NEXT: fsw fs0, 4(sp) # 4-byte Folded Spill231; RV64IF-NEXT: fsw fs1, 0(sp) # 4-byte Folded Spill232; RV64IF-NEXT: fmv.s fs0, fa0233; RV64IF-NEXT: call sinf234; RV64IF-NEXT: fmv.s fs1, fa0235; RV64IF-NEXT: fmv.s fa0, fs0236; RV64IF-NEXT: call cosf237; RV64IF-NEXT: fadd.s fa0, fs1, fa0238; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload239; RV64IF-NEXT: flw fs0, 4(sp) # 4-byte Folded Reload240; RV64IF-NEXT: flw fs1, 0(sp) # 4-byte Folded Reload241; RV64IF-NEXT: addi sp, sp, 16242; RV64IF-NEXT: ret243;244; RV64IFD-LABEL: sincos_f32:245; RV64IFD: # %bb.0:246; RV64IFD-NEXT: addi sp, sp, -32247; RV64IFD-NEXT: sd ra, 24(sp) # 8-byte Folded Spill248; RV64IFD-NEXT: fsd fs0, 16(sp) # 8-byte Folded Spill249; RV64IFD-NEXT: fsd fs1, 8(sp) # 8-byte Folded Spill250; RV64IFD-NEXT: fmv.s fs0, fa0251; RV64IFD-NEXT: call sinf252; RV64IFD-NEXT: fmv.s fs1, fa0253; RV64IFD-NEXT: fmv.s fa0, fs0254; RV64IFD-NEXT: call cosf255; RV64IFD-NEXT: fadd.s fa0, fs1, fa0256; RV64IFD-NEXT: ld ra, 24(sp) # 8-byte Folded Reload257; RV64IFD-NEXT: fld fs0, 16(sp) # 8-byte Folded Reload258; RV64IFD-NEXT: fld fs1, 8(sp) # 8-byte Folded Reload259; RV64IFD-NEXT: addi sp, sp, 32260; RV64IFD-NEXT: ret261;262; RV32I-LABEL: sincos_f32:263; RV32I: # %bb.0:264; RV32I-NEXT: addi sp, sp, -16265; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill266; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill267; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill268; RV32I-NEXT: mv s0, a0269; RV32I-NEXT: call sinf270; RV32I-NEXT: mv s1, a0271; RV32I-NEXT: mv a0, s0272; RV32I-NEXT: call cosf273; RV32I-NEXT: mv a1, a0274; RV32I-NEXT: mv a0, s1275; RV32I-NEXT: call __addsf3276; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload277; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload278; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload279; RV32I-NEXT: addi sp, sp, 16280; RV32I-NEXT: ret281;282; RV64I-LABEL: sincos_f32:283; RV64I: # %bb.0:284; RV64I-NEXT: addi sp, sp, -32285; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill286; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill287; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill288; RV64I-NEXT: mv s0, a0289; RV64I-NEXT: call sinf290; RV64I-NEXT: mv s1, a0291; RV64I-NEXT: mv a0, s0292; RV64I-NEXT: call cosf293; RV64I-NEXT: mv a1, a0294; RV64I-NEXT: mv a0, s1295; RV64I-NEXT: call __addsf3296; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload297; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload298; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload299; RV64I-NEXT: addi sp, sp, 32300; RV64I-NEXT: ret301 %1 = call float @llvm.sin.f32(float %a)302 %2 = call float @llvm.cos.f32(float %a)303 %3 = fadd float %1, %2304 ret float %3305}306 307define float @pow_f32(float %a, float %b) nounwind {308; RV32IF-LABEL: pow_f32:309; RV32IF: # %bb.0:310; RV32IF-NEXT: addi sp, sp, -16311; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill312; RV32IF-NEXT: call powf313; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload314; RV32IF-NEXT: addi sp, sp, 16315; RV32IF-NEXT: ret316;317; RV64IF-LABEL: pow_f32:318; RV64IF: # %bb.0:319; RV64IF-NEXT: addi sp, sp, -16320; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill321; RV64IF-NEXT: call powf322; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload323; RV64IF-NEXT: addi sp, sp, 16324; RV64IF-NEXT: ret325;326; RV64IFD-LABEL: pow_f32:327; RV64IFD: # %bb.0:328; RV64IFD-NEXT: addi sp, sp, -16329; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill330; RV64IFD-NEXT: call powf331; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload332; RV64IFD-NEXT: addi sp, sp, 16333; RV64IFD-NEXT: ret334;335; RV32I-LABEL: pow_f32:336; RV32I: # %bb.0:337; RV32I-NEXT: addi sp, sp, -16338; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill339; RV32I-NEXT: call powf340; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload341; RV32I-NEXT: addi sp, sp, 16342; RV32I-NEXT: ret343;344; RV64I-LABEL: pow_f32:345; RV64I: # %bb.0:346; RV64I-NEXT: addi sp, sp, -16347; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill348; RV64I-NEXT: call powf349; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload350; RV64I-NEXT: addi sp, sp, 16351; RV64I-NEXT: ret352 %1 = call float @llvm.pow.f32(float %a, float %b)353 ret float %1354}355 356define float @exp_f32(float %a) nounwind {357; RV32IF-LABEL: exp_f32:358; RV32IF: # %bb.0:359; RV32IF-NEXT: addi sp, sp, -16360; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill361; RV32IF-NEXT: call expf362; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload363; RV32IF-NEXT: addi sp, sp, 16364; RV32IF-NEXT: ret365;366; RV64IF-LABEL: exp_f32:367; RV64IF: # %bb.0:368; RV64IF-NEXT: addi sp, sp, -16369; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill370; RV64IF-NEXT: call expf371; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload372; RV64IF-NEXT: addi sp, sp, 16373; RV64IF-NEXT: ret374;375; RV64IFD-LABEL: exp_f32:376; RV64IFD: # %bb.0:377; RV64IFD-NEXT: addi sp, sp, -16378; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill379; RV64IFD-NEXT: call expf380; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload381; RV64IFD-NEXT: addi sp, sp, 16382; RV64IFD-NEXT: ret383;384; RV32I-LABEL: exp_f32:385; RV32I: # %bb.0:386; RV32I-NEXT: addi sp, sp, -16387; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill388; RV32I-NEXT: call expf389; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload390; RV32I-NEXT: addi sp, sp, 16391; RV32I-NEXT: ret392;393; RV64I-LABEL: exp_f32:394; RV64I: # %bb.0:395; RV64I-NEXT: addi sp, sp, -16396; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill397; RV64I-NEXT: call expf398; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload399; RV64I-NEXT: addi sp, sp, 16400; RV64I-NEXT: ret401 %1 = call float @llvm.exp.f32(float %a)402 ret float %1403}404 405define float @exp2_f32(float %a) nounwind {406; RV32IF-LABEL: exp2_f32:407; RV32IF: # %bb.0:408; RV32IF-NEXT: addi sp, sp, -16409; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill410; RV32IF-NEXT: call exp2f411; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload412; RV32IF-NEXT: addi sp, sp, 16413; RV32IF-NEXT: ret414;415; RV64IF-LABEL: exp2_f32:416; RV64IF: # %bb.0:417; RV64IF-NEXT: addi sp, sp, -16418; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill419; RV64IF-NEXT: call exp2f420; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload421; RV64IF-NEXT: addi sp, sp, 16422; RV64IF-NEXT: ret423;424; RV64IFD-LABEL: exp2_f32:425; RV64IFD: # %bb.0:426; RV64IFD-NEXT: addi sp, sp, -16427; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill428; RV64IFD-NEXT: call exp2f429; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload430; RV64IFD-NEXT: addi sp, sp, 16431; RV64IFD-NEXT: ret432;433; RV32I-LABEL: exp2_f32:434; RV32I: # %bb.0:435; RV32I-NEXT: addi sp, sp, -16436; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill437; RV32I-NEXT: call exp2f438; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload439; RV32I-NEXT: addi sp, sp, 16440; RV32I-NEXT: ret441;442; RV64I-LABEL: exp2_f32:443; RV64I: # %bb.0:444; RV64I-NEXT: addi sp, sp, -16445; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill446; RV64I-NEXT: call exp2f447; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload448; RV64I-NEXT: addi sp, sp, 16449; RV64I-NEXT: ret450 %1 = call float @llvm.exp2.f32(float %a)451 ret float %1452}453 454define float @exp10_f32(float %a) nounwind {455; RV32IF-LABEL: exp10_f32:456; RV32IF: # %bb.0:457; RV32IF-NEXT: addi sp, sp, -16458; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill459; RV32IF-NEXT: call exp10f460; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload461; RV32IF-NEXT: addi sp, sp, 16462; RV32IF-NEXT: ret463;464; RV64IF-LABEL: exp10_f32:465; RV64IF: # %bb.0:466; RV64IF-NEXT: addi sp, sp, -16467; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill468; RV64IF-NEXT: call exp10f469; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload470; RV64IF-NEXT: addi sp, sp, 16471; RV64IF-NEXT: ret472;473; RV64IFD-LABEL: exp10_f32:474; RV64IFD: # %bb.0:475; RV64IFD-NEXT: addi sp, sp, -16476; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill477; RV64IFD-NEXT: call exp10f478; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload479; RV64IFD-NEXT: addi sp, sp, 16480; RV64IFD-NEXT: ret481;482; RV32I-LABEL: exp10_f32:483; RV32I: # %bb.0:484; RV32I-NEXT: addi sp, sp, -16485; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill486; RV32I-NEXT: call exp10f487; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload488; RV32I-NEXT: addi sp, sp, 16489; RV32I-NEXT: ret490;491; RV64I-LABEL: exp10_f32:492; RV64I: # %bb.0:493; RV64I-NEXT: addi sp, sp, -16494; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill495; RV64I-NEXT: call exp10f496; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload497; RV64I-NEXT: addi sp, sp, 16498; RV64I-NEXT: ret499 %1 = call float @llvm.exp10.f32(float %a)500 ret float %1501}502 503define float @log_f32(float %a) nounwind {504; RV32IF-LABEL: log_f32:505; RV32IF: # %bb.0:506; RV32IF-NEXT: addi sp, sp, -16507; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill508; RV32IF-NEXT: call logf509; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload510; RV32IF-NEXT: addi sp, sp, 16511; RV32IF-NEXT: ret512;513; RV64IF-LABEL: log_f32:514; RV64IF: # %bb.0:515; RV64IF-NEXT: addi sp, sp, -16516; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill517; RV64IF-NEXT: call logf518; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload519; RV64IF-NEXT: addi sp, sp, 16520; RV64IF-NEXT: ret521;522; RV64IFD-LABEL: log_f32:523; RV64IFD: # %bb.0:524; RV64IFD-NEXT: addi sp, sp, -16525; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill526; RV64IFD-NEXT: call logf527; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload528; RV64IFD-NEXT: addi sp, sp, 16529; RV64IFD-NEXT: ret530;531; RV32I-LABEL: log_f32:532; RV32I: # %bb.0:533; RV32I-NEXT: addi sp, sp, -16534; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill535; RV32I-NEXT: call logf536; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload537; RV32I-NEXT: addi sp, sp, 16538; RV32I-NEXT: ret539;540; RV64I-LABEL: log_f32:541; RV64I: # %bb.0:542; RV64I-NEXT: addi sp, sp, -16543; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill544; RV64I-NEXT: call logf545; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload546; RV64I-NEXT: addi sp, sp, 16547; RV64I-NEXT: ret548 %1 = call float @llvm.log.f32(float %a)549 ret float %1550}551 552define float @log10_f32(float %a) nounwind {553; RV32IF-LABEL: log10_f32:554; RV32IF: # %bb.0:555; RV32IF-NEXT: addi sp, sp, -16556; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill557; RV32IF-NEXT: call log10f558; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload559; RV32IF-NEXT: addi sp, sp, 16560; RV32IF-NEXT: ret561;562; RV64IF-LABEL: log10_f32:563; RV64IF: # %bb.0:564; RV64IF-NEXT: addi sp, sp, -16565; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill566; RV64IF-NEXT: call log10f567; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload568; RV64IF-NEXT: addi sp, sp, 16569; RV64IF-NEXT: ret570;571; RV64IFD-LABEL: log10_f32:572; RV64IFD: # %bb.0:573; RV64IFD-NEXT: addi sp, sp, -16574; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill575; RV64IFD-NEXT: call log10f576; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload577; RV64IFD-NEXT: addi sp, sp, 16578; RV64IFD-NEXT: ret579;580; RV32I-LABEL: log10_f32:581; RV32I: # %bb.0:582; RV32I-NEXT: addi sp, sp, -16583; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill584; RV32I-NEXT: call log10f585; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload586; RV32I-NEXT: addi sp, sp, 16587; RV32I-NEXT: ret588;589; RV64I-LABEL: log10_f32:590; RV64I: # %bb.0:591; RV64I-NEXT: addi sp, sp, -16592; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill593; RV64I-NEXT: call log10f594; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload595; RV64I-NEXT: addi sp, sp, 16596; RV64I-NEXT: ret597 %1 = call float @llvm.log10.f32(float %a)598 ret float %1599}600 601define float @log2_f32(float %a) nounwind {602; RV32IF-LABEL: log2_f32:603; RV32IF: # %bb.0:604; RV32IF-NEXT: addi sp, sp, -16605; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill606; RV32IF-NEXT: call log2f607; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload608; RV32IF-NEXT: addi sp, sp, 16609; RV32IF-NEXT: ret610;611; RV64IF-LABEL: log2_f32:612; RV64IF: # %bb.0:613; RV64IF-NEXT: addi sp, sp, -16614; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill615; RV64IF-NEXT: call log2f616; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload617; RV64IF-NEXT: addi sp, sp, 16618; RV64IF-NEXT: ret619;620; RV64IFD-LABEL: log2_f32:621; RV64IFD: # %bb.0:622; RV64IFD-NEXT: addi sp, sp, -16623; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill624; RV64IFD-NEXT: call log2f625; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload626; RV64IFD-NEXT: addi sp, sp, 16627; RV64IFD-NEXT: ret628;629; RV32I-LABEL: log2_f32:630; RV32I: # %bb.0:631; RV32I-NEXT: addi sp, sp, -16632; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill633; RV32I-NEXT: call log2f634; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload635; RV32I-NEXT: addi sp, sp, 16636; RV32I-NEXT: ret637;638; RV64I-LABEL: log2_f32:639; RV64I: # %bb.0:640; RV64I-NEXT: addi sp, sp, -16641; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill642; RV64I-NEXT: call log2f643; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload644; RV64I-NEXT: addi sp, sp, 16645; RV64I-NEXT: ret646 %1 = call float @llvm.log2.f32(float %a)647 ret float %1648}649 650define float @fma_f32(float %a, float %b, float %c) nounwind {651; RV32IF-LABEL: fma_f32:652; RV32IF: # %bb.0:653; RV32IF-NEXT: fmadd.s fa0, fa0, fa1, fa2654; RV32IF-NEXT: ret655;656; RV64IF-LABEL: fma_f32:657; RV64IF: # %bb.0:658; RV64IF-NEXT: fmadd.s fa0, fa0, fa1, fa2659; RV64IF-NEXT: ret660;661; RV64IFD-LABEL: fma_f32:662; RV64IFD: # %bb.0:663; RV64IFD-NEXT: fmadd.s fa0, fa0, fa1, fa2664; RV64IFD-NEXT: ret665;666; RV32I-LABEL: fma_f32:667; RV32I: # %bb.0:668; RV32I-NEXT: addi sp, sp, -16669; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill670; RV32I-NEXT: call fmaf671; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload672; RV32I-NEXT: addi sp, sp, 16673; RV32I-NEXT: ret674;675; RV64I-LABEL: fma_f32:676; RV64I: # %bb.0:677; RV64I-NEXT: addi sp, sp, -16678; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill679; RV64I-NEXT: call fmaf680; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload681; RV64I-NEXT: addi sp, sp, 16682; RV64I-NEXT: ret683 %1 = call float @llvm.fma.f32(float %a, float %b, float %c)684 ret float %1685}686 687define float @fmuladd_f32(float %a, float %b, float %c) nounwind {688; RV32IF-LABEL: fmuladd_f32:689; RV32IF: # %bb.0:690; RV32IF-NEXT: fmadd.s fa0, fa0, fa1, fa2691; RV32IF-NEXT: ret692;693; RV64IF-LABEL: fmuladd_f32:694; RV64IF: # %bb.0:695; RV64IF-NEXT: fmadd.s fa0, fa0, fa1, fa2696; RV64IF-NEXT: ret697;698; RV64IFD-LABEL: fmuladd_f32:699; RV64IFD: # %bb.0:700; RV64IFD-NEXT: fmadd.s fa0, fa0, fa1, fa2701; RV64IFD-NEXT: ret702;703; RV32I-LABEL: fmuladd_f32:704; RV32I: # %bb.0:705; RV32I-NEXT: addi sp, sp, -16706; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill707; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill708; RV32I-NEXT: mv s0, a2709; RV32I-NEXT: call __mulsf3710; RV32I-NEXT: mv a1, s0711; RV32I-NEXT: call __addsf3712; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload713; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload714; RV32I-NEXT: addi sp, sp, 16715; RV32I-NEXT: ret716;717; RV64I-LABEL: fmuladd_f32:718; RV64I: # %bb.0:719; RV64I-NEXT: addi sp, sp, -16720; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill721; RV64I-NEXT: sd s0, 0(sp) # 8-byte Folded Spill722; RV64I-NEXT: mv s0, a2723; RV64I-NEXT: call __mulsf3724; RV64I-NEXT: mv a1, s0725; RV64I-NEXT: call __addsf3726; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload727; RV64I-NEXT: ld s0, 0(sp) # 8-byte Folded Reload728; RV64I-NEXT: addi sp, sp, 16729; RV64I-NEXT: ret730 %1 = call float @llvm.fmuladd.f32(float %a, float %b, float %c)731 ret float %1732}733 734define float @fabs_f32(float %a) nounwind {735; RV32IF-LABEL: fabs_f32:736; RV32IF: # %bb.0:737; RV32IF-NEXT: fabs.s fa0, fa0738; RV32IF-NEXT: ret739;740; RV64IF-LABEL: fabs_f32:741; RV64IF: # %bb.0:742; RV64IF-NEXT: fabs.s fa0, fa0743; RV64IF-NEXT: ret744;745; RV64IFD-LABEL: fabs_f32:746; RV64IFD: # %bb.0:747; RV64IFD-NEXT: fabs.s fa0, fa0748; RV64IFD-NEXT: ret749;750; RV32I-LABEL: fabs_f32:751; RV32I: # %bb.0:752; RV32I-NEXT: slli a0, a0, 1753; RV32I-NEXT: srli a0, a0, 1754; RV32I-NEXT: ret755;756; RV64I-LABEL: fabs_f32:757; RV64I: # %bb.0:758; RV64I-NEXT: slli a0, a0, 33759; RV64I-NEXT: srli a0, a0, 33760; RV64I-NEXT: ret761 %1 = call float @llvm.fabs.f32(float %a)762 ret float %1763}764 765define float @minnum_f32(float %a, float %b) nounwind {766; RV32IF-LABEL: minnum_f32:767; RV32IF: # %bb.0:768; RV32IF-NEXT: fmin.s fa0, fa0, fa1769; RV32IF-NEXT: ret770;771; RV64IF-LABEL: minnum_f32:772; RV64IF: # %bb.0:773; RV64IF-NEXT: fmin.s fa0, fa0, fa1774; RV64IF-NEXT: ret775;776; RV64IFD-LABEL: minnum_f32:777; RV64IFD: # %bb.0:778; RV64IFD-NEXT: fmin.s fa0, fa0, fa1779; RV64IFD-NEXT: ret780;781; RV32I-LABEL: minnum_f32:782; RV32I: # %bb.0:783; RV32I-NEXT: addi sp, sp, -16784; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill785; RV32I-NEXT: call fminf786; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload787; RV32I-NEXT: addi sp, sp, 16788; RV32I-NEXT: ret789;790; RV64I-LABEL: minnum_f32:791; RV64I: # %bb.0:792; RV64I-NEXT: addi sp, sp, -16793; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill794; RV64I-NEXT: call fminf795; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload796; RV64I-NEXT: addi sp, sp, 16797; RV64I-NEXT: ret798 %1 = call float @llvm.minnum.f32(float %a, float %b)799 ret float %1800}801 802define float @maxnum_f32(float %a, float %b) nounwind {803; RV32IF-LABEL: maxnum_f32:804; RV32IF: # %bb.0:805; RV32IF-NEXT: fmax.s fa0, fa0, fa1806; RV32IF-NEXT: ret807;808; RV64IF-LABEL: maxnum_f32:809; RV64IF: # %bb.0:810; RV64IF-NEXT: fmax.s fa0, fa0, fa1811; RV64IF-NEXT: ret812;813; RV64IFD-LABEL: maxnum_f32:814; RV64IFD: # %bb.0:815; RV64IFD-NEXT: fmax.s fa0, fa0, fa1816; RV64IFD-NEXT: ret817;818; RV32I-LABEL: maxnum_f32:819; RV32I: # %bb.0:820; RV32I-NEXT: addi sp, sp, -16821; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill822; RV32I-NEXT: call fmaxf823; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload824; RV32I-NEXT: addi sp, sp, 16825; RV32I-NEXT: ret826;827; RV64I-LABEL: maxnum_f32:828; RV64I: # %bb.0:829; RV64I-NEXT: addi sp, sp, -16830; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill831; RV64I-NEXT: call fmaxf832; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload833; RV64I-NEXT: addi sp, sp, 16834; RV64I-NEXT: ret835 %1 = call float @llvm.maxnum.f32(float %a, float %b)836 ret float %1837}838 839define float @copysign_f32(float %a, float %b) nounwind {840; RV32IF-LABEL: copysign_f32:841; RV32IF: # %bb.0:842; RV32IF-NEXT: fsgnj.s fa0, fa0, fa1843; RV32IF-NEXT: ret844;845; RV64IF-LABEL: copysign_f32:846; RV64IF: # %bb.0:847; RV64IF-NEXT: fsgnj.s fa0, fa0, fa1848; RV64IF-NEXT: ret849;850; RV64IFD-LABEL: copysign_f32:851; RV64IFD: # %bb.0:852; RV64IFD-NEXT: fsgnj.s fa0, fa0, fa1853; RV64IFD-NEXT: ret854;855; RV32I-LABEL: copysign_f32:856; RV32I: # %bb.0:857; RV32I-NEXT: lui a2, 524288858; RV32I-NEXT: slli a0, a0, 1859; RV32I-NEXT: srli a0, a0, 1860; RV32I-NEXT: and a1, a1, a2861; RV32I-NEXT: or a0, a0, a1862; RV32I-NEXT: ret863;864; RV64I-LABEL: copysign_f32:865; RV64I: # %bb.0:866; RV64I-NEXT: lui a2, 524288867; RV64I-NEXT: slli a0, a0, 33868; RV64I-NEXT: srli a0, a0, 33869; RV64I-NEXT: and a1, a1, a2870; RV64I-NEXT: or a0, a0, a1871; RV64I-NEXT: ret872 %1 = call float @llvm.copysign.f32(float %a, float %b)873 ret float %1874}875 876define float @ceil_f32(float %a) nounwind {877; RV32IF-LABEL: ceil_f32:878; RV32IF: # %bb.0:879; RV32IF-NEXT: addi sp, sp, -16880; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill881; RV32IF-NEXT: call ceilf882; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload883; RV32IF-NEXT: addi sp, sp, 16884; RV32IF-NEXT: ret885;886; RV64IF-LABEL: ceil_f32:887; RV64IF: # %bb.0:888; RV64IF-NEXT: addi sp, sp, -16889; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill890; RV64IF-NEXT: call ceilf891; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload892; RV64IF-NEXT: addi sp, sp, 16893; RV64IF-NEXT: ret894;895; RV64IFD-LABEL: ceil_f32:896; RV64IFD: # %bb.0:897; RV64IFD-NEXT: addi sp, sp, -16898; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill899; RV64IFD-NEXT: call ceilf900; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload901; RV64IFD-NEXT: addi sp, sp, 16902; RV64IFD-NEXT: ret903;904; RV32I-LABEL: ceil_f32:905; RV32I: # %bb.0:906; RV32I-NEXT: addi sp, sp, -16907; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill908; RV32I-NEXT: call ceilf909; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload910; RV32I-NEXT: addi sp, sp, 16911; RV32I-NEXT: ret912;913; RV64I-LABEL: ceil_f32:914; RV64I: # %bb.0:915; RV64I-NEXT: addi sp, sp, -16916; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill917; RV64I-NEXT: call ceilf918; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload919; RV64I-NEXT: addi sp, sp, 16920; RV64I-NEXT: ret921 %1 = call float @llvm.ceil.f32(float %a)922 ret float %1923}924 925define float @trunc_f32(float %a) nounwind {926; RV32IF-LABEL: trunc_f32:927; RV32IF: # %bb.0:928; RV32IF-NEXT: addi sp, sp, -16929; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill930; RV32IF-NEXT: call truncf931; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload932; RV32IF-NEXT: addi sp, sp, 16933; RV32IF-NEXT: ret934;935; RV64IF-LABEL: trunc_f32:936; RV64IF: # %bb.0:937; RV64IF-NEXT: addi sp, sp, -16938; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill939; RV64IF-NEXT: call truncf940; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload941; RV64IF-NEXT: addi sp, sp, 16942; RV64IF-NEXT: ret943;944; RV64IFD-LABEL: trunc_f32:945; RV64IFD: # %bb.0:946; RV64IFD-NEXT: addi sp, sp, -16947; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill948; RV64IFD-NEXT: call truncf949; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload950; RV64IFD-NEXT: addi sp, sp, 16951; RV64IFD-NEXT: ret952;953; RV32I-LABEL: trunc_f32:954; RV32I: # %bb.0:955; RV32I-NEXT: addi sp, sp, -16956; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill957; RV32I-NEXT: call truncf958; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload959; RV32I-NEXT: addi sp, sp, 16960; RV32I-NEXT: ret961;962; RV64I-LABEL: trunc_f32:963; RV64I: # %bb.0:964; RV64I-NEXT: addi sp, sp, -16965; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill966; RV64I-NEXT: call truncf967; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload968; RV64I-NEXT: addi sp, sp, 16969; RV64I-NEXT: ret970 %1 = call float @llvm.trunc.f32(float %a)971 ret float %1972}973 974define float @rint_f32(float %a) nounwind {975; RV32IF-LABEL: rint_f32:976; RV32IF: # %bb.0:977; RV32IF-NEXT: addi sp, sp, -16978; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill979; RV32IF-NEXT: call rintf980; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload981; RV32IF-NEXT: addi sp, sp, 16982; RV32IF-NEXT: ret983;984; RV64IF-LABEL: rint_f32:985; RV64IF: # %bb.0:986; RV64IF-NEXT: addi sp, sp, -16987; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill988; RV64IF-NEXT: call rintf989; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload990; RV64IF-NEXT: addi sp, sp, 16991; RV64IF-NEXT: ret992;993; RV64IFD-LABEL: rint_f32:994; RV64IFD: # %bb.0:995; RV64IFD-NEXT: addi sp, sp, -16996; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill997; RV64IFD-NEXT: call rintf998; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload999; RV64IFD-NEXT: addi sp, sp, 161000; RV64IFD-NEXT: ret1001;1002; RV32I-LABEL: rint_f32:1003; RV32I: # %bb.0:1004; RV32I-NEXT: addi sp, sp, -161005; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1006; RV32I-NEXT: call rintf1007; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1008; RV32I-NEXT: addi sp, sp, 161009; RV32I-NEXT: ret1010;1011; RV64I-LABEL: rint_f32:1012; RV64I: # %bb.0:1013; RV64I-NEXT: addi sp, sp, -161014; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1015; RV64I-NEXT: call rintf1016; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1017; RV64I-NEXT: addi sp, sp, 161018; RV64I-NEXT: ret1019 %1 = call float @llvm.rint.f32(float %a)1020 ret float %11021}1022 1023define float @nearbyint_f32(float %a) nounwind {1024; RV32IF-LABEL: nearbyint_f32:1025; RV32IF: # %bb.0:1026; RV32IF-NEXT: addi sp, sp, -161027; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1028; RV32IF-NEXT: call nearbyintf1029; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1030; RV32IF-NEXT: addi sp, sp, 161031; RV32IF-NEXT: ret1032;1033; RV64IF-LABEL: nearbyint_f32:1034; RV64IF: # %bb.0:1035; RV64IF-NEXT: addi sp, sp, -161036; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1037; RV64IF-NEXT: call nearbyintf1038; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1039; RV64IF-NEXT: addi sp, sp, 161040; RV64IF-NEXT: ret1041;1042; RV64IFD-LABEL: nearbyint_f32:1043; RV64IFD: # %bb.0:1044; RV64IFD-NEXT: addi sp, sp, -161045; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1046; RV64IFD-NEXT: call nearbyintf1047; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1048; RV64IFD-NEXT: addi sp, sp, 161049; RV64IFD-NEXT: ret1050;1051; RV32I-LABEL: nearbyint_f32:1052; RV32I: # %bb.0:1053; RV32I-NEXT: addi sp, sp, -161054; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1055; RV32I-NEXT: call nearbyintf1056; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1057; RV32I-NEXT: addi sp, sp, 161058; RV32I-NEXT: ret1059;1060; RV64I-LABEL: nearbyint_f32:1061; RV64I: # %bb.0:1062; RV64I-NEXT: addi sp, sp, -161063; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1064; RV64I-NEXT: call nearbyintf1065; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1066; RV64I-NEXT: addi sp, sp, 161067; RV64I-NEXT: ret1068 %1 = call float @llvm.nearbyint.f32(float %a)1069 ret float %11070}1071 1072define float @round_f32(float %a) nounwind {1073; RV32IF-LABEL: round_f32:1074; RV32IF: # %bb.0:1075; RV32IF-NEXT: addi sp, sp, -161076; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1077; RV32IF-NEXT: call roundf1078; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1079; RV32IF-NEXT: addi sp, sp, 161080; RV32IF-NEXT: ret1081;1082; RV64IF-LABEL: round_f32:1083; RV64IF: # %bb.0:1084; RV64IF-NEXT: addi sp, sp, -161085; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1086; RV64IF-NEXT: call roundf1087; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1088; RV64IF-NEXT: addi sp, sp, 161089; RV64IF-NEXT: ret1090;1091; RV64IFD-LABEL: round_f32:1092; RV64IFD: # %bb.0:1093; RV64IFD-NEXT: addi sp, sp, -161094; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1095; RV64IFD-NEXT: call roundf1096; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1097; RV64IFD-NEXT: addi sp, sp, 161098; RV64IFD-NEXT: ret1099;1100; RV32I-LABEL: round_f32:1101; RV32I: # %bb.0:1102; RV32I-NEXT: addi sp, sp, -161103; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1104; RV32I-NEXT: call roundf1105; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1106; RV32I-NEXT: addi sp, sp, 161107; RV32I-NEXT: ret1108;1109; RV64I-LABEL: round_f32:1110; RV64I: # %bb.0:1111; RV64I-NEXT: addi sp, sp, -161112; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1113; RV64I-NEXT: call roundf1114; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1115; RV64I-NEXT: addi sp, sp, 161116; RV64I-NEXT: ret1117 %1 = call float @llvm.round.f32(float %a)1118 ret float %11119}1120 1121define float @roundeven_f32(float %a) nounwind {1122; RV32IF-LABEL: roundeven_f32:1123; RV32IF: # %bb.0:1124; RV32IF-NEXT: addi sp, sp, -161125; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1126; RV32IF-NEXT: call roundevenf1127; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1128; RV32IF-NEXT: addi sp, sp, 161129; RV32IF-NEXT: ret1130;1131; RV64IF-LABEL: roundeven_f32:1132; RV64IF: # %bb.0:1133; RV64IF-NEXT: addi sp, sp, -161134; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1135; RV64IF-NEXT: call roundevenf1136; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1137; RV64IF-NEXT: addi sp, sp, 161138; RV64IF-NEXT: ret1139;1140; RV64IFD-LABEL: roundeven_f32:1141; RV64IFD: # %bb.0:1142; RV64IFD-NEXT: addi sp, sp, -161143; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1144; RV64IFD-NEXT: call roundevenf1145; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1146; RV64IFD-NEXT: addi sp, sp, 161147; RV64IFD-NEXT: ret1148;1149; RV32I-LABEL: roundeven_f32:1150; RV32I: # %bb.0:1151; RV32I-NEXT: addi sp, sp, -161152; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1153; RV32I-NEXT: call roundevenf1154; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1155; RV32I-NEXT: addi sp, sp, 161156; RV32I-NEXT: ret1157;1158; RV64I-LABEL: roundeven_f32:1159; RV64I: # %bb.0:1160; RV64I-NEXT: addi sp, sp, -161161; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1162; RV64I-NEXT: call roundevenf1163; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1164; RV64I-NEXT: addi sp, sp, 161165; RV64I-NEXT: ret1166 %1 = call float @llvm.roundeven.f32(float %a)1167 ret float %11168}1169 1170define i1 @fpclass(float %x) {1171; RV32IF-LABEL: fpclass:1172; RV32IF: # %bb.0:1173; RV32IF-NEXT: fclass.s a0, fa01174; RV32IF-NEXT: andi a0, a0, 9271175; RV32IF-NEXT: snez a0, a01176; RV32IF-NEXT: ret1177;1178; RV64IF-LABEL: fpclass:1179; RV64IF: # %bb.0:1180; RV64IF-NEXT: fclass.s a0, fa01181; RV64IF-NEXT: andi a0, a0, 9271182; RV64IF-NEXT: snez a0, a01183; RV64IF-NEXT: ret1184;1185; RV64IFD-LABEL: fpclass:1186; RV64IFD: # %bb.0:1187; RV64IFD-NEXT: fclass.s a0, fa01188; RV64IFD-NEXT: andi a0, a0, 9271189; RV64IFD-NEXT: snez a0, a01190; RV64IFD-NEXT: ret1191;1192; RV32I-LABEL: fpclass:1193; RV32I: # %bb.0:1194; RV32I-NEXT: lui a1, 5222401195; RV32I-NEXT: slli a2, a0, 11196; RV32I-NEXT: lui a3, 20481197; RV32I-NEXT: lui a4, 10465281198; RV32I-NEXT: srli a5, a2, 11199; RV32I-NEXT: addi a3, a3, -11200; RV32I-NEXT: xor a0, a0, a51201; RV32I-NEXT: xor a6, a5, a11202; RV32I-NEXT: sltu a1, a1, a51203; RV32I-NEXT: add a4, a5, a41204; RV32I-NEXT: addi a5, a5, -11205; RV32I-NEXT: sltu a3, a5, a31206; RV32I-NEXT: lui a5, 5201921207; RV32I-NEXT: sltu a4, a4, a51208; RV32I-NEXT: seqz a2, a21209; RV32I-NEXT: snez a0, a01210; RV32I-NEXT: seqz a5, a61211; RV32I-NEXT: and a3, a3, a01212; RV32I-NEXT: or a2, a2, a51213; RV32I-NEXT: and a0, a4, a01214; RV32I-NEXT: or a2, a2, a31215; RV32I-NEXT: or a0, a1, a01216; RV32I-NEXT: or a0, a2, a01217; RV32I-NEXT: ret1218;1219; RV64I-LABEL: fpclass:1220; RV64I: # %bb.0:1221; RV64I-NEXT: lui a1, 5222401222; RV64I-NEXT: slli a2, a0, 331223; RV64I-NEXT: sext.w a0, a01224; RV64I-NEXT: li a3, 11225; RV64I-NEXT: lui a4, 20481226; RV64I-NEXT: srli a5, a2, 331227; RV64I-NEXT: xor a0, a0, a51228; RV64I-NEXT: subw a3, a5, a31229; RV64I-NEXT: xor a6, a5, a11230; RV64I-NEXT: sltu a1, a1, a51231; RV64I-NEXT: subw a5, a5, a41232; RV64I-NEXT: addi a4, a4, -11233; RV64I-NEXT: sltu a3, a3, a41234; RV64I-NEXT: lui a4, 5201921235; RV64I-NEXT: seqz a2, a21236; RV64I-NEXT: snez a0, a01237; RV64I-NEXT: seqz a6, a61238; RV64I-NEXT: sltu a4, a5, a41239; RV64I-NEXT: and a3, a3, a01240; RV64I-NEXT: or a2, a2, a61241; RV64I-NEXT: or a1, a2, a11242; RV64I-NEXT: or a1, a1, a31243; RV64I-NEXT: and a0, a4, a01244; RV64I-NEXT: or a0, a1, a01245; RV64I-NEXT: ret1246 %cmp = call i1 @llvm.is.fpclass.f32(float %x, i32 639)1247 ret i1 %cmp1248}1249 1250define i1 @isnan_fpclass(float %x) {1251; RV32IF-LABEL: isnan_fpclass:1252; RV32IF: # %bb.0:1253; RV32IF-NEXT: fclass.s a0, fa01254; RV32IF-NEXT: andi a0, a0, 7681255; RV32IF-NEXT: snez a0, a01256; RV32IF-NEXT: ret1257;1258; RV64IF-LABEL: isnan_fpclass:1259; RV64IF: # %bb.0:1260; RV64IF-NEXT: fclass.s a0, fa01261; RV64IF-NEXT: andi a0, a0, 7681262; RV64IF-NEXT: snez a0, a01263; RV64IF-NEXT: ret1264;1265; RV64IFD-LABEL: isnan_fpclass:1266; RV64IFD: # %bb.0:1267; RV64IFD-NEXT: fclass.s a0, fa01268; RV64IFD-NEXT: andi a0, a0, 7681269; RV64IFD-NEXT: snez a0, a01270; RV64IFD-NEXT: ret1271;1272; RV32I-LABEL: isnan_fpclass:1273; RV32I: # %bb.0:1274; RV32I-NEXT: lui a1, 5222401275; RV32I-NEXT: slli a0, a0, 11276; RV32I-NEXT: srli a0, a0, 11277; RV32I-NEXT: sltu a0, a1, a01278; RV32I-NEXT: ret1279;1280; RV64I-LABEL: isnan_fpclass:1281; RV64I: # %bb.0:1282; RV64I-NEXT: lui a1, 5222401283; RV64I-NEXT: slli a0, a0, 331284; RV64I-NEXT: srli a0, a0, 331285; RV64I-NEXT: sltu a0, a1, a01286; RV64I-NEXT: ret1287 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 3) ; nan1288 ret i1 %11289}1290 1291define i1 @isqnan_fpclass(float %x) {1292; RV32IF-LABEL: isqnan_fpclass:1293; RV32IF: # %bb.0:1294; RV32IF-NEXT: fclass.s a0, fa01295; RV32IF-NEXT: andi a0, a0, 5121296; RV32IF-NEXT: snez a0, a01297; RV32IF-NEXT: ret1298;1299; RV64IF-LABEL: isqnan_fpclass:1300; RV64IF: # %bb.0:1301; RV64IF-NEXT: fclass.s a0, fa01302; RV64IF-NEXT: andi a0, a0, 5121303; RV64IF-NEXT: snez a0, a01304; RV64IF-NEXT: ret1305;1306; RV64IFD-LABEL: isqnan_fpclass:1307; RV64IFD: # %bb.0:1308; RV64IFD-NEXT: fclass.s a0, fa01309; RV64IFD-NEXT: andi a0, a0, 5121310; RV64IFD-NEXT: snez a0, a01311; RV64IFD-NEXT: ret1312;1313; RV32I-LABEL: isqnan_fpclass:1314; RV32I: # %bb.0:1315; RV32I-NEXT: slli a0, a0, 11316; RV32I-NEXT: srli a0, a0, 11317; RV32I-NEXT: lui a1, 5232641318; RV32I-NEXT: sltu a0, a0, a11319; RV32I-NEXT: xori a0, a0, 11320; RV32I-NEXT: ret1321;1322; RV64I-LABEL: isqnan_fpclass:1323; RV64I: # %bb.0:1324; RV64I-NEXT: slli a0, a0, 331325; RV64I-NEXT: srli a0, a0, 331326; RV64I-NEXT: lui a1, 5232641327; RV64I-NEXT: sltu a0, a0, a11328; RV64I-NEXT: xori a0, a0, 11329; RV64I-NEXT: ret1330 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 2) ; qnan1331 ret i1 %11332}1333 1334define i1 @issnan_fpclass(float %x) {1335; RV32IF-LABEL: issnan_fpclass:1336; RV32IF: # %bb.0:1337; RV32IF-NEXT: fclass.s a0, fa01338; RV32IF-NEXT: andi a0, a0, 2561339; RV32IF-NEXT: snez a0, a01340; RV32IF-NEXT: ret1341;1342; RV64IF-LABEL: issnan_fpclass:1343; RV64IF: # %bb.0:1344; RV64IF-NEXT: fclass.s a0, fa01345; RV64IF-NEXT: andi a0, a0, 2561346; RV64IF-NEXT: snez a0, a01347; RV64IF-NEXT: ret1348;1349; RV64IFD-LABEL: issnan_fpclass:1350; RV64IFD: # %bb.0:1351; RV64IFD-NEXT: fclass.s a0, fa01352; RV64IFD-NEXT: andi a0, a0, 2561353; RV64IFD-NEXT: snez a0, a01354; RV64IFD-NEXT: ret1355;1356; RV32I-LABEL: issnan_fpclass:1357; RV32I: # %bb.0:1358; RV32I-NEXT: lui a1, 5222401359; RV32I-NEXT: slli a0, a0, 11360; RV32I-NEXT: lui a2, 5232641361; RV32I-NEXT: srli a0, a0, 11362; RV32I-NEXT: sltu a1, a1, a01363; RV32I-NEXT: sltu a0, a0, a21364; RV32I-NEXT: and a0, a1, a01365; RV32I-NEXT: ret1366;1367; RV64I-LABEL: issnan_fpclass:1368; RV64I: # %bb.0:1369; RV64I-NEXT: lui a1, 5222401370; RV64I-NEXT: slli a0, a0, 331371; RV64I-NEXT: lui a2, 5232641372; RV64I-NEXT: srli a0, a0, 331373; RV64I-NEXT: sltu a1, a1, a01374; RV64I-NEXT: sltu a0, a0, a21375; RV64I-NEXT: and a0, a1, a01376; RV64I-NEXT: ret1377 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 1) ; snan1378 ret i1 %11379}1380 1381define i1 @isinf_fpclass(float %x) {1382; RV32IF-LABEL: isinf_fpclass:1383; RV32IF: # %bb.0:1384; RV32IF-NEXT: fclass.s a0, fa01385; RV32IF-NEXT: andi a0, a0, 1291386; RV32IF-NEXT: snez a0, a01387; RV32IF-NEXT: ret1388;1389; RV64IF-LABEL: isinf_fpclass:1390; RV64IF: # %bb.0:1391; RV64IF-NEXT: fclass.s a0, fa01392; RV64IF-NEXT: andi a0, a0, 1291393; RV64IF-NEXT: snez a0, a01394; RV64IF-NEXT: ret1395;1396; RV64IFD-LABEL: isinf_fpclass:1397; RV64IFD: # %bb.0:1398; RV64IFD-NEXT: fclass.s a0, fa01399; RV64IFD-NEXT: andi a0, a0, 1291400; RV64IFD-NEXT: snez a0, a01401; RV64IFD-NEXT: ret1402;1403; RV32I-LABEL: isinf_fpclass:1404; RV32I: # %bb.0:1405; RV32I-NEXT: lui a1, 5222401406; RV32I-NEXT: slli a0, a0, 11407; RV32I-NEXT: srli a0, a0, 11408; RV32I-NEXT: xor a0, a0, a11409; RV32I-NEXT: seqz a0, a01410; RV32I-NEXT: ret1411;1412; RV64I-LABEL: isinf_fpclass:1413; RV64I: # %bb.0:1414; RV64I-NEXT: lui a1, 5222401415; RV64I-NEXT: slli a0, a0, 331416; RV64I-NEXT: srli a0, a0, 331417; RV64I-NEXT: xor a0, a0, a11418; RV64I-NEXT: seqz a0, a01419; RV64I-NEXT: ret1420 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 516) ; 0x204 = "inf"1421 ret i1 %11422}1423 1424define i1 @isposinf_fpclass(float %x) {1425; RV32IF-LABEL: isposinf_fpclass:1426; RV32IF: # %bb.0:1427; RV32IF-NEXT: fclass.s a0, fa01428; RV32IF-NEXT: andi a0, a0, 1281429; RV32IF-NEXT: snez a0, a01430; RV32IF-NEXT: ret1431;1432; RV64IF-LABEL: isposinf_fpclass:1433; RV64IF: # %bb.0:1434; RV64IF-NEXT: fclass.s a0, fa01435; RV64IF-NEXT: andi a0, a0, 1281436; RV64IF-NEXT: snez a0, a01437; RV64IF-NEXT: ret1438;1439; RV64IFD-LABEL: isposinf_fpclass:1440; RV64IFD: # %bb.0:1441; RV64IFD-NEXT: fclass.s a0, fa01442; RV64IFD-NEXT: andi a0, a0, 1281443; RV64IFD-NEXT: snez a0, a01444; RV64IFD-NEXT: ret1445;1446; RV32I-LABEL: isposinf_fpclass:1447; RV32I: # %bb.0:1448; RV32I-NEXT: lui a1, 5222401449; RV32I-NEXT: xor a0, a0, a11450; RV32I-NEXT: seqz a0, a01451; RV32I-NEXT: ret1452;1453; RV64I-LABEL: isposinf_fpclass:1454; RV64I: # %bb.0:1455; RV64I-NEXT: lui a1, 5222401456; RV64I-NEXT: sext.w a0, a01457; RV64I-NEXT: xor a0, a0, a11458; RV64I-NEXT: seqz a0, a01459; RV64I-NEXT: ret1460 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 512) ; 0x200 = "+inf"1461 ret i1 %11462}1463 1464define i1 @isneginf_fpclass(float %x) {1465; RV32IF-LABEL: isneginf_fpclass:1466; RV32IF: # %bb.0:1467; RV32IF-NEXT: fclass.s a0, fa01468; RV32IF-NEXT: andi a0, a0, 11469; RV32IF-NEXT: snez a0, a01470; RV32IF-NEXT: ret1471;1472; RV64IF-LABEL: isneginf_fpclass:1473; RV64IF: # %bb.0:1474; RV64IF-NEXT: fclass.s a0, fa01475; RV64IF-NEXT: andi a0, a0, 11476; RV64IF-NEXT: snez a0, a01477; RV64IF-NEXT: ret1478;1479; RV64IFD-LABEL: isneginf_fpclass:1480; RV64IFD: # %bb.0:1481; RV64IFD-NEXT: fclass.s a0, fa01482; RV64IFD-NEXT: andi a0, a0, 11483; RV64IFD-NEXT: snez a0, a01484; RV64IFD-NEXT: ret1485;1486; RV32I-LABEL: isneginf_fpclass:1487; RV32I: # %bb.0:1488; RV32I-NEXT: lui a1, 10465281489; RV32I-NEXT: xor a0, a0, a11490; RV32I-NEXT: seqz a0, a01491; RV32I-NEXT: ret1492;1493; RV64I-LABEL: isneginf_fpclass:1494; RV64I: # %bb.0:1495; RV64I-NEXT: lui a1, 10465281496; RV64I-NEXT: sext.w a0, a01497; RV64I-NEXT: xor a0, a0, a11498; RV64I-NEXT: seqz a0, a01499; RV64I-NEXT: ret1500 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 4) ; "-inf"1501 ret i1 %11502}1503 1504define i1 @isfinite_fpclass(float %x) {1505; RV32IF-LABEL: isfinite_fpclass:1506; RV32IF: # %bb.0:1507; RV32IF-NEXT: fclass.s a0, fa01508; RV32IF-NEXT: andi a0, a0, 1261509; RV32IF-NEXT: snez a0, a01510; RV32IF-NEXT: ret1511;1512; RV64IF-LABEL: isfinite_fpclass:1513; RV64IF: # %bb.0:1514; RV64IF-NEXT: fclass.s a0, fa01515; RV64IF-NEXT: andi a0, a0, 1261516; RV64IF-NEXT: snez a0, a01517; RV64IF-NEXT: ret1518;1519; RV64IFD-LABEL: isfinite_fpclass:1520; RV64IFD: # %bb.0:1521; RV64IFD-NEXT: fclass.s a0, fa01522; RV64IFD-NEXT: andi a0, a0, 1261523; RV64IFD-NEXT: snez a0, a01524; RV64IFD-NEXT: ret1525;1526; RV32I-LABEL: isfinite_fpclass:1527; RV32I: # %bb.0:1528; RV32I-NEXT: lui a1, 5222401529; RV32I-NEXT: slli a0, a0, 11530; RV32I-NEXT: srli a0, a0, 11531; RV32I-NEXT: sltu a0, a0, a11532; RV32I-NEXT: ret1533;1534; RV64I-LABEL: isfinite_fpclass:1535; RV64I: # %bb.0:1536; RV64I-NEXT: lui a1, 5222401537; RV64I-NEXT: slli a0, a0, 331538; RV64I-NEXT: srli a0, a0, 331539; RV64I-NEXT: sltu a0, a0, a11540; RV64I-NEXT: ret1541 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 504) ; 0x1f8 = "finite"1542 ret i1 %11543}1544 1545define i1 @isposfinite_fpclass(float %x) {1546; RV32IF-LABEL: isposfinite_fpclass:1547; RV32IF: # %bb.0:1548; RV32IF-NEXT: fclass.s a0, fa01549; RV32IF-NEXT: andi a0, a0, 1121550; RV32IF-NEXT: snez a0, a01551; RV32IF-NEXT: ret1552;1553; RV64IF-LABEL: isposfinite_fpclass:1554; RV64IF: # %bb.0:1555; RV64IF-NEXT: fclass.s a0, fa01556; RV64IF-NEXT: andi a0, a0, 1121557; RV64IF-NEXT: snez a0, a01558; RV64IF-NEXT: ret1559;1560; RV64IFD-LABEL: isposfinite_fpclass:1561; RV64IFD: # %bb.0:1562; RV64IFD-NEXT: fclass.s a0, fa01563; RV64IFD-NEXT: andi a0, a0, 1121564; RV64IFD-NEXT: snez a0, a01565; RV64IFD-NEXT: ret1566;1567; RV32I-LABEL: isposfinite_fpclass:1568; RV32I: # %bb.0:1569; RV32I-NEXT: lui a1, 5222401570; RV32I-NEXT: sltu a0, a0, a11571; RV32I-NEXT: ret1572;1573; RV64I-LABEL: isposfinite_fpclass:1574; RV64I: # %bb.0:1575; RV64I-NEXT: lui a1, 5222401576; RV64I-NEXT: sext.w a0, a01577; RV64I-NEXT: sltu a0, a0, a11578; RV64I-NEXT: ret1579 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 448) ; 0x1c0 = "+finite"1580 ret i1 %11581}1582 1583define i1 @isnegfinite_fpclass(float %x) {1584; RV32IF-LABEL: isnegfinite_fpclass:1585; RV32IF: # %bb.0:1586; RV32IF-NEXT: fclass.s a0, fa01587; RV32IF-NEXT: andi a0, a0, 141588; RV32IF-NEXT: snez a0, a01589; RV32IF-NEXT: ret1590;1591; RV64IF-LABEL: isnegfinite_fpclass:1592; RV64IF: # %bb.0:1593; RV64IF-NEXT: fclass.s a0, fa01594; RV64IF-NEXT: andi a0, a0, 141595; RV64IF-NEXT: snez a0, a01596; RV64IF-NEXT: ret1597;1598; RV64IFD-LABEL: isnegfinite_fpclass:1599; RV64IFD: # %bb.0:1600; RV64IFD-NEXT: fclass.s a0, fa01601; RV64IFD-NEXT: andi a0, a0, 141602; RV64IFD-NEXT: snez a0, a01603; RV64IFD-NEXT: ret1604;1605; RV32I-LABEL: isnegfinite_fpclass:1606; RV32I: # %bb.0:1607; RV32I-NEXT: lui a1, 5222401608; RV32I-NEXT: slli a2, a0, 11609; RV32I-NEXT: srli a2, a2, 11610; RV32I-NEXT: xor a0, a0, a21611; RV32I-NEXT: snez a0, a01612; RV32I-NEXT: sltu a1, a2, a11613; RV32I-NEXT: and a0, a1, a01614; RV32I-NEXT: ret1615;1616; RV64I-LABEL: isnegfinite_fpclass:1617; RV64I: # %bb.0:1618; RV64I-NEXT: lui a1, 5222401619; RV64I-NEXT: slli a2, a0, 331620; RV64I-NEXT: sext.w a0, a01621; RV64I-NEXT: srli a2, a2, 331622; RV64I-NEXT: xor a0, a0, a21623; RV64I-NEXT: snez a0, a01624; RV64I-NEXT: sltu a1, a2, a11625; RV64I-NEXT: and a0, a1, a01626; RV64I-NEXT: ret1627 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 56) ; 0x38 = "-finite"1628 ret i1 %11629}1630 1631define i1 @isnotfinite_fpclass(float %x) {1632; RV32IF-LABEL: isnotfinite_fpclass:1633; RV32IF: # %bb.0:1634; RV32IF-NEXT: fclass.s a0, fa01635; RV32IF-NEXT: andi a0, a0, 8971636; RV32IF-NEXT: snez a0, a01637; RV32IF-NEXT: ret1638;1639; RV64IF-LABEL: isnotfinite_fpclass:1640; RV64IF: # %bb.0:1641; RV64IF-NEXT: fclass.s a0, fa01642; RV64IF-NEXT: andi a0, a0, 8971643; RV64IF-NEXT: snez a0, a01644; RV64IF-NEXT: ret1645;1646; RV64IFD-LABEL: isnotfinite_fpclass:1647; RV64IFD: # %bb.0:1648; RV64IFD-NEXT: fclass.s a0, fa01649; RV64IFD-NEXT: andi a0, a0, 8971650; RV64IFD-NEXT: snez a0, a01651; RV64IFD-NEXT: ret1652;1653; RV32I-LABEL: isnotfinite_fpclass:1654; RV32I: # %bb.0:1655; RV32I-NEXT: lui a1, 5222401656; RV32I-NEXT: slli a0, a0, 11657; RV32I-NEXT: srli a0, a0, 11658; RV32I-NEXT: xor a2, a0, a11659; RV32I-NEXT: seqz a2, a21660; RV32I-NEXT: sltu a0, a1, a01661; RV32I-NEXT: or a0, a2, a01662; RV32I-NEXT: ret1663;1664; RV64I-LABEL: isnotfinite_fpclass:1665; RV64I: # %bb.0:1666; RV64I-NEXT: lui a1, 5222401667; RV64I-NEXT: slli a0, a0, 331668; RV64I-NEXT: srli a0, a0, 331669; RV64I-NEXT: xor a2, a0, a11670; RV64I-NEXT: seqz a2, a21671; RV64I-NEXT: sltu a0, a1, a01672; RV64I-NEXT: or a0, a2, a01673; RV64I-NEXT: ret1674 %1 = call i1 @llvm.is.fpclass.f32(float %x, i32 519) ; ox207 = "inf|nan"1675 ret i1 %11676}1677 1678define float @tan_f32(float %a) nounwind {1679; RV32IF-LABEL: tan_f32:1680; RV32IF: # %bb.0:1681; RV32IF-NEXT: addi sp, sp, -161682; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1683; RV32IF-NEXT: call tanf1684; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1685; RV32IF-NEXT: addi sp, sp, 161686; RV32IF-NEXT: ret1687;1688; RV64IF-LABEL: tan_f32:1689; RV64IF: # %bb.0:1690; RV64IF-NEXT: addi sp, sp, -161691; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1692; RV64IF-NEXT: call tanf1693; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1694; RV64IF-NEXT: addi sp, sp, 161695; RV64IF-NEXT: ret1696;1697; RV64IFD-LABEL: tan_f32:1698; RV64IFD: # %bb.0:1699; RV64IFD-NEXT: addi sp, sp, -161700; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1701; RV64IFD-NEXT: call tanf1702; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1703; RV64IFD-NEXT: addi sp, sp, 161704; RV64IFD-NEXT: ret1705;1706; RV32I-LABEL: tan_f32:1707; RV32I: # %bb.0:1708; RV32I-NEXT: addi sp, sp, -161709; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1710; RV32I-NEXT: call tanf1711; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1712; RV32I-NEXT: addi sp, sp, 161713; RV32I-NEXT: ret1714;1715; RV64I-LABEL: tan_f32:1716; RV64I: # %bb.0:1717; RV64I-NEXT: addi sp, sp, -161718; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1719; RV64I-NEXT: call tanf1720; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1721; RV64I-NEXT: addi sp, sp, 161722; RV64I-NEXT: ret1723 %1 = call float @llvm.tan.f32(float %a)1724 ret float %11725}1726 1727define float @ldexp_float(float %x, i32 %y) nounwind {1728; RV32IF-LABEL: ldexp_float:1729; RV32IF: # %bb.0:1730; RV32IF-NEXT: addi sp, sp, -161731; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1732; RV32IF-NEXT: call ldexpf1733; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1734; RV32IF-NEXT: addi sp, sp, 161735; RV32IF-NEXT: ret1736;1737; RV64IF-LABEL: ldexp_float:1738; RV64IF: # %bb.0:1739; RV64IF-NEXT: addi sp, sp, -161740; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1741; RV64IF-NEXT: sext.w a0, a01742; RV64IF-NEXT: call ldexpf1743; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1744; RV64IF-NEXT: addi sp, sp, 161745; RV64IF-NEXT: ret1746;1747; RV64IFD-LABEL: ldexp_float:1748; RV64IFD: # %bb.0:1749; RV64IFD-NEXT: addi sp, sp, -161750; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1751; RV64IFD-NEXT: sext.w a0, a01752; RV64IFD-NEXT: call ldexpf1753; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1754; RV64IFD-NEXT: addi sp, sp, 161755; RV64IFD-NEXT: ret1756;1757; RV32I-LABEL: ldexp_float:1758; RV32I: # %bb.0:1759; RV32I-NEXT: addi sp, sp, -161760; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1761; RV32I-NEXT: call ldexpf1762; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1763; RV32I-NEXT: addi sp, sp, 161764; RV32I-NEXT: ret1765;1766; RV64I-LABEL: ldexp_float:1767; RV64I: # %bb.0:1768; RV64I-NEXT: addi sp, sp, -161769; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1770; RV64I-NEXT: sext.w a1, a11771; RV64I-NEXT: call ldexpf1772; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1773; RV64I-NEXT: addi sp, sp, 161774; RV64I-NEXT: ret1775 %z = call float @llvm.ldexp.f32.i32(float %x, i32 %y)1776 ret float %z1777}1778 1779define float @asin_f32(float %a) nounwind {1780; RV32IF-LABEL: asin_f32:1781; RV32IF: # %bb.0:1782; RV32IF-NEXT: addi sp, sp, -161783; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1784; RV32IF-NEXT: call asinf1785; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1786; RV32IF-NEXT: addi sp, sp, 161787; RV32IF-NEXT: ret1788;1789; RV64IF-LABEL: asin_f32:1790; RV64IF: # %bb.0:1791; RV64IF-NEXT: addi sp, sp, -161792; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1793; RV64IF-NEXT: call asinf1794; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1795; RV64IF-NEXT: addi sp, sp, 161796; RV64IF-NEXT: ret1797;1798; RV64IFD-LABEL: asin_f32:1799; RV64IFD: # %bb.0:1800; RV64IFD-NEXT: addi sp, sp, -161801; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1802; RV64IFD-NEXT: call asinf1803; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1804; RV64IFD-NEXT: addi sp, sp, 161805; RV64IFD-NEXT: ret1806;1807; RV32I-LABEL: asin_f32:1808; RV32I: # %bb.0:1809; RV32I-NEXT: addi sp, sp, -161810; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1811; RV32I-NEXT: call asinf1812; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1813; RV32I-NEXT: addi sp, sp, 161814; RV32I-NEXT: ret1815;1816; RV64I-LABEL: asin_f32:1817; RV64I: # %bb.0:1818; RV64I-NEXT: addi sp, sp, -161819; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1820; RV64I-NEXT: call asinf1821; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1822; RV64I-NEXT: addi sp, sp, 161823; RV64I-NEXT: ret1824 %1 = call float @llvm.asin.f32(float %a)1825 ret float %11826}1827 1828define float @acos_f32(float %a) nounwind {1829; RV32IF-LABEL: acos_f32:1830; RV32IF: # %bb.0:1831; RV32IF-NEXT: addi sp, sp, -161832; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1833; RV32IF-NEXT: call acosf1834; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1835; RV32IF-NEXT: addi sp, sp, 161836; RV32IF-NEXT: ret1837;1838; RV64IF-LABEL: acos_f32:1839; RV64IF: # %bb.0:1840; RV64IF-NEXT: addi sp, sp, -161841; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1842; RV64IF-NEXT: call acosf1843; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1844; RV64IF-NEXT: addi sp, sp, 161845; RV64IF-NEXT: ret1846;1847; RV64IFD-LABEL: acos_f32:1848; RV64IFD: # %bb.0:1849; RV64IFD-NEXT: addi sp, sp, -161850; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1851; RV64IFD-NEXT: call acosf1852; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1853; RV64IFD-NEXT: addi sp, sp, 161854; RV64IFD-NEXT: ret1855;1856; RV32I-LABEL: acos_f32:1857; RV32I: # %bb.0:1858; RV32I-NEXT: addi sp, sp, -161859; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1860; RV32I-NEXT: call acosf1861; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1862; RV32I-NEXT: addi sp, sp, 161863; RV32I-NEXT: ret1864;1865; RV64I-LABEL: acos_f32:1866; RV64I: # %bb.0:1867; RV64I-NEXT: addi sp, sp, -161868; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1869; RV64I-NEXT: call acosf1870; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1871; RV64I-NEXT: addi sp, sp, 161872; RV64I-NEXT: ret1873 %1 = call float @llvm.acos.f32(float %a)1874 ret float %11875}1876 1877define float @atan_f32(float %a) nounwind {1878; RV32IF-LABEL: atan_f32:1879; RV32IF: # %bb.0:1880; RV32IF-NEXT: addi sp, sp, -161881; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1882; RV32IF-NEXT: call atanf1883; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1884; RV32IF-NEXT: addi sp, sp, 161885; RV32IF-NEXT: ret1886;1887; RV64IF-LABEL: atan_f32:1888; RV64IF: # %bb.0:1889; RV64IF-NEXT: addi sp, sp, -161890; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1891; RV64IF-NEXT: call atanf1892; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1893; RV64IF-NEXT: addi sp, sp, 161894; RV64IF-NEXT: ret1895;1896; RV64IFD-LABEL: atan_f32:1897; RV64IFD: # %bb.0:1898; RV64IFD-NEXT: addi sp, sp, -161899; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1900; RV64IFD-NEXT: call atanf1901; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1902; RV64IFD-NEXT: addi sp, sp, 161903; RV64IFD-NEXT: ret1904;1905; RV32I-LABEL: atan_f32:1906; RV32I: # %bb.0:1907; RV32I-NEXT: addi sp, sp, -161908; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1909; RV32I-NEXT: call atanf1910; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1911; RV32I-NEXT: addi sp, sp, 161912; RV32I-NEXT: ret1913;1914; RV64I-LABEL: atan_f32:1915; RV64I: # %bb.0:1916; RV64I-NEXT: addi sp, sp, -161917; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1918; RV64I-NEXT: call atanf1919; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1920; RV64I-NEXT: addi sp, sp, 161921; RV64I-NEXT: ret1922 %1 = call float @llvm.atan.f32(float %a)1923 ret float %11924}1925 1926define float @atan2_f32(float %a, float %b) nounwind {1927; RV32IF-LABEL: atan2_f32:1928; RV32IF: # %bb.0:1929; RV32IF-NEXT: addi sp, sp, -161930; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1931; RV32IF-NEXT: call atan2f1932; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1933; RV32IF-NEXT: addi sp, sp, 161934; RV32IF-NEXT: ret1935;1936; RV64IF-LABEL: atan2_f32:1937; RV64IF: # %bb.0:1938; RV64IF-NEXT: addi sp, sp, -161939; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1940; RV64IF-NEXT: call atan2f1941; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1942; RV64IF-NEXT: addi sp, sp, 161943; RV64IF-NEXT: ret1944;1945; RV64IFD-LABEL: atan2_f32:1946; RV64IFD: # %bb.0:1947; RV64IFD-NEXT: addi sp, sp, -161948; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1949; RV64IFD-NEXT: call atan2f1950; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1951; RV64IFD-NEXT: addi sp, sp, 161952; RV64IFD-NEXT: ret1953;1954; RV32I-LABEL: atan2_f32:1955; RV32I: # %bb.0:1956; RV32I-NEXT: addi sp, sp, -161957; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1958; RV32I-NEXT: call atan2f1959; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1960; RV32I-NEXT: addi sp, sp, 161961; RV32I-NEXT: ret1962;1963; RV64I-LABEL: atan2_f32:1964; RV64I: # %bb.0:1965; RV64I-NEXT: addi sp, sp, -161966; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1967; RV64I-NEXT: call atan2f1968; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1969; RV64I-NEXT: addi sp, sp, 161970; RV64I-NEXT: ret1971 %1 = call float @llvm.atan2.f32(float %a, float %b)1972 ret float %11973}1974 1975define float @sinh_f32(float %a) nounwind {1976; RV32IF-LABEL: sinh_f32:1977; RV32IF: # %bb.0:1978; RV32IF-NEXT: addi sp, sp, -161979; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill1980; RV32IF-NEXT: call sinhf1981; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload1982; RV32IF-NEXT: addi sp, sp, 161983; RV32IF-NEXT: ret1984;1985; RV64IF-LABEL: sinh_f32:1986; RV64IF: # %bb.0:1987; RV64IF-NEXT: addi sp, sp, -161988; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1989; RV64IF-NEXT: call sinhf1990; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload1991; RV64IF-NEXT: addi sp, sp, 161992; RV64IF-NEXT: ret1993;1994; RV64IFD-LABEL: sinh_f32:1995; RV64IFD: # %bb.0:1996; RV64IFD-NEXT: addi sp, sp, -161997; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill1998; RV64IFD-NEXT: call sinhf1999; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2000; RV64IFD-NEXT: addi sp, sp, 162001; RV64IFD-NEXT: ret2002;2003; RV32I-LABEL: sinh_f32:2004; RV32I: # %bb.0:2005; RV32I-NEXT: addi sp, sp, -162006; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2007; RV32I-NEXT: call sinhf2008; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2009; RV32I-NEXT: addi sp, sp, 162010; RV32I-NEXT: ret2011;2012; RV64I-LABEL: sinh_f32:2013; RV64I: # %bb.0:2014; RV64I-NEXT: addi sp, sp, -162015; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2016; RV64I-NEXT: call sinhf2017; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2018; RV64I-NEXT: addi sp, sp, 162019; RV64I-NEXT: ret2020 %1 = call float @llvm.sinh.f32(float %a)2021 ret float %12022}2023 2024define float @cosh_f32(float %a) nounwind {2025; RV32IF-LABEL: cosh_f32:2026; RV32IF: # %bb.0:2027; RV32IF-NEXT: addi sp, sp, -162028; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2029; RV32IF-NEXT: call coshf2030; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2031; RV32IF-NEXT: addi sp, sp, 162032; RV32IF-NEXT: ret2033;2034; RV64IF-LABEL: cosh_f32:2035; RV64IF: # %bb.0:2036; RV64IF-NEXT: addi sp, sp, -162037; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2038; RV64IF-NEXT: call coshf2039; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2040; RV64IF-NEXT: addi sp, sp, 162041; RV64IF-NEXT: ret2042;2043; RV64IFD-LABEL: cosh_f32:2044; RV64IFD: # %bb.0:2045; RV64IFD-NEXT: addi sp, sp, -162046; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2047; RV64IFD-NEXT: call coshf2048; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2049; RV64IFD-NEXT: addi sp, sp, 162050; RV64IFD-NEXT: ret2051;2052; RV32I-LABEL: cosh_f32:2053; RV32I: # %bb.0:2054; RV32I-NEXT: addi sp, sp, -162055; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2056; RV32I-NEXT: call coshf2057; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2058; RV32I-NEXT: addi sp, sp, 162059; RV32I-NEXT: ret2060;2061; RV64I-LABEL: cosh_f32:2062; RV64I: # %bb.0:2063; RV64I-NEXT: addi sp, sp, -162064; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2065; RV64I-NEXT: call coshf2066; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2067; RV64I-NEXT: addi sp, sp, 162068; RV64I-NEXT: ret2069 %1 = call float @llvm.cosh.f32(float %a)2070 ret float %12071}2072 2073define float @tanh_f32(float %a) nounwind {2074; RV32IF-LABEL: tanh_f32:2075; RV32IF: # %bb.0:2076; RV32IF-NEXT: addi sp, sp, -162077; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2078; RV32IF-NEXT: call tanhf2079; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2080; RV32IF-NEXT: addi sp, sp, 162081; RV32IF-NEXT: ret2082;2083; RV64IF-LABEL: tanh_f32:2084; RV64IF: # %bb.0:2085; RV64IF-NEXT: addi sp, sp, -162086; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2087; RV64IF-NEXT: call tanhf2088; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2089; RV64IF-NEXT: addi sp, sp, 162090; RV64IF-NEXT: ret2091;2092; RV64IFD-LABEL: tanh_f32:2093; RV64IFD: # %bb.0:2094; RV64IFD-NEXT: addi sp, sp, -162095; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2096; RV64IFD-NEXT: call tanhf2097; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2098; RV64IFD-NEXT: addi sp, sp, 162099; RV64IFD-NEXT: ret2100;2101; RV32I-LABEL: tanh_f32:2102; RV32I: # %bb.0:2103; RV32I-NEXT: addi sp, sp, -162104; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2105; RV32I-NEXT: call tanhf2106; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2107; RV32I-NEXT: addi sp, sp, 162108; RV32I-NEXT: ret2109;2110; RV64I-LABEL: tanh_f32:2111; RV64I: # %bb.0:2112; RV64I-NEXT: addi sp, sp, -162113; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2114; RV64I-NEXT: call tanhf2115; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2116; RV64I-NEXT: addi sp, sp, 162117; RV64I-NEXT: ret2118 %1 = call float @llvm.tanh.f32(float %a)2119 ret float %12120}2121 2122define { float, float } @test_modf_f32(float %a) nounwind {2123; RV32IF-LABEL: test_modf_f32:2124; RV32IF: # %bb.0:2125; RV32IF-NEXT: addi sp, sp, -162126; RV32IF-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2127; RV32IF-NEXT: addi a0, sp, 82128; RV32IF-NEXT: call modff2129; RV32IF-NEXT: flw fa1, 8(sp)2130; RV32IF-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2131; RV32IF-NEXT: addi sp, sp, 162132; RV32IF-NEXT: ret2133;2134; RV64IF-LABEL: test_modf_f32:2135; RV64IF: # %bb.0:2136; RV64IF-NEXT: addi sp, sp, -162137; RV64IF-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2138; RV64IF-NEXT: addi a0, sp, 42139; RV64IF-NEXT: call modff2140; RV64IF-NEXT: flw fa1, 4(sp)2141; RV64IF-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2142; RV64IF-NEXT: addi sp, sp, 162143; RV64IF-NEXT: ret2144;2145; RV64IFD-LABEL: test_modf_f32:2146; RV64IFD: # %bb.0:2147; RV64IFD-NEXT: addi sp, sp, -162148; RV64IFD-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2149; RV64IFD-NEXT: addi a0, sp, 42150; RV64IFD-NEXT: call modff2151; RV64IFD-NEXT: flw fa1, 4(sp)2152; RV64IFD-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2153; RV64IFD-NEXT: addi sp, sp, 162154; RV64IFD-NEXT: ret2155;2156; RV32I-LABEL: test_modf_f32:2157; RV32I: # %bb.0:2158; RV32I-NEXT: addi sp, sp, -162159; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill2160; RV32I-NEXT: addi a1, sp, 82161; RV32I-NEXT: call modff2162; RV32I-NEXT: lw a1, 8(sp)2163; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload2164; RV32I-NEXT: addi sp, sp, 162165; RV32I-NEXT: ret2166;2167; RV64I-LABEL: test_modf_f32:2168; RV64I: # %bb.0:2169; RV64I-NEXT: addi sp, sp, -162170; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill2171; RV64I-NEXT: addi a1, sp, 42172; RV64I-NEXT: call modff2173; RV64I-NEXT: lw a1, 4(sp)2174; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload2175; RV64I-NEXT: addi sp, sp, 162176; RV64I-NEXT: ret2177 %result = call { float, float } @llvm.modf.f32(float %a)2178 ret { float, float } %result2179}2180