217 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=riscv32 -mattr=+f,+d,+zfh,+m,+v -global-isel -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV323; RUN: llc -mtriple=riscv64 -mattr=+f,+d,+zfh,+m,+v -global-isel -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,RV644 5define i32 @freeze_int(i32 %x) {6; CHECK-LABEL: freeze_int:7; CHECK: # %bb.0:8; CHECK-NEXT: mul a0, a0, a09; CHECK-NEXT: ret10 %y1 = freeze i32 %x11 %t1 = mul i32 %y1, %y112 ret i32 %t113}14 15define i5 @freeze_int2(i5 %x) {16; CHECK-LABEL: freeze_int2:17; CHECK: # %bb.0:18; CHECK-NEXT: mul a0, a0, a019; CHECK-NEXT: ret20 %y1 = freeze i5 %x21 %t1 = mul i5 %y1, %y122 ret i5 %t123}24 25define float @freeze_float(float %x) {26; CHECK-LABEL: freeze_float:27; CHECK: # %bb.0:28; CHECK-NEXT: fadd.s fa0, fa0, fa029; CHECK-NEXT: ret30 %y1 = freeze float %x31 %t1 = fadd float %y1, %y132 ret float %t133}34 35define double @freeze_double(double %x) nounwind {36; RV32-LABEL: freeze_double:37; RV32: # %bb.0:38; RV32-NEXT: addi sp, sp, -1639; RV32-NEXT: fsd fa0, 8(sp)40; RV32-NEXT: lw a0, 8(sp)41; RV32-NEXT: lw a1, 12(sp)42; RV32-NEXT: sw a0, 8(sp)43; RV32-NEXT: sw a1, 12(sp)44; RV32-NEXT: fld fa5, 8(sp)45; RV32-NEXT: fadd.d fa0, fa5, fa546; RV32-NEXT: addi sp, sp, 1647; RV32-NEXT: ret48;49; RV64-LABEL: freeze_double:50; RV64: # %bb.0:51; RV64-NEXT: fadd.d fa0, fa0, fa052; RV64-NEXT: ret53 %y1 = freeze double %x54 %t1 = fadd double %y1, %y155 ret double %t156}57 58define void @freeze_half(ptr %p) {59; CHECK-LABEL: freeze_half:60; CHECK: # %bb.0:61; CHECK-NEXT: lh a1, 0(a0)62; CHECK-NEXT: sh a1, 0(a0)63; CHECK-NEXT: ret64 %x = load half, ptr %p65 %y1 = freeze half %x66 store half %y1, ptr %p67 ret void68}69 70define <vscale x 2 x i32> @freeze_ivec(<vscale x 2 x i32> %x) {71; CHECK-LABEL: freeze_ivec:72; CHECK: # %bb.0:73; CHECK-NEXT: ret74 %y = freeze <vscale x 2 x i32> %x75 ret <vscale x 2 x i32> %y76}77 78define <vscale x 2 x float> @freeze_fvec(<vscale x 2 x float> %x) {79; CHECK-LABEL: freeze_fvec:80; CHECK: # %bb.0:81; CHECK-NEXT: ret82 %y = freeze <vscale x 2 x float> %x83 ret <vscale x 2 x float> %y84}85 86define ptr @freeze_ptr(ptr %x) {87; CHECK-LABEL: freeze_ptr:88; CHECK: # %bb.0:89; CHECK-NEXT: addi a0, a0, 490; CHECK-NEXT: ret91 %y1 = freeze ptr %x92 %t1 = getelementptr i8, ptr %y1, i64 493 ret ptr %t194}95 96%struct.T = type { i32, i32 }97 98define i32 @freeze_struct(ptr %p) {99; RV32-LABEL: freeze_struct:100; RV32: # %bb.0:101; RV32-NEXT: lw a1, 0(a0)102; RV32-NEXT: lw a0, 4(a0)103; RV32-NEXT: add a0, a1, a0104; RV32-NEXT: ret105;106; RV64-LABEL: freeze_struct:107; RV64: # %bb.0:108; RV64-NEXT: lw a1, 0(a0)109; RV64-NEXT: lw a0, 4(a0)110; RV64-NEXT: addw a0, a1, a0111; RV64-NEXT: ret112 %s = load %struct.T, ptr %p113 %y1 = freeze %struct.T %s114 %v1 = extractvalue %struct.T %y1, 0115 %v2 = extractvalue %struct.T %y1, 1116 %t1 = add i32 %v1, %v2117 ret i32 %t1118}119 120define i32 @freeze_anonstruct(ptr %p) {121; RV32-LABEL: freeze_anonstruct:122; RV32: # %bb.0:123; RV32-NEXT: lw a1, 0(a0)124; RV32-NEXT: lw a0, 4(a0)125; RV32-NEXT: add a0, a1, a0126; RV32-NEXT: ret127;128; RV64-LABEL: freeze_anonstruct:129; RV64: # %bb.0:130; RV64-NEXT: lw a1, 0(a0)131; RV64-NEXT: lw a0, 4(a0)132; RV64-NEXT: addw a0, a1, a0133; RV64-NEXT: ret134 %s = load {i32, i32}, ptr %p135 %y1 = freeze {i32, i32} %s136 %v1 = extractvalue {i32, i32} %y1, 0137 %v2 = extractvalue {i32, i32} %y1, 1138 %t1 = add i32 %v1, %v2139 ret i32 %t1140}141 142define i32 @freeze_anonstruct2(ptr %p) {143; RV32-LABEL: freeze_anonstruct2:144; RV32: # %bb.0:145; RV32-NEXT: lh a1, 4(a0)146; RV32-NEXT: lw a0, 0(a0)147; RV32-NEXT: slli a1, a1, 16148; RV32-NEXT: srli a1, a1, 16149; RV32-NEXT: add a0, a0, a1150; RV32-NEXT: ret151;152; RV64-LABEL: freeze_anonstruct2:153; RV64: # %bb.0:154; RV64-NEXT: lh a1, 4(a0)155; RV64-NEXT: lw a0, 0(a0)156; RV64-NEXT: slli a1, a1, 48157; RV64-NEXT: srli a1, a1, 48158; RV64-NEXT: addw a0, a0, a1159; RV64-NEXT: ret160 %s = load {i32, i16}, ptr %p161 %y1 = freeze {i32, i16} %s162 %v1 = extractvalue {i32, i16} %y1, 0163 %v2 = extractvalue {i32, i16} %y1, 1164 %z2 = zext i16 %v2 to i32165 %t1 = add i32 %v1, %z2166 ret i32 %t1167}168 169define i32 @freeze_anonstruct2_sext(ptr %p) {170; RV32-LABEL: freeze_anonstruct2_sext:171; RV32: # %bb.0:172; RV32-NEXT: lh a1, 4(a0)173; RV32-NEXT: lw a0, 0(a0)174; RV32-NEXT: slli a1, a1, 16175; RV32-NEXT: srai a1, a1, 16176; RV32-NEXT: add a0, a0, a1177; RV32-NEXT: ret178;179; RV64-LABEL: freeze_anonstruct2_sext:180; RV64: # %bb.0:181; RV64-NEXT: lh a1, 4(a0)182; RV64-NEXT: lw a0, 0(a0)183; RV64-NEXT: slli a1, a1, 48184; RV64-NEXT: srai a1, a1, 48185; RV64-NEXT: addw a0, a0, a1186; RV64-NEXT: ret187 %s = load {i32, i16}, ptr %p188 %y1 = freeze {i32, i16} %s189 %v1 = extractvalue {i32, i16} %y1, 0190 %v2 = extractvalue {i32, i16} %y1, 1191 %z2 = sext i16 %v2 to i32192 %t1 = add i32 %v1, %z2193 ret i32 %t1194}195 196define i32 @freeze_array(ptr %p) nounwind {197; RV32-LABEL: freeze_array:198; RV32: # %bb.0:199; RV32-NEXT: lw a1, 0(a0)200; RV32-NEXT: lw a0, 4(a0)201; RV32-NEXT: add a0, a1, a0202; RV32-NEXT: ret203;204; RV64-LABEL: freeze_array:205; RV64: # %bb.0:206; RV64-NEXT: lw a1, 0(a0)207; RV64-NEXT: lw a0, 4(a0)208; RV64-NEXT: addw a0, a1, a0209; RV64-NEXT: ret210 %s = load [2 x i32], ptr %p211 %y1 = freeze [2 x i32] %s212 %v1 = extractvalue [2 x i32] %y1, 0213 %v2 = extractvalue [2 x i32] %y1, 1214 %t1 = add i32 %v1, %v2215 ret i32 %t1216}217