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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=riscv32 -mattr=+zbb -run-pass=instruction-select \3# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s4# RUN: llc -mtriple=riscv32 -mattr=+zbkb -run-pass=instruction-select \5# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s6 7---8name: bswap_s329legalized: true10regBankSelected: true11body: |12 bb.0.entry:13 ; CHECK-LABEL: name: bswap_s3214 ; CHECK: [[COPY:%[0-9]+]]:gpr = COPY $x1015 ; CHECK-NEXT: [[REV8_RV32_:%[0-9]+]]:gpr = REV8_RV32 [[COPY]]16 ; CHECK-NEXT: $x10 = COPY [[REV8_RV32_]]17 ; CHECK-NEXT: PseudoRET implicit $x1018 %0:gprb(s32) = COPY $x1019 %1:gprb(s32) = G_BSWAP %020 $x10 = COPY %1(s32)21 PseudoRET implicit $x1022 23...24